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MC10H116MEL ,Triple Line ReceiverPrepared byCleon PettyAPPLICATION NOTETodd PearsonECL Applications EngineeringThis application note ..
MC10H116MELG , Triple Line Receiver
MC10H116ML1 ,Triple Line Receiver**SEMICONDUCTOR TECHNICAL DATA** * * *The MC10H116 is a functional/pinout duplication of the MC1011 ..
MC10H116ML2 ,Triple Line ReceiverMAXIMUM RATINGSPLASTIC SOICCharacteristic Symbol Rating Unit CASE 751B–05Power Supply (V = 0) V –8. ..
MC10H116ML2 ,Triple Line ReceiverLOGIC DIAGRAM— Ceramic –55 to +165 °C4 2
MC34161DR2 ,Universal Voltage Monitors3t , OUTPUT PROPAGATION DELAY TIME (ns)V , CHANNEL OUTPUT VOLTAGE (V)PHL V , OUTPUT VOLTAGE (V)outo ..
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MC34163 ,POWER SWITCHING REGULATORSELECTRICAL CHARACTERISTICS (V = 15 V, Pin 16 = V , C = 620 pF, for typical values T = 25°C, for min ..
MC34163DW ,POWER SWITCHING REGULATORSThermal Characteristics °C/WP Suffix, Dual–In–Line Case 648CThermal Resistance, Junction–to–Air R 8 ..
MC34163DWR2 ,Power Switching RegulatorELECTRICAL CHARACTERISTICS (V = 15 V, Pin 16 = V , C = 620 pF, for typical values T = 25°C, for min ..
MC34163P ,Power Switching RegulatorMAXIMUM RATINGSRating Symbol Value UnitPower Supply Voltage V 40 VCCSwitch Collector Voltage Range ..
MC10H116M
Triple Line Receiver
MC10H116
Triple Line Receiver
The MC10H116 is a functional/pinout duplication of the MC10116,
with 100% improvement in propagation delay and no increase in
power–supply current. Propagation Delay, 1.0 ns Typical Power Dissipation 85 mW Typ/Pkg (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
Figure 1. Logic Diagram*VBB to be used to supply bias to the MC10H115 only and
bypassed (when used) with 0.01 μF to 0.1 μF capacitor to
ground (0 V). VBB can source < 1.0 mA.
The MC10H115 is designed to be used in sensing differential
signals over long lines. The bias supply (VBB) is made available
to make the device useful as a Schmitt trigger, or in other
applications where a stable reference voltage is necessary.
Active current sources provide these receivers with excellent
common–mode noise rejection. If any amplifier in a package is
not used, one input of that amplifier must be connected to VBB to
prevent unbalancing the current–source bias network.
The MC10H115 does not have internal–input pull– down
resistors. This provides high impedance to the amplifier input
and facilitates differential connections.
Applications: Low Level Receiver • Voltage Level Schmitt Trigger Interface
Figure 2. Dip Pin AssignmentVCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
VBB
BIN
BIN
When input pin with
bubble goes positive
it’s respective output
pin with bubble goes
positive.
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
VBB*
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
ORDERING INFORMATION
MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
CDIP–16
L SUFFIX
CASE 620A
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
SO–16
D SUFFIX
CASE 751B
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