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MC10H107LMOT?N/a2000avaiTriple 2-Input Exclusive OR/Exclusive NOR Gate
MC10H107PMOTN/a100avaiTriple 2-Input XOR/XNOR Gate


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MC10H107L-MC10H107P
Triple 2-Input Exclusive OR/Exclusive NOR Gate
SEMICONDUCTOR TECHNICAL DATA - -
The MC10H107 is a triple 2–input exclusive OR/NOR gate. This MECL 10H
part is a functional/pinout duplication of the standard MECL 10K family part,
with 100% improvement in propagation delay, and no increase in power–supply
current. Propagation Delay, 1.0 ns Typical Power Dissipation 35 mW/Gate Typical (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP
PIN ASSIGNMENT

VCC1
AOUT
AOUT
AIN
AIN
*NC
BIN
VEE
VCC2
CIN
CIN
COUT
COUT
BOUT
BOUT
BIN
*NC = No Connection

Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
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