MC10H105M ,Triple 2-3-2-Input OR/NOR GatePrepared by: Paul ShockmanON SemiconductorAPPLICATION NOTEObjectiveGeneral BackgroundThis applicati ..
MC10H105MEL ,Triple 2-3-2-Input OR/NOR GateELECTRICAL CHARACTERISTICS (V = –5.2 V ±5%) (See Note 1.)EE0° 25° 75°Symbol Characteristic Min Max ..
MC10H105MELG , Triple 2−3−2−Input OR/NOR Gate
MC10H105P ,Triple 2-3-2-Input OR/NOR GateMAXIMUM RATINGSCharacteristic Symbol Rating UnitPower Supply (V = 0) V –8.0 to 0 VdcCC EE
MC10H106 ,Triple 4-3-3-Input NOR Gatefeatures of an ECL device make itrequirement stems only from the speed performance aspectideal for ..
MC10H106FN ,Triple 4-3-3 Input NOR GateELECTRICAL CHARACTERISTICS (V = –5.2 V ±5%) (See Note 1.)EE0° 25° 75°Symbol Characteristic Min Max ..
MC3410F ,10-Bit high-speed multiplying D/A converter
MC3410F ,10-Bit high-speed multiplying D/A converter
MC3410F ,10-Bit high-speed multiplying D/A converter
MC34114 ,TELEPHONE SPEECH NETWORK WITH DIALER INTERFACE(ll) MOTOROLASpecifications and ApplicationsInformationTELEPHONE SPEECH NETWORKWITH DIALER INTERFAC ..
MC34114DW ,TELEPHONE SPEECH NETWORK WITH DIALER INTERFACE(ll) MOTOROLASpecifications and ApplicationsInformationTELEPHONE SPEECH NETWORKWITH DIALER INTERFAC ..
MC34114P ,TELEPHONE SPEECH NETWORK WITH DIALER INTERFACE(ll) MOTOROLASpecifications and ApplicationsInformationTELEPHONE SPEECH NETWORKWITH DIALER INTERFAC ..
MC10H105FN-MC10H105L-MC10H105P
Triple 2-3-2-Input OR/NOR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10H105 is a triple 2–3–2–input OR/NOR gate. This MECL 10H part
is a functional/pinout duplication of the standard MECL 10K family part, with
100% improvement in propagation delay, and no increases in power–supply
current. Propagation Delay, 1.0 ns Typical Power Dissipation 25 mW/Gate (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP
PIN ASSIGNMENTVCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
