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MC10H104LONN/a4200avaiQuad 2-Input AND Gate
MC10H104ML1MOTON/a646avaiQuad 2-Input AND Gate
MC10H104ML1N/a600avaiQuad 2-Input AND Gate


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MC10H104L-MC10H104ML1
Quad 2-Input AND Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10H104 is a quad 2–input AND gate. One of the gates has both
AND/NAND outputs available. This MECL 10H part is a functional/pinout
duplication of the standard MECL 10K family part, with 100% improvement in
propagation delay, and no increase in power– supply current. Propagation Delay, 1.0 ns Typical Power Dissipation 25 mW/Gate (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP
PIN ASSIGNMENT

VCC1
AOUT
BOUT
AIN
AIN
BIN
BIN
VEE
VCC2
DOUT
COUT
DIN
DIN
CIN
CIN
DOUT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
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