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MC10E404FNMOTN/a12avai5V ECL Quad Differential AND/NAND


MC10E404FN ,5V ECL Quad Differential AND/NAND
MC10E404FN ,5V ECL Quad Differential AND/NAND
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MC10E404FN
QUAD DIFFERENTIAL AND/NAND
LOGIC DIAGRAM
D3a D3a D3b D3b VCCO Q3 Q3
VCC
D1a D1a D0b
D2b
D2b
D2a
VEE
D2a
D1b
D1b
D0b D0a D0a VCCO
D0a
D0a
D0b
D0b
D1a
D1a
D1b
D1b
D2a
D2a
D2b
D2b
D3a
D3a
D3b
D3b
* All VCC and VCCO pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
-
The MC10E404/100E404 is a 4-bit differential AND/NAND device. The
differential operation of the device makes it ideal for pulse shaping
applications where duty cycle skew is critical. Special design techniques
were incorporated to minimize the skew between the upper and lower
level gate inputs.
Because a negative 2-input NAND function is equivalent to a 2-input
OR function, the differential inputs and outputs of the device also allow for
its use as a fully differential 2 input OR/NOR function.
The output RISE/FALL times of this device are significantly faster than
most other standard ECLinPS devices resulting in an increased
bandwidth.
The differential inputs have clamp structures which will force the Q
output of a gate in an open input condition to go to a LOW state. Thus,
inputs of unused gates can be left open and will not affect the operation of
the rest of the device. Note that the input clamp will take affect only if both
inputs fall 2.5V below VCC. Differential D and Q 700ps Max. Propagation Delay High Frequency Outputs Extended 100E VEE Range of – 4.2V to – 5.46V Internal 75kΩ Input Pulldown Resistors
PIN NAMES
FUNCTION TABLE
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