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MC10192FN-MC10192L-MC10192P
Quad Bus Driver
SEMICONDUCTOR TECHNICAL DATA -
The MC10192 contains four line drivers with complementary outputs. Each
driver has a Data (D) input and shares an Enable (E) input with another driver.
The two driver outputs are the uncommitted collectors of a pair of NPN
transistors operating as a current switch. Each driver accepts 10K MECL input
signals and provides a nominal signal swing of 800 mV across a 50 Ω load at
each output collector. Outputs can drive higher values of load resistance,
provided that the combination of IR drop and load return voltage VLR does not
cause an output collector to go more negative than –2.4 V with respect to VCC.
To avoid output transistor breakdown, the load return voltage should not be
more positive than +5.5 V with respect to VCC. When the E input is high, both
output transistors of a driver are nonconducting. When not used, the E inputs,
as well as the D inputs, may be left open.
Open Collector Outputs Drive Terminated Lines or
Transformers
50 kΩ Input Pulldown Resistors on All Inputs (Unused
Inputs May Be Left Open)
Power Dissipation= 575 mW typ/pkg (No Load)
Propagation Delay= 3.5 ns typ (E — Output)
3.0 ns typ (D — Output)
LOGIC DIAGRAMVCC = PIN 16
VEE = PIN 87
TRUTH TABLE
Note: Unused outputs must be terminated
to VCC for proper operation.
DIP
PIN ASSIGNMENTVEE
VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
