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Partno	Mfg	Dc	Qty	Available	Descript
MC10158L	MOTO	N/a	39	avai	Quad 2-Input Multiplexer(Non-Inverting)
MC10158P	MOTO	N/a	1500	avai	Quad 2-Input Multiplexer(Non-Inverting)

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MC10158L-MC10158P
Quad 2-Input Multiplexer(Non-Inverting)
LOGIC DIAGRAM
VCC = PIN 16
VEE = PIN 8
SE-
LECT 9
D01 5
D00 6
D11 3
D10 4
D21 12
D20 13
D31 10
D30 11
1 Q0
2 Q1
15 Q2
14 Q3
SEMICONDUCTOR TECHNICAL DATA !
The MC10158 is a quad two channel multiplexer. A common select
input determines which data inputs are enabled. A high (H) level enables
data inputs D00, D10, D20, and D30 and a low (L) level enables data
inputs D01, D11, D21, and D31.= 197 mW typ/pkg (No Load)
tpd= 2.5 ns typ (Data to Q)
3.2 ns typ (Select to Q)
tr, tf= 2.5 ns typ (20%–80%)
TRUTH TABLE
DIP
PIN ASSIGNMENT
D11
D10
D01
D00
N C
VEE
VCC
D20
D21
D30
D31
SELECT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–36 of the Motorola MECL Data
Book (DL122/D).

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