MC10110P ,Dual 3-Input/3-Ouput OR GateELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10110P ,Dual 3-Input/3-Ouput OR Gate**SEMICONDUCTOR TECHNICAL DATA* *The MC10110 is designed to drive up to three transmission lines s ..
MC10111L ,Dual 3-Input/3-Output NOR GateLOGIC DIAGRAM DIPPIN ASSIGNMENT23546 V V1 16CC1 CC27A V2 1512 OUT CC113B9 A 3 14OUTOUT141011A 4 13 ..
MC10111P ,Dual 3-Input/3-Output NOR GateELECTRICAL CHARACTERISTICSTest LimitsPi Pin–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10111P ,Dual 3-Input/3-Output NOR GateLOGIC DIAGRAM DIPPIN ASSIGNMENT23546 V V1 16CC1 CC27A V2 1512 OUT CC113B9 A 3 14OUTOUT141011A 4 13 ..
MC10113FN ,Quad Exclusive OR GateELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC33269T-3.3G , 800 mA, Adjustable Output, Low Dropout Voltage Regulator
MC33269T-33 ,800 mA LOW DROPOUT THREE-TERMINAL VOLTAGE REGULATORSMAXIMUM RATINGSRating Symbol Value UnitPower Supply Input Voltage V 20 VinPower DissipationCase 369 ..
MC33272 ,HIGH PERFORMANCE OPERATIONAL AMPLIFIERSOrder this document by MC33272A/D* " * * * ! *HIGH PERFORMANCE**! * * ** **OPERATIONAL* ** *AMPLI ..
MC33272AD ,HIGH PERFORMANCE OPERATIONAL AMPLIFIERSOrder this document by MC33272A/D* " * * * ! *HIGH PERFORMANCE**! * * ** **OPERATIONAL* ** *AMPLI ..
MC33272ADR2 ,Single Supply, High Slew Rate, Low Input Offset Voltage, Dual Op AmpMAXIMUM RATINGSRating Symbol Value UnitSupply Voltage V to V +36 VCC EEInput Differential Voltage R ..
MC33272ADR2G , Single Supply, High Slew Rate, Low Input Offset Voltage Operational Amplifiers
MC10110L-MC10110P
Dual 3-Input/3-Ouput OR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10110 is designed to drive up to three transmission lines simul–
taneously. The multiple outputs of this device also allow the wire “OR”–ing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines from a single point makes the
MC10110 particularly useful in clock distribution applications where minimum
clock skew is desired. Three VCC pins are provided and each one should be
used. = 80 mW typ/pkg (No Load)
tpd = 2.4 ns typ (All Outputs Loaded)
tr, tf = 2.2 ns typ (20%–80%)
LOGIC DIAGRAMVCC1 = PIN 1, 15
VCC2 = PIN 16
VEE = PIN 811109765
DIP
PIN ASSIGNMENTVCC1
AOUT
AOUT
AOUT
AIN
AIN
AIN
VEE
VCC2
VCC1
BOUT
BOUT
BOUT
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–36 of the Motorola MECL Data
Book (DL122/D).
