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Partno	Mfg	Dc	Qty	Available	Descript
MC10104FN	MOT	N/a	76	avai	Quad 2-Input AND Gate
MC10104L	MOT	N/a	2980	avai	Quad 2-Input AND Gate
MC10104P		N/a	9	avai	Quad 2-Input AND Gate

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MC10104FN-MC10104L-MC10104P
Quad 2-Input AND Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10104 is a quad 2–input AND gate. One of the gates has both
AND/NAND outputs available. = 35 mW typ/gate (No Load)
tpd = 2.7 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE = PIN 875
DIP
PIN ASSIGNMENT
VCC1
AOUT
BOUT
AIN
AIN
BIN
BIN
VEE
VCC2
DOUT
COUT
DIN
DIN
CIN
CIN
DOUT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).

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