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MC100LVEL17DMOTOROLAN/a20avai3.3V ECL Quad Differential Receiver


MC100LVEL17D ,3.3V ECL Quad Differential Receiver2MC100LVEL17LVPECL DC CHARACTERISTICS V = 3.3 V; V = 0.0 V (Note 1.)CC EE–40°C 25°C 85°CSymbol Char ..
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MC100LVEL29 ,3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset2MC100LVEL29LVPECL DC CHARACTERISTICS V = 3.3 V; V = 0.0 V (Note 1.)CC EE–40°C 25°C 85°CSymbol Char ..
MC100LVEL29DW ,3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Resetfeatures fully differential Data and Clock inputs as well as outputs. TheMC100EL29 is pin and funct ..
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MC33178D ,HIGH OUTPUT CURRENT LOW POWER, LOW NOISE OPERATIONAL AMPLIFIERSOrder this document by MC33178/D** * ** * * * ** * * *HIGH OUTPUT CURRENTThe MC33178/9 series i ..
MC33178DG , Low Power, Low Noise Operational Amplifiers
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MC33178DR2 ,Low Power, Low Noise Dual Operational AmplifierMAXIMUM RATINGSRating Symbol Value UnitSupply Voltage (V to V V +36 VCC EE) SInput Differential Vol ..
MC33178P ,Low Power, Low Noise Dual Operational AmplifierOrder this document by MC33178/D** * ** * * * ** * * *HIGH OUTPUT CURRENTThe MC33178/9 series i ..


MC100LVEL17D
3.3V ECL Quad Differential Receiver
MC100LVEL17
3.3V�ECL Quad Differential
Receiver
The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The
device is functionally equivalent to the E116 device with the capability
of operation from either a –3.3 V or +3.3 V supply voltage.
Under open input conditions, the D input will be biased at VCC/2
and the D input will be pulled down to VEE. This operation will force
the Q output LOW and ensure stability.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 �F capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open. 325 ps Propagation Delay High Bandwidth Output Transitions ESD Protection: >2 KV HBM The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC= 3.0 V to 3.8 V
with VEE = 0 V NECL Mode Operating Range: VCC= 0 V
with VEE = –3.0 V to –3.8 V Internal Input Pulldown Resistors Q Output will Default LOW with Inputs Open or at VEE Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34 Transistor Count = 141 devices
http://
MARKING
DIAGRAM*
= Assembly Location = Wafer Lot = Year = Work Week
SO–20
DW SUFFIX
CASE 751D

ORDERING INFORMATION

*For additional information, see Application Note
AND8002/D
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