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MC100H605
REG Hex ECL/TTL Translator
MC10H605, MC100H605
Registered Hex ECL to TTL
Translator
The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL
translator. The device features differential ECL inputs for both data
and clock. The TTL outputs feature balanced 24 mA sink/source
capabilities for driving transmission lines.
With its differential ECL inputs and TTL outputs the H605 device is
ideally suited for the receive function of a HPPI bus type
board−to−board interface application. The on chip registers simplify
the task of synchronizing the data between the two boards.
A VBB reference voltage is supplied for use with single−ended data
or clock. For single−ended applications the VBB output should be
connected to the “bar” inputs (Dn or CLK) and bypassed to ground via
a 0.01 �F capacitor. To minimize the skew of the device differential
clocks should be used.
The ECL level Master Reset pin is asynchronous and common to all
flip−flops. A “HIGH” on the Master Reset forces the Q outputs
“LOW”.
The device is available in either ECL standard: the 10H device is
compatible with MECL 10H logic levels while the 100H device is
compatible with 100K logic levels. Differential ECL Data and Clock Inputs 24 mA Sink, 24 mA Source TTL Outputs Dual Power Supply Multiple Power and Ground Pins to Minimize Noise 2.0 ns Part−to−Part Skew
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ORDERING INFORMATION
MARKING
DIAGRAM = Assembly Location = Wafer Lot = Year = Work Week
PLCC−28
FN SUFFIX
CASE 776
