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MC100EPT622FAR2ONN/a3920avai3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator


MC100EPT622FAR2 ,3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator2VD5 CCOD6 Q0D7 Q1D8 Q2VD9 CCOENTTL Q3Q4ENPECLVV CCOEEMC100EPT622TTL INPUT DC CHARACTERISTICS V = 3 ..
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MC100EPT622FAR2
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
MC100EPT622
3.3V�LVTTL/L VCMOS to
LVPECL T ranslator
The MC100EPT622 is a 10- Bit LVTTL/LVCMOS to LVPECL
translator. Because L VPECL (Positive ECL) levels are used only +3.3 V
and ground are required. The device has an OR-ed enable input which
can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs
(ENTTL). If the inputs are left open, they will default to the enable state.
The device design has been optimized for low channel-to-channel skew 450 ps Typical Propagation Delay Maximum Frequency > 1.5 GHz Typical PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V PNP LVTTL Inputs for Minimal Loading Q Output Will Default HIGH with Inputs Open The 100 Series Contains Temperature Compensation. Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9
ENTTL
ENPECL
LVCMOS/TTL LVPECL
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