MC100EP52DT ,3.3V / 5V ECL Differential Data and Clock D Flip-FlopMaximum ratings applied to the device are individual stress limitvalues (not normal operating condi ..
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MC33079DR2 ,Low Noise Quad Operational AmplifierMAXIMUM RATINGSRating Symbol Value UnitSupply Voltage (V to V V +36 VCC EE) SInput Differential Vol ..
MC33079DT ,LOW NOISE QUAD BIPOLAR OP-AMPSMC33079LOW NOISE QUAD OPERATIONAL AMPLIFIER ■ LOW VOLTAGE NOISE: 4.5nV/√Hz ■ HIGH GAIN BANDWI ..
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MC33079N ,LOW NOISE QUAD BIPOLAR OP-AMPSABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage ±18 or +36 VCC1)V±30 Vid ..
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MC100EP52DT-MC10EP52DT
3.3V / 5V ECL Differential Data and Clock D Flip-Flop
MC10EP52, MC100EP52
3.3V / 5V�ECL Differential
Data and Clock D Flip-Flop
The MC10EP/100EP52 is a differential data, differential clock D
flip−flop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flip−flop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to VEE) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation. 330 ps Typical Propagation Delay Maximum Frequency � 4 GHz Typical PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode: VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Safety Clamp on Inputs Q Output Will Default LOW with Inputs Open or at VEE
