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MC100EL14DONN/a19avai5V ECL 1:5 Clock Distribution Chip


MC100EL14D ,5V ECL 1:5 Clock Distribution Chip2MC100EL14100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)CC EE–40°C 25°C 85°CSy ..
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MC100EL14D
5V ECL 1:5 Clock Distribution Chip
MC100EL14
5V�ECL 1:5 Clock
Distribution Chip
The MC100EL14 is a low skew 1:5 clock distribution chip designed
explicitly for low skew clock distribution applications. The VBB pin, an
internally generated voltage supply, is available to this device only.
For single-ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also
rebias AC coupled inputs. When used, decouple VBB and VCC via a
0.01 �F capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, VBB should be left open.
The EL14 features a multiplexed clock input to allow for the
distribution of a lower speed scan or test clock along with the high speed
system clock. When LOW (or left open and pulled LOW by the input
pulldown resistor) the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the outputs will only
be enabled/disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock,
therefore all associated specification limits are referenced to the
negative edge of the clock input. 50 ps Output-to-Output Skew Synchronous Enable/Disable Multiplexed Clock Input ESD Protection: > 2 KV HBM, > 200 V MM The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V NECL Mode Operating Range: VCC = 0 V
with VEE = –4.2 V to –5.7 V Internal Input Pulldown Resistors on CLK, SCLK, SEL, and EN. Q Output will Default LOW with Inputs Open or at VEE Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 code V–0 @ 1/8″,
Oxygen Index 28 to 34 Transistor Count = 303 devices
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ORDERING INFORMATION
MARKING
DIAGRAM
= Assembly Location = Wafer Lot = Year = Work Week
SO–20
DW SUFFIX
CASE 751D

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