MAX9685CPE ,Ultra-Fast ECL-Output Comparator with Latch EnableFeaturesThe MAX9685 is an ultra-fast ECL comparator manufac-' 1.3ns Propagation Delaytured with a h ..
MAX9685CSE ,Ultra-Fast ECL-Output Comparator with Latch EnableELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5.2V, RL = 50Ω, VT = -2V, TA = +25°C, unless otherwise n ..
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MAX9685CPE-MAX9685CSE
Ultra-Fast ECL-Output Comparator with Latch Enable
_______________General DescriptionThe MAX9685 is an ultra-fast ECL comparator manufac-
tured with a high-frequency bipolar process (fT= 6GHz)
capable of very short propagation delays. This design
maintains the excellent DC matching characteristics nor-
mally found only in slower comparators.
The device is pin-compatible with the AD9685 and
Am6685, but exceeds their AC characteristics.
The MAX9685 has differential inputs and complemen-
tary outputs that are fully compatible with ECL-logic lev-
els. Output current levels are capable of driving 50Ω
terminated transmission lines. The ultra-fast operation
makes signal processing possible at frequencies in
excess of 600MHz.
A latch-enable (LE)function is provided to allow the
comparator to be used in a sample-hold mode. When
LE is ECL high, the comparator functions normally.
When LE is driven ECL low, the outputs are forced to an
unambiguous ECL-logic state, dependent on the input
conditions at the time of the latch input transition. If the
latch-enable function is not used, the LE pin must be
connected to ground.
________________________ApplicationsHigh-Speed A/D Converters
High-Speed Line Receivers
Peak Detectors
Threshold Detectors
High-Speed Triggers
____________________________Features1.3ns Propagation Delay0.5ns Latch Setup Time+5V, -5.2V Power SuppliesPin-Compatible with AD9685, Am6685Available in Commercial, Extended-Industrial,
and Military Temperature RangesAvailable in Narrow SO Package
______________Ordering Information* Contact factory for availability of 20-pin PLCC.
** Contact factory for dice specifications.
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
________________________________________________________________Maxim Integrated Products1
__________________________________________________________Pin Configurations
Call toll free 1-800-998-8800 for free samples or literature.19-2398; Rev 1; 7/93
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable_______________________________________________________________________________________Supply Voltages.....................................................................±6V
Output Short-Circuit Duration .......................................Indefinite
Input Voltages........................................................................±5V
Differential Input Voltages.....................................................7.0V
Output Current....................................................................30mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C)..........842mW
Narrow SO (derate 8.70mW/°C above +70°C)............696mW
CERDIP (derate 10.00mW/°C above +70°C)...............800mW
TO-100 (derate 6.67mW/°C above +70°C)..................533mW
Operating Temperature Ranges
MAX9685C__.....................................................0°C to +70°C
MAX9685E__..................................................-40°C to +85°C
MAX9685M__................................................-55°C to +125°C
Storage Temperature Range.............................-55°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5.2V, RL= 50Ω, VT= -2V, TA = +25°C, unless otherwise noted.)
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
_______________________________________________________________________________________3
Note 1:Not tested, guaranteed by design.
Note 2:VIN= 100mV, VOD= 10mV
SWITCHING CHARACTERISTICS(V+ = 5V, V- = -5.2V, RL= 50Ω, VT= -2V, TA = +25°C, unless otherwise noted.)
__________Applications Information
LayoutBecause of the MAX9685’s large gain-bandwidth char-
acteristic, special precautions need to be taken if its
high-speed capabilities are to be used. A PC board
with a ground plane is mandatory. Mount all decou-
pling capacitors as close to the power-supply pins as
possible, and process the ECL outputs in microstrip
fashion, consistent with the load termination of 50Ωto
120Ω. For low-impedance applications, microstrip lay-
out at the input may also be helpful. Pay close atten-
tion to the bandwidth of the decoupling and terminating
components. Chip components can be used to mini-
mize lead inductance. An unused LE pin must be con-
nected to ground.
Input Slew-Rate RequirementsAs with all high-speed comparators, the high gain-
bandwidth product of these devices creates oscillation
problems when the input traverses through the linear
region. For clean switching without oscillation or steps
in the output waveform, the input must meet certain
minimum slew-rate requirements. The tendency of the
part to oscillate is a function of the layout and source
impedance of the circuit employed. Poor layout and
larger source impedance will increase the minimum
slew-rate requirement.
Figure 1 shows a high-speed receiver application with
50Ωinput and output termination. With this configura-
tion, in which a ground plane and microstrip PC board
were used, the minimum slew rate for clean output
switching is 1.6V/µs. Sine-wave inputs imply a mini-
mum signal size of 360mVRMSat 500kHz and
90mVRMSat 4MHz.
In many applications, the addition of regenerative feed-
back will assist the input signal through the linear
region, which will lower the minimum slew-rate require-
ment considerably. For example, with the addition of
positive feedback components Rf= 1kΩand Cf=
10pF, the minimum slew-rate requirement can be
reduced by a factor of four.
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable_______________________________________________________________________________________The timing diagram (Figure 3) illustrates the series of
events that complete the compare function, under
worst-case conditions.
The top line of the diagram illustrates two latch-enable
pulses. Each pulse is high for the compare function
and low for the latch function. The first pulse demon-
strates the compare function; part of the input action
takes place during the compare mode. The second
pulse demonstrates a compare-function interval during
which there is no change in the input.
The leading edge of the input signal (illustrated as a
large-amplitude, small-overdrive pulse) switches the
comparator after time interval tpd. Output Q and Q
transistors are similar in timing. The input signal must
occur at time tsbefore the latch falling edge, and it
must be maintained for time thafter the edge to be
acquired. After th, the output is no longer affected by
the input status until the latch is again strobed. A mini-
mum latch pulse width of tpw(E) is needed for the
strobe operation, and the output transitions occur after
a time tpd(E).
Definition of TermsVOSInput Offset Voltage—The voltage required
between the input terminals to obtain 0V dif-
ferential at the output.
VINInput Voltage Pulse Amplitude
VODInput Voltage Overdrive
tpd+Input to Output High Delay—The propagation
delay measured from the time the input signal
crosses the input offset voltage to the 50%
point of an output low-to-high transition.
tpd-Input to Output Low Delay—The propagation
delay measured from the time the input signal
crosses the input offset voltage to the 50%
point of an output high-to-low transition.
tpd+(E)Latch-Enable to Output High Delay—The
propagation delay measured from the 50%
point of the latch-enable signal low-to-high
transition to the 50% point of an output low-to-
high transition.
tpd-(E)Latch-Enable to Output Low Delay—The
propagation delay measured from the 50%
point of the latch-enable signal low-to-high
transition to the 50% point of an output high-
to-low transition.
tpw(E)Minimum Latch-Enable Pulse Width—The
minimum time the latch-enable signal must be
high to acquire and hold an input signal.Minimum Setup Time—The minimum time
before the negative transition of the latch-
enable pulse that an input signal must be pre-
sent to be acquired and held at the outputs.Minimum Hold Time—The minimum time after
the negative transition of the latch-enable signal
that an input signal must remain unchanged to
be acquired and held at the output.
Figure 2. As a high-speed receiver, the MAX9685 is capable
of processing signals in excess of 600MHz. Figure 2 is a
100MHz example with an input signal level of 14mVRMS.
Figure 1. Regenerative Feedback. High-speed receiver with
50Winput and output termination.
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
_______________________________________________________________________________________5Figure 3. Timing Diagram
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable_______________________________________________________________________________________
________________________________________________________Package Information
