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MAX9491ETP045+-MAX9491ETP045+T-MAX9491ETP095+
Factory-Programmable, Single PLL Clock Generator
General DescriptionThe MAX9491 multipurpose clock generator is ideal for
communication applications. It offers a factory-program-
mable PLL output that can be set to almost any frequency,
ranging from 4MHz to 200MHz. The MAX9491 uses a
one-time-programmable (OTP) ROM to program the PLL
output. The MAX9491 also features an integrated volt-
age-controlled crystal oscillator (VCXO) that is tuned by a
DC voltage. The VCXO output is used as the PLL input.
The VCXO has a wide ±200ppm (typ) tuning range. The
OTP on the MAX9491 is factory preset, based upon the
customer request. Contact the factory for samples with
preferred frequencies.
The device operates from a 3.3V supply and is speci-
fied over the -40°C to +85°C extended temperature
range. The MAX9491 is available in 14-pin TSSOP and
20-pin TQFN (5mm x 5mm) packages.
ApplicationsTelecommunications
Data Networking Systems
Home Entertainment Centers
SOHO
Features5MHz to 35MHz for Crystal-Clock Reference5MHz to 50MHz for a Driver Clock ReferenceOne Fractional-N PLL with Buffered Output4MHz to 200MHz Output Frequency RangeLow RMS Jitter PLL (< 13ps) at 197 MHzIntegrated VCXO with ±200ppm Tuning RangeAvailable in 14-Pin TSSOP and 20-Pin TQFN
Packages+3.3V Supply-40°C to +85°C Temperature Range
MAX9491
Factory-Programmable, Single PLL
Clock Generator141312I.C.V
GND
I.C.
I.C.
I.C.
GND
I.C.
I.C.
VDDI.C.34
TUNE
DDA
AGND
GND
CLK_OUT
MAX9491
TOP VIEW
TQFN (5mm x 5mm)
Pin Configurations19-3942; Rev 0; 1/06
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODEMAX9491ETP-40°C to +85°C20 TQFN-EP**T2055-5
MAX9491EUD*-40°C to +85°C14 TSSOPU14-2
Ordering Information*Future product—contact factory for availability.
**EP = Exposed pad.
VDD
GNDVDD
I.C.
I.C.
TOP VIEW
I.C.
GND
I.C.CLK_OUT
GND
TUNE
MAX9491
TSSOPMAX9491
Factory Programmable Single PLL
Clock Generator
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VDD= VDDA= +3.0V to +3.6V and TA= -40°C to +85°C. Typical values at VDD= VDDA= 3.3V, TA= +25°C, unless otherwise noted.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.3V to +4.0V
VDDAto AGND......................................................-0.3V to +4.0V
All Other Pins to GND ..................................-0.3V to VDD+ 0.3V
Short-Circuit Duration
(all LVCMOS outputs)..............................................Continuous
ESD Protection (Human Body Model)..................................±2kV
Continuous Power Dissipation (TA= +70°C)
20-Lead TQFN (derate 21.3mW/°C above +70°C)....2758mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C)......796.8mW
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Operating Temperature Range...........................-40°C to +85°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LVCMOS INPUTS (PD, X1 as a reference INPUT CLK)Input High LevelVIH2.0VDDV
Input Low LevelVIL00.8V
High-Level Input CurrentIIHVIN = VDD20µA
Low-Level Input CurrentIILVIN = 0-20µA
CLOCK OUTPUT (CLK_OUT)Output High LevelVOHIOH = -4mAVDD -
0.6V
Output Low LevelVOLIOL = 4mA0.4V
POWER SUPPLIESDigital Power-Supply VoltageVDD3.03.6V
Analog Power-Supply VoltageVDDA3.03.6V
Total Current for Digital and
Analog SuppliesIDCfOUT = 45MHz, no load
fIN = 13MHz10mA
Power-Down CurrentIDC2PD = low60µA
MAX9491
Factory Programmable Single PLL
Clock Generator
AC ELECTRICAL CHARACTERISTICS(VDD= VDDA= +3.0V to +3.6V, CL= 10pF and TA= -40°C to +85°C. Typical values are at VDD= VDDA= 3.3V, TA= +25°C, unless
otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OUTPUT CLOCK (CLK_OUT)Minimum Frequency RangefIN = 5MHz to 50MHz4
Maximum Frequency RangefOUTCL < 5pF133200MHz
Clock Rise TimetR20% to 80% of VDD, fOUT = 80MHz,
fIN = 13MHz1.5ns
Clock Fall TimetF80% to 20% of VDD, fOUT = 80MHz,
fIN = 13MHz1.3ns
Duty CyclefOUT = 45MHz, fIN = 13MHz445056%
fOUT = 45MHz, fIN = 13MHz14
fOUT = 80MHz, fIN = 13MHz22Output Period JitterJP
fOUT = 197MHz, fIN = 13MHz13
RMS
Soft Power-On TimetPO2PD from low to high, fOUT = 45MHz,
fIN = 13MHz, see Figure 21ms
Hard Power-On TimetPO1See Figure 215ms
VCXO CLOCKCrystal FrequencyfXTL27MHz
Crystal Accuracy±30ppm
Tuning Voltage RangeVTUNE03V
VCXO Tuning RangeVTUNE = 0 to 3V, C1 = C2 = 4pF±150±200ppm
TUNE Input ImpedanceZTUNE95kΩ
Output CLK AccuracyVTUNE = 1.5V, C1 = C2 = 4pF±50ppm
Note 1:All parameters are tested at TA= +25°C. Specifications over temperature are guaranteed by design and characterization.
Note 2:Guaranteed by design and characterization; limits are set at ±6 sigma.
MAX9491
Factory Programmable Single PLL
Clock GeneratorSUPPLY CURRENT vs. TEMPERATURE
MAX9491 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
fIN = 13MHz
fOUT = 45MHz
RISE TIME vs. TEMPERATURE
MAX9491 toc02
TEMPERATURE (°C)
RISE TIME (ns)
fIN = 13MHz
fOUT = 45MHz
FALL TIME vs. TEMPERATURE
MAX9491 toc03
TEMPERATURE (°C)
FALL TIME (ns)
fIN = 13MHz
fOUT = 45MHz
JITTER vs. TEMPERATURE
MAX9491 toc04
TEMPERATURE (°C)
JITTER (ps)
fIN = 13MHz
fOUT = 45MHz
JITTER vs. TEMPERATURE
MAX9491 toc05
TEMPERATURE (°C)
JITTER (ps)
fIN = 13MHz
fOUT = 80MHz
JITTER vs. TEMPERATURE
MAX9491 toc06
TEMPERATURE (°C)
JITTER (ps)
fIN = 27MHz
fOUT = 197MHz
TYPICAL CLK_OUT WAVEFORM AT 45MHzMAX9491 toc07
4ns/div
CLK1
1V/div
VDD = VDDA = 3.0V
TYPICAL CLK_OUT WAVEFORM AT 80MHzMAX9491 toc08
4ns/div
CLK1
1V/div
VDD = VDDA = 3.0V
TYPICAL CLK_OUT WAVEFORM AT 197MHzMAX9491 toc09
4ns/div
CLK1
1V/div
VDD = VDDA = 3.0V
Typical Operating Characteristics(VDD= VDDA= +3.3V, TA= +25°C, fIN= 13MHz clock, CL= 10pF, 27MHz, unless otherwise noted.)
MAX9491
Factory Programmable Single PLL
Clock GeneratorVCXO ACCURACY vs. VCXO TUNING RANGE
MAX9491 toc10
VCXO TUNING RANGE (V)
VCXO ACCURACY (PP/M)1.01.50.52.02.53.0
fIN = 27MHz
fOUT = 45MHz6pF
4pF
5pF
DUTY CYCLE vs. OUTPUT FREQUENCY
MAX9491 toc11
FREQUENCY (MHz)
DUTY CYCLE (%)
fIN = 13MHz
45MHz OUTPUTMAX9491 toc12
10dB/REF = 0dBm
RBW = 3kHz
VBW = 3kHz
ATN = 20dB
CENTER = 45MHz
SPAN = 2MHz
80MHz OUTPUTMAX9491 toc13
10dB/REF = 0dBm
RBW = 3kHz
VBW = 3kHz
ATN = 20dB
CENTER = 80MHz
SPAN = 2MHz
Typical Operating Characteristics (continued)(VDD= VDDA= +3.3V, TA= +25°C, fIN= 13MHz clock, CL= 10pF, 27MHz, unless otherwise noted.)
MAX9491
Factory Programmable Single PLL
Clock Generator
Detailed DescriptionThe MAX9491 features a programmable fractional-N
PLL, so frequencies between 4MHz to 200MHz can be
generated. The device provides a buffered PLL clock
output. The crystal input frequency can be between
5MHz and 35MHz, and the clock input between 5MHz
and 50MHz. The internal VCXO has a fine-tuning range
of ±200ppm.
Power-DownDriving PDlow places the MAX9491 in power-down
mode. PDthen sets CLK_OUT to high impedance and
shuts down the PLL. CLK_OUT has an 80kΩ(typ) inter-
nal pulldown resistor.
Voltage-Controlled Crystal Oscillator
(VCXO)The MAX9491’s internal VCXO produces a reference
clock for the PLL used to generate the CLK_OUT. The
oscillator uses a crystal as the base frequency refer-
ence and has a voltage-controlled tuning input for micro
adjustment in a ±200ppm range. The tuning voltage,
VTUNE, can vary from 0 to 3V as shown in Figure 1. The
crystal should be AT-cut and oscillate on its fundamen-
Pin Description
Typical Operating Circuit/Block Diagram+3.3V
VDDVDDA
VDD
VDD
0.1μF x 30.1μF
MAX9491
+3.3V
GND
AGND
TUNE
CLK_OUT
PLL
VCXO
OR REFERENCE
INPUT
OTPPD
PIN
TQFNTSSOPNAMEFUNCTION5TUNEVCXO Tune Voltage Input. If using a reference clock input or VCXO is not used,
connect TUNE to VDD.VDDAAnalog Power Supply. Bypass to GND with a 0.1µF capacitor.—AGNDAnalog Ground
4, 10, 116, 9, 11GNDGround7CLK_OUTOutput Clock. Internally pulled down.
6–9, 14, 19, 202, 3, 8, 10I.C.Internally Connected. Leave unconnected for normal operation.
12, 13, 164, 12VDDPower Supply. Bypass to GND with a 0.1µF capacitor.13PDActive-Low Power-Down Input. Pull high for normal operation. Drive PD low to place
MAX9491 in power-down mode. Internally pulled down.14X2Crystal Connection 2. Leave unconnected if using a reference clock.1X1Crystal Connection 1 or Reference Clock Input—EPExposed Paddle (TQFN Only). Connect EP to GND or leave unconnected.
