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MAX9394EHJ
2:1 Multiplexers and 1:2 Demultiplexers with Loopback
General DescriptionThe MAX9394/MAX9395 consist of a 2:1 multiplexer
and a 1:2 demultiplexer with loopback. The multiplexer
section (channel B) accepts two low-voltage differential
signaling (LVDS) inputs and generates a single LVDS
output. The demultiplexer section (channel A) accepts
a single LVDS input and generates two parallel LVDS
outputs. The MAX9394/MAX9395 feature a loopback
mode that connects the input of channel A to the output
of channel B and connects the selected input of chan-
nel B to the outputs of channel A.
Three LVCMOS/LVTTL logic inputs control the internal
connections between inputs and outputs, one for the
multiplexer portion of channel B (BSEL), and the other
two for loopback control of channels A and B (LB_SELA
and LB_SELB). Independent enable inputs for each dif-
ferential output pair provide additional flexibility.
Fail-safe circuitry forces the outputs to a differential low
condition for undriven inputs or when the common-
mode voltage exceeds the specified range. The
MAX9394 provides high-level input fail-safe detection
for HSTL, LVDS, and other GND-referenced differential
inputs. The MAX9395 provides low-level fail-safe detec-
tion for CML, LVPECL, and other VCC-referenced differ-
ential inputs.
Ultra low 91psP-P(max) pseudorandom bit sequence
(PRBS) jitter ensures reliable communications in high-
speed links that are highly sensitive to timing error,
especially those incorporating clock-and-data recovery,
or serializers and deserializers. The high-speed switch-
ing performance guarantees 1.5GHz operation and less
than 87ps (max) skew between channels.
LVDS inputs and outputs are compatible with the
TIA/EIA-644 LVDS standard. The LVDS outputs drive
100Ωloads. The MAX9394/MAX9395 are offered in 32-
pin TQFP and 28-pin thin QFN packages and operate
over the extended temperature range (-40°C to +85°C).
ApplicationsHigh-Speed Telecom/Datacom Equipment
Central Office Backplane Clock Distribution
DSLAM
Protection Switching
Fault-Tolerant Systems
FeaturesGuaranteed 1.5GHz Operation with 250mV
Differential Output SwingSimultaneous Loopback Control2ps(RMS)(max) Random JitterAC Specifications Guaranteed for 150mV
Differential InputSignal Inputs Accept Any Differential Signaling
StandardLVDS Outputs for Clock or High-Speed DataHigh-Level Input Fail-Safe Detection (MAX9394)Low-Level Input Fail-Safe Detection (MAX9395)+3.0V to +3.6V Supply Voltage RangeLVCMOS/LVTTL Logic Inputs
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
Ordering Informationypical Operating Circuit19-2878; Rev 0; 7/03
*Future product—contact factory for availability.
Pin Configurations and Functional Diagram appear at end
of data sheet.
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.1V
IN_ _, IN_ _, OUT_ _, OUT_ _, EN_ _, _SEL, LB_SEL_
to GND........................................................-0.3V to (VCC+ 0.3V)
IN_ _ to IN_ _..........................................................................±3V
Short-Circuit Duration (OUT_ _, OUT_ _)...................Continuous
Continuous Power Dissipation (TA= +70°C)
32-Pin TQFP (derate 13.1mW/°C above +70°C)........1047mW
28-Pin 5mm x 5mm Thin QFN
(derate 20.8mW/°C above +70°C).............................1667mW
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin TQFP............................................................+76.4°C/W
28-Pin 5mm x 5mm Thin QFN....................................+48°C/W
Junction-to-Case Thermal Resistance
28-Pin 5mm x 5mm Thin QFN......................................+2°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection (Human Body Model)
(IN_ _, IN_ _, OUT_ _, OUT_ _, EN_ _, SEL_, LB_SEL_)..±2kV
Soldering Temperature (10s)...........................................+300°C
DC ELECTRICAL CHARACTERISTICS(VCC= +3.0V to +3.6V, RL= 100Ω±1%, EN_ _ = VCC, VCM= +0.05V to (VCC- 0.6V) (MAX9394), VCM= +0.06V to (VCC- 0.05V)
(MAX9395), TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, |VID| = 0.2V, VCM= +1.2V, TA= +25°C.)
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
Note 1:Measurements obtained with the device in thermal equilibrium. All voltages referenced to GND except VID, VOD, and ∆VOD.
Note 2:Current into the device defined as positive. Current out of the device defined as negative.
Note 3:DC parameters production tested at TA= +25°C and guaranteed by design and characterization for TA= -40°C to +85°C.
Note 4:Current through either output.
Note 5:Guaranteed by design and characterization. Limits set at ±6 sigma.
Note 6:tSKEWis the magnitude difference of differential propagation delays for the same output over the same condtions. tSKEW=
|tPHL- tPLH|.
Note 7:Measured between outputs of the same device at the signal crossing points for a same-edge transition under the same con-
ditions. Does not apply to loopback mode.
Note 8:Device jitter added to the differential input signal.
DC ELECTRICAL CHARACTERISTICS (continued)(VCC= +3.0V to +3.6V, RL= 100Ω±1%, EN_ _ = VCC, VCM= +0.05V to (VCC- 0.6V) (MAX9394), VCM= +0.06V to (VCC- 0.05V)
(MAX9395), TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, |VID| = 0.2V, VCM= +1.2V, TA= +25°C.)
(Notes 1, 2, and 3)
AC ELECTRICAL CHARACTERISTICS(VCC= +3.0V to +3.6V, fIN< 1.34GHz, tR_IN= tF_IN= 125ps, RL= 100Ω±1%, |VID| ≥150mV, VCM= +0.075V to (VCC- 0.6V)
(MAX9394 only), VCM= +0.6V to (VCC- 0.075V) (MAX9395 only), EN_ _ = VCC, TA= -40°C to +85°C, unless otherwise noted. Typical
values are at VCC= +3.3V, |VID| = 0.2V, VCM= +1.2V, fIN= 1.34GHz, TA= +25°C.) (Note 5)
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
Typical Operating Characteristics(VCC= +3.3V, |VID| = 0.2V, VCM= +1.2V, TA= +25°C, fIN= 1.34GHz, Figure 5.)
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
MAX9394/MAX9395
Detailed DescriptionThe LVDS interface standard provides a signaling
method for point-to-point communication over a con-
trolled-impedance medium as defined by the ANSI
TIA/EIA-644 standard. LVDS utilizes a lower voltage
swing than other communication standards, achieving
higher data rates with reduced power consumption,
while reducing EMI emissions and system susceptibility
to noise.
The MAX9394/MAX9395 high-speed, low-power 2:1
multiplexers and 1:2 demultiplexers with loopback pro-
vide signal redundancy switching in telecom and stor-
age applications. These devices select one of two
remote signal sources for local input and buffer a single
local output signal to two remote receivers.
The multiplexer section (channel B) accepts two differen-
tial inputs and generates a single LVDS output. The
demultiplexer section (channel A) accepts a single differ-
ential input and generates two parallel LVDS outputs. The
MAX9394/MAX9395 feature a loopback mode that con-
nects the input of channel A to the output of channel B
and connects the selected input of channel B to the out-
puts of channel A. LB_SELA and LB_SELB provide inde-
pendent loopback control for each channel.
Three LVCMOS/LVTTL logic inputs control the internal
connections between inputs and outputs, one for the
multiplexer portion of channel B (BSEL), and the other
two for loopback control of channels A and B (LB_SELA
and LB_SELB). Independent enable inputs for each dif-
ferential output pair provide additional flexibility.
Input Fail-SafeThe differential inputs of the MAX9394/MAX9395 pos-
sess internal fail-safe protection. Fail-safe circuitry
forces the outputs to a differential-low condition for
undriven inputs or when the common-mode voltage
exceeds the specified range. The MAX9394 provides
high-level input fail-safe detection for LVDS, HSTL, and
other GND-referenced differential inputs. The MAX9395
provides low-level input fail-safe detection for LVPECL,
CML, and other VCC-referenced differential inputs.
Select FunctionBSEL selects the differential input pair to transmit
through OUTB (OUTB) for LB_SELB = GND or through
OUTA_ (OUTA_) for LB_SELA = VCC. LB_SEL_ controls
the loopback function for each channel. Connect
LB_SEL_ to GND to select the normal inputs for each
channel. Connect LB_SEL_ to VCCto enable the loop-
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
back function. The loopback function routes the input of
channel A to the output of channel B, and the inputs of
channel B to the outputs of channel A. See Tables 1
and 2 for a summary of the input/output routing
between channels.
Enable FunctionThe EN_ _ logic inputs enable and disable each set of
differential outputs. Connect EN_ 0 to VCCto enable the
OUT_0/OUT_0differential output pair. Connect EN_0 to
GND to disable the OUT_0/OUT_0differential output
pair. The differential output pairs assert to a differential
low condition when disabled.
Applications Information
Differential InputsThe MAX9394/MAX9395 inputs accept any differential
signaling standard within the specified common-mode
voltage range. The fail-safe feature detects common-
mode input signal levels and generates a differential
output low condition for undriven inputs or when the
common-mode voltage exceeds the specified range
(VCM≥VCC- 0.6V, MAX9394; VCM≤0.6V, MAX9395).
Leave unused inputs unconnected or connect to VCC
for the MAX9394 or to GND for the MAX9395.
Power-Supply BypassingBypass each VCCto GND with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors in parallel
as close to the device as possible. Install the 0.01µF
capacitor closest to the device.
Differential TracesInput and output trace characteristics affect the perfor-
mance of the MAX9394/MAX9395. Connect each input
and output to a 50Ωcharacteristic impedance trace.
Maintain the distance between differential traces and
eliminate sharp corners to avoid discontinuities in dif-
ferential impedance and maximize common-mode
noise immunity. Minimize the number of vias on the dif-
ferential input and output traces to prevent impedance
discontinuities. Reduce reflections by maintaining the
50Ωcharacteristic impedance through connectors and
across cables. Minimize skew by matching the electri-
cal length of the traces.
Output TerminationTerminate LVDS outputs with a 100Ωresistor between
the differential outputs at the receiver inputs. LVDS out-
puts require 100Ωtermination for proper operation.
Ensure that the output currents do not exceed the cur-
rent limits specified in the Absolute Maximum Ratings.
Observe the total thermal limits of the MAX9394/
MAX9395 under all operating conditions.
Cables and ConnectorsUse matched differential impedance for transmission
media. Use cables and connectors with matched differ-
ential impedance to minimize impedance discontinu-
ities. Avoid the use of unbalanced cables.
MAX9394/MAX9395
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
