MAX9325EQI ,+2.375 V to +3.8 V, 2:8 differential LVPECL/LVECL/HSTL clock and data driverApplicationsFunctional Diagram appears at end of data sheet.Precision Clock DistributionLow-Jitter ..
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MAX9325EQI
+2.375 V to +3.8 V, 2:8 differential LVPECL/LVECL/HSTL clock and data driver
General DescriptionThe MAX9325 low-skew, 2:8 differential driver features
extremely low output-to-output skew (50ps max) and
part-to-part skew (225ps max). These features make
the device ideal for clock and data distribution across a
backplane or board. The device selects one of the two
differential HSTL or LVECL/LVPECL inputs and repeats
them at eight differential outputs. Outputs are compati-
ble with LVECL and LVPECL, and can directly drive
50Ωterminated transmission lines.
The differential inputs can be configured to accept a
single-ended signal when the unused complementary
input is connected to the on-chip reference output volt-
age VBB. All inputs have internal pulldown resistors to
VEE. The internal pulldowns and a fail-safe circuit
ensure differential low default outputs when the inputs
are left open or at VEE.
The MAX9325 operates over a 2.375V to 3.8V supply
range for interfacing to differential HSTL and LVPECL
signals. This allows high-performance clock or data dis-
tribution in systems with a nominal +2.5V or +3.3V sup-
ply. For LVECL operation, the device operates with a
-2.375V to -3.8V supply.
The MAX9325 is offered in 28-lead PLCC and space-
saving 28-lead QFN packages. The MAX9325 is speci-
fied for operation from -40°C to +85°C.
ApplicationsPrecision Clock Distribution
Low-Jitter Data Repeaters
Features50ps (max) Output-to-Output Skew1.5psRMS(max) Random JitterGuaranteed 300mV Differential Output at 700MHz+2.375V to +3.8V Supplies for Differential
HSTL/LVPECL-2.375V to -3.8V Supplies for Differential LVECLTwo Selectable Differential InputsOn-Chip Reference for Single-Ended InputsOutputs Low for Inputs Open or at VEEPin Compatible with MC100LVE310
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
Pin Configurations
Ordering Information19-2511; Rev 3; 11/04
Functional Diagram appears at end of data sheet.
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to VCC - 2V. Typical values are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC- 1.5V).)
(Notes 1–4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC- VEE...............................................................-0.3V to +4.1V
Inputs (CLK_, CLK_,CLK_SEL) to VEE......-0.3V to (VCC + 0.3V)
CLK_ to CLK_.....................................................................±3.0V
Continuous Output Current.................................................50mA
Surge Output Current........................................................100mA
VBBSink/Source Current................................................±0.65mA
Continuous Power Dissipation (TA= +70°C)
28-Lead PLCC (derate 10.5mW/°C above +70°C).....842mW
θJAin Still Air.............................................................+95°C/W
θJC.............................................................................+25°C/W
28-Lead QFN (derate 20.8mW/°C above +70°C)....1667mW
θJAin Still Air............................................................+48°C/W
θJC..............................................................................+2°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (CLK_, CLK_, Q_, Q_)....................≥2kV
Soldering Temperature (10s)...........................................+300°C
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
DC ELECTRICAL CHARACTERISTICS (continued)((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to VCC - 2V. Typical values are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC- 1.5V).)
(Notes 1–4)
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
AC ELECTRICAL CHARACTERISTICS—PLCC Package((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to VCC - 2V, fIN≤500MHz, input transition time = 125ps (20% to 80%). Typical values
are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC- 1.5V).) (Note 7)
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
AC ELECTRICAL CHARACTERISTICS—QFN Package((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to VCC - 2V, fIN≤500MHz, input transition time = 125ps (20% to 80%). Typical values
are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC- 1.5V).) (Note 7)
Note 1:Measurements are made with the device in thermal equilibrium.
Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:DC parameters production tested at TA= +25°C and guaranteed by design over the full operating temperature range.
Note 4:Single-ended input operation using VBBis limited to (VCC- VEE) = 3.0V to 3.8V.
Note 5:Use VBB only for inputs that are on the same device as the VBB reference.
Note 6:All pins open except VCCand VEE.
Note 7:Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 8:Measured from the 50% point of the input signal with the 50% point equal to VBB, to the 50% point of the output signal.
Note 9:Measured between outputs of the same part at the signal crossing points for a same-edge transition. Differential input signal.
Note 10:Measured between outputs of different parts under identical condition for same-edge transition.
Note 11:Device jitter added to the input signal. Differential input signal.
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
Typical Operating Characteristics(PLCC package, typical values are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC- 1.5V), RL= 50Ω±1% to VCC - 2V, fIN=
500MHz, input transition time = 125ps (20% to 80%).)
