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MAX9316EWP
1:5 differential LVPECL/LVECL/HSTL clock and data driver
General DescriptionThe MAX9316 is a low-skew, 1-to-5 differential driver
designed for clock and data distribution. This device
allows selection between two inputs: one differential
and one single ended. The selected input is repro-
duced at five differential outputs. The differential input
can be adapted to accept a single-ended input by con-
necting the on-chip VBBsupply to one input as a refer-
ence voltage.
The MAX9316 features low output-to-output skew
(20ps), making it ideal for clock and data distribution
across a backplane or board. For interfacing to differ-
ential HSTL and LVPECL signals, this device operates
over a +3.0V to +3.8V supply range, allowing high-per-
formance clock or data distribution in systems with a
nominal +3.3V supply. For differential LVECL operation,
this device operates with a -3.0V to -3.8V supply.
The MAX9316 is offered in a space-saving 20-pin
TSSOP and wide-body SO package.
ApplicationsPrecision Clock Distribution
Low-Jitter Data Repeater
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
FeaturesGuaranteed 400mV Differential Output at 1.5GHz Selectable Single-Ended or Differential Input130ps (max) Part-to-Part Skew at +25°C20ps Output-to-Output Skew365ps Propagation DelaySynchronous Output Enable/DisableOn-Chip Reference for Single-Ended InputsInput Biased to Low when OpenPin Compatible with MC100LVEL14
MAX9316
Clock and Data Driver
Ordering Information
Pin Configuration
Typical Application Circuit
Functional Diagram appears at end of data sheet.*Future product—contact factory for availability.
MAX9316
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC- VEE= +3.0V to +3.8V, outputs loaded with 50Ω±1% to VCC- 2V, SEL = high or low, EN= low, unless otherwise noted. Typical
values are at VCC- VEE= +3.3V, VIHD= VCC- 1V, VILD= VCC- 1.5V.) (Notes 1, 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC- VEE...............................................................................4.1V
Inputs (CLK, CLK, SCLK, SEL, EN)
to VEE...........................................(VEE- 0.3V) to (VCC+ 0.3V)
CLK to CLK........................................................................±3.0V
Continuous Output Current.................................................50mA
Surge Output Current........................................................100mA
VBBSink/Source Current...............................................±0.65mA
Continuous Power Dissipation (TA= +70°C)
Single-Layer PC Board
20-Pin TSSOP (derate 7.69mW/°C above +70°C)......615mW
20-Pin Wide SO (derate 10mW/°C above +70°C)......800mW
Multilayer PC Board
20-Pin TSSOP (derate 10.9mW/°C above +70°C)......879mW
Junction-to-Ambient Thermal Resistance in Still Air
Single-Layer PC Board
20-Pin TSSOP.........................................................+130°C/W
20-Pin Wide SO…...................................................+100°C/W
Multilayer PC Board
20-Pin TSSOP...........................................................+91°C/W
Junction-to-Ambient Thermal Resistance with
500LFPM Airflow
Single-Layer PC Board
20-Pin TSSOP...........................................................+96°C/W
20-Pin Wide SO….....................................................+58°C/W
Junction-to-Case Thermal Resistance
20-Pin TSSOP............................................................+20°C/W
20-Pin Wide SO…......................................................+20°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (Inputs and Outputs).........................2kV
Soldering Temperature (10s)...........................................+300°C
MAX9316
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
DC ELECTRICAL CHARACTERISTICS (continued)(VCC- VEE= +3.0V to +3.8V, outputs loaded with 50Ω±1% to VCC- 2V, SEL = high or low, EN= low, unless otherwise noted. Typical
values are at VCC- VEE= +3.3V, VIHD= VCC- 1V, VILD= VCC- 1.5V.) (Notes 1, 2, 3)
MAX9316
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
Note 1:Measurements are made with the device in thermal equilibrium.
Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:DC parameters are production tested at TA= +25°C and guaranteed by design over the full operating temperature range.
Note 4:Use VBBonly for inputs that are on the same device as the VBBreference.
Note 5:All pins are open except VCCand VEE.
Note 6:Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 7:Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 8:Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 9:Device jitter added to a jitter-free input signal.
AC ELECTRICAL CHARACTERISTICS(VCC- VEE= +3.0V to +3.8V, outputs are loaded with 50Ω±1% to VCC- 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), SEL = high or low, EN= low, VIHD= VEE+ 1.2V to VCC, VILD= VEEto VCC- 0.15V, VIHD- VILD= 0.15V to 3V, unless
MAX9316
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data DriverSUPPLY CURRENT vs.TEMPERATURE
MAX9316 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
DIFFERENTIAL OUTPUT VOLTAGE
(VOH - VOL) vs. FREQUENCY
MAX9316 toc02
FREQUENCY (GHz)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
TRANSITION TIME vs. TEMPERATURE
MAX9316 toc03
TEMPERATURE (°C)
TRANSITION TIME (ps)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT (VIHD)
MAX9316 toc04
VIHD (V)
PROPAGATION DELAY (ps)
PROPAGATION DELAY vs. TEMPERATURE
MAX9316 toc05
TEMPERATURE (°C)
PROPAGATION DELAY (ps)
Typical Operating Characteristics(VCC= +3.3V, VIHD= VCC - 1V, VILD= VCC - 1.15V, input transition time = 125ps (20% to 80%), fIN= 1.5GHz, outputs loaded with
50Ωto (VCC- 2V), TA= +25°C, unless otherwise noted.)
MAX9316
Detailed DescriptionThe MAX9316 is a low-skew, 1-to-5 differential driver
designed for clock or data distribution. A 2-to-1 MUX
selects one of the two clock inputs, CLK, CLKand
SCLK. The CLK and CLKinput is differential while the
SCLK is single ended. The MUX is switched by the sin-
gle-ended SEL input. A logic low selects the CLK input
and a logic high selects the SCLK input. The SEL logic
threshold is set by the internal voltage reference VBB.
SEL input can be driven by VCCand VEEor by a single-
ended LVPECL/LVECL signal. The selected input is
reproduced at five differential outputs, Q0 to Q4.
Synchronous EnableThe MAX9316 is synchronously enabled and disabled
with outputs in the low state to eliminate shortened
clock pulses. ENis connected to the input of an edge-
triggered D flip-flop. After power-up, drive ENlow and
toggle the selected clock input to enable the outputs.
The outputs are enabled on the falling edge of the
selected clock input after ENgoes low. The outputs are
disabled to a low state on the falling edge of the select-
ed clock input after ENgoes high. The threshold for EN
is equal to VBB.
SupplyFor interfacing to differential HSTL and LVPECL signals,
the VCCrange is from +3.0 to +3.8V (with VEEground-
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
Pin Description