MAX9244EUM+TD ,21-Bit Deserializers with Programmable Spread Spectrum and DC BalanceELECTRICAL CHARACTERISTICS(V = LVDSV = PLLV = +3.0V to +3.6V, V = +3.0V to +5.5V, PWRDWN = high; SS ..
MAX9246EUM , 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance
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MB88401 ,(MB88400 Series) NMOS Single-Chip 4 Bit Microcomputeriljllllllallllllllalllllllll
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I Full or Hall Duplex
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I Start Bit Generated
..
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MAX9244EUM+D-MAX9244EUM+TD
21-Bit Deserializers with Programmable Spread Spectrum and DC Balance
General DescriptionThe MAX9242/MAX9244/MAX9246/MAX9254 deserialize
three LVDS serial-data inputs into 21 single-ended LVC-
MOS/LVTTL outputs. A separate parallel-rate LVDS clock
provides the timing for deserialization. The MAX9242/
MAX9244/MAX9246/MAX9254 feature spread-spectrum
capability, allowing the output data and clock frequency
to spread over a specified range to reduce EMI. The sin-
gle-ended data and clock outputs are programmable for
a frequency spread of ±2%, ±4%, or no spread. The
spread-spectrum function is also available when the
MAX9242/MAX9244/MAX9246/MAX9254 operate in non-
DC-balanced mode. The modulation rate of the spread is
32kHz for a 33MHz LVDS clock input and scales linearly
with frequency. The single-ended outputs have a sepa-
rate supply, allowing +1.8V to +5V output logic levels.
The MAX9254 features high output drive current for both
data and clock outputs for faster transition times in the
presence of heavy capacitive loads.
The MAX9242/MAX9244/MAX9246/MAX9254 feature pro-
grammable DC balance, allowing isolation between a
serializer and deserializer using AC-coupling. The
MAX9242/MAX9244/MAX9246/MAX9254 operate with the
MAX9209/MAX9213 serializers and are available with a
rising-edge strobe (MAX9242) or falling-edge strobe
(MAX9244/MAX9246/MAX9254). The LVDS inputs meet
ISO 10605 ESD specifications with ±30kV Air-Gap
Discharge and ±6kV Contact Discharge ratings.
ApplicationsAutomotive Navigation Systems
Automotive DVD Entertainment Systems
Digital Copiers
Laser Printers
FeaturesProgrammable ±4%, ±2%, or OFF Spread-Spectrum
Output for Reduced EMIProgrammable DC-Balanced or Non-DC-Balanced
ModesDC Balance Allows AC-Coupling for Wider Input
Common-Mode Voltage RangeSpread Spectrum Operates in DC-Balanced or
Non-DC-Balanced ModeHigh Output Drive (MAX9254)ππ/ 4 Deskew by Oversampling
(MAX9242/MAX9244/MAX9254)16MHz-to-34MHz (DC-Balanced) and 20MHz-to-
40MHz (Non-DC-Balanced) Operation
(MAX9242/MAX9244/MAX9254) 6MHz-to-18MHz (DC-Balanced) and 8MHz-to-20MHz
(Non-DC-Balanced) Operation (MAX9246)Rising-Edge (MAX9242) or Falling-Edge
(MAX9244/MAX9246/MAX9254) Output StrobeHigh-Impedance Outputs when PWRDWNis Low
Allow Output BusingSeparate Output Supply Allows Interface to +1.8V,
+2.5V, +3.3V, and +5V LogicLVDS Inputs Meet ISO 10605 ESD Protection at
±30kV Air-Gap Discharge and ±6kV Contact
DischargeLVDS Inputs Meet IEC 61000-4-2 Level 4 ESD
Protection at ±15kV Air-Gap Discharge and ±8kV
Contact DischargeLVDS Inputs Conform to ANSI TIA/EIA-644 Standard+3.3V Main Power Supply
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Ordering Information19-3954; Rev 4; 7/09
PARTTEMP RANGEPIN-PACKAGE
MAX9242EUM-40°C to +85°C48 TSSOP
MAX9242EUM/V+-40°C to +85°C48 TSSOP
MAX9242GUM-40°C to +105°C48 TSSOP
MAX9242GUM/V+-40°C to +105°C48 TSSOP
MAX9244EUM-40°C to +85°C48 TSSOP
MAX9244EUM/V+-40°C to +85°C48 TSSOP
MAX9244GUM-40°C to +105°C48 TSSOP
MAX9244GUM/V+-40°C to +105°C48 TSSOP
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
Note:All devices are available in lead(Pb)-free/RoHS-compliant
packaging. Specify lead(Pb)-free/RoHS compliant by adding a
+ symbol at the end of the part number when ordering.
Selector Guide
FREQUENCY RANGE
PARTSTROBE
EDGE
OVER-
SAMPLINGNON-DC
BALANCE
(MHz)
BALANCE
(MHz)MAX9242RisingYes20 to 4016 to 34
MAX9244FallingYes20 to 4016 to 34
MAX9246FallingNo8 to 206 to 18
MAX9254FallingYes20 to 4016 to 34
Pin Configuration appears at end of data sheet.
EVALUATION KIT
AVAILABLE
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, VCCO= +3.0V to +5.5V, PWRDWN= high; SSG = high, open, or low; DCB = high or
low, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM= |VID / 2| to 2.4V - |VID / 2|, unless otherwise
noted. Typical values are at VCC= VCCO= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC, LVDSVCC, PLLVCC.......................................-0.5V to +4.0V
VCCO......................................................................-0.5V to +6.0V
RxIN__, RxCLKIN_.................................................-0.5V to +4.0V
PWRDWN..............................................................-0.5V to +6.0V
SSG, DCB...................................................-0.5V to (VCC+ 0.5V)
RxOUT_, RxCLKOUT...............................-0.5V to (VCCO+ 0.5V)
Continuous Power Dissipation (TA= +70°C)
48-Pin TSSOP (derate 16mW/°C above +70°C)........1282mW
ESD Protection
Human Body Model (RD= 1.5kΩ, CS= 100pF)
All Pins to GND.............................................................±2.5kV
IEC 61000-4-2 (RD= 330Ω, CS= 150pF)
LVDS Inputs to GND (Air-Gap Discharge).....................±15kV
LVDS Inputs to GND (Contact Discharge).......................±8kV
ISO 10605 (RD= 2.0kΩ, CS= 330pF)
LVDS Inputs to GND (Air-Gap Discharge).....................±30kV
LVDS Inputs to GND (Contact Discharge).......................±6kV
Operating Temperature Range.........................-40°C to +105°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLYPower-Supply Range
VCC,
LVDSVCC,
PLLVCC
3.03.6V
Output-Supply RangeVCCO1.85.5V
16MHz5068DC-balanced
mode (SSG = low)34MHz81108
20MHz5573
33MHz7597Non-DC-balanced
mode (SSG = low)
40MHz83110
16MHz6285D C - b al anced m od eS SG = hi g h or op en) 34MHz101135
20MHz6791
33MHz93123
Worst-Case Supply CurrentICCW
CL = 8pF,
worst-case pattern,
VCC = VCCO = 3.0V
to 3.6V, Figure 2
(MAX9242,
MAX9244,
MAX9254)N on- D C -b al ancedodeS SG = hi g h or op en) 40MHz107134
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
DC ELECTRICAL CHARACTERISTICS (continued)(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, VCCO= +3.0V to +5.5V, PWRDWN= high; SSG = high, open, or low; DCB = high or
low, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM= |VID / 2| to 2.4V - |VID / 2|, unless otherwise
noted. Typical values are at VCC= VCCO= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS6MHz2945
8MHz3349DC-balanced
mode (SSG = low)
18MHz4869
8MHz3347
10MHz3752Non-DC-balanced
mode (SSG = low)
20MHz5273
6MHz3754
8MHz4162D C -b al anced m od eS SG = hi g h or op en) 18MHz6591
8MHz4158
10MHz4665
Worst-Case Supply CurrentICCW
CL = 8pF,
worst-case pattern,
VCC = VCCO = 3.0V
to 3.6V, Figure 2
(MAX9246)on- D C -b al ancedodeS SG = hi g h or op en) 20MHz6692
Power-Down Supply CurrentICCZPWRDWN = low50µA
5V-TOLERANT LOGIC INPUT (PWRDWN)High-Level Input VoltageVIH2.05.5V
Low-Level Input VoltageVIL-0.3+0.8V
Input CurrentIINPWRDWN = high or low level-20+20µA
Input Clamp VoltageVCLICL = -18mA-1.5V
THREE-LEVEL LOGIC INPUTS (DCB, SSG)High-Level Input VoltageVIH2.5VCC +
0.3V
Mid-Level Input CurrentIIMD C B, S S G op en or connected to a d r i ver w i th
outp ut i n hi g h- i m p ed ance state ( N ote 3) -10+10µA
Low-Level Input VoltageVIL-0.3+0.8V
Input CurrentIINDCB, SSG = high or low level,
PWRDWN = high or low-20+20µA
Input Clamp VoltageVCLICL = -18mA-1.5V
SINGLE-ENDED OUTPUTS (RxOUT_, RxCLKOUT)IOH = -100µAVCCO
- 0.1
RxCLKOUT (Note 4)VCCO
- 0.25
VCCO
- 0.43
High-Level Output VoltageVOH
IOH = -2mA
RxOUT_
MAX9254VCCO
- 0.25
IOL = 100µA0.1
RxCLKOUT (Note 4)0.2
0.26Low-Level Output VoltageVOLIOL = 2mARxOUT_
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
AC ELECTRICAL CHARACTERISTICS(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, VCCO= +3.0V to +3.6V, CL= 8pF, PWRDWN= high; SSG = high, open, or low;
DCB = high or low, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage VCM= |VID / 2| to 2.4V - |VID / 2|, unless
otherwise noted. Typical values are at VCC= VCCO= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 6, 7, 8)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSRxOUT_2.94.76.5Output Rise TimeCLHT0.1 x V C C O to 0.9 x V C C O,
Fi g ur e 3RxCLKOUT2.03.34.1ns
RxOUT_2.13.04.2Output Fall TimeCHLT0.9 x V C C O to 0.1 x V C C O,
Fi g ur e 3RxCLKOUT1.101.942.70ns
Output Rise Time (MAX9254)CLHT0.1 x V C C O to 0.9 x V C C O,
Fi g ur e 3RxOUT_1.42.23.3ns
Output Fall Time (MAX9254)CHLT0.9 x V C C O to 0.1 x V C C O,
Fi g ur e 3RxCLKOUT1.11.82.8ns
16MHz25603142DC-balanced mode,
Figure 434MHz9001386
20MHz25003164RxIN__ Skew Margin (Note 9)RSKM
Non-DC-balanced mode,
Figure 440MHz9601371
DC ELECTRICAL CHARACTERISTICS (continued)(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, VCCO= +3.0V to +5.5V, PWRDWN= high; SSG = high, open, or low; DCB = high or
low, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM= |VID / 2| to 2.4V - |VID / 2|, unless otherwise
noted. Typical values are at VCC= VCCO= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSHigh-Impedance Output CurrentIOZPWRDWN = low, VOUT = -0.3V to (VCCO + 0.3V)-30+30µA
RxCLKOUT (Note 4)-10-40VCCO = 3.0V to 3.6V,
VOUT = 0VRxOUT_-5-20
RxCLKOUT (Note 4)-28-75
Output Short-Circuit Current
(Note 5)IOS
VCCO = 4.5V to 5.5V,
VOUT = 0VRxOUT_-13-37
RxOUT_VCCO = 3.0V to 3.6V,
VOUT = 0VRxCLKOUT (Note 4)-16-51
RxOUT_
Output Short-Circuit Current
(MAX9254) (Note 5)IOS
VCCO = 4.5V to 5.5V,
VOUT = 0VRxCLKOUT (Note 4)-34-93
LVDS INPUTS (RxIN__, RxCLKIN_)Differential Input High ThresholdVTH(Note 6)50mV
Differential Input Low ThresholdVTL(Note 6)-50mV
Input CurrentIIN+, IIN-PWRDWN = high or low-25+25µA
Power-Off Input CurrentIINO+, IINO-VCC = VCCO = 0V or open-40+40µA
-40°C to +85°C4278
Input Resistor 1RIN1
PWRDWN = high or low,
VCC = VCCO = 0V or open,
Figure 1-40°C to +105°C4285
-40°C to +85°C246410
Input Resistor 2RIN2
PWRDWN = high or low,
VCC = VCCO = 0V or open,
Figure 1-40°C to +105°C246440
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Note 1:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground,
except VTHand VTL.
Note 2:Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA= +25°C.
Note 3:To provide a mid level, leave the input open, or, if driven, put driver in high impedance. High-impedance leakage current
must be less than ±10µA.
Note 4:RxCLKOUT limits are scaled based on RxOUT_ measurements, design, and characterization data.
Note 5:One output shorted at a time. Current out of the pin.
Note 6:VTH, VTL, and AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set
at ±6 sigma.
Note 7:CLincludes probe and test jig capacitance.
Note 8:RCIP is the period of RxCLKIN_. RCOP is the period of RxCLKOUT.
Note 9:RSKM is measured with less than 150ps cycle-to-cycle jitter on RxCLKIN_.
AC ELECTRICAL CHARACTERISTICS (continued)(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, VCCO= +3.0V to +3.6V, CL= 8pF, PWRDWN= high; SSG = high, open, or low;
DCB = high or low, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage VCM= |VID / 2| to 2.4V - |VID / 2|, unless
otherwise noted. Typical values are at VCC= VCCO= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 6, 7, 8)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSRxCLKOUT High TimeRCOHFigures 5a, 5b0.35 x
RCOPns
RxCLKOUT Low TimeRCOLFigures 5a, 5b0.35 x
RCOPns
RxOUT_ Setup to RxCLKOUTRSRCFigures 5a, 5b0.3 x
RCOPns
RxOUT_ Hold from RxCLKOUTRHRCFigures 5a, 5b0.45 x
RCOPns
RxCLKIN_ to RxCLKOUT DelayRCCDSSG = low, Figures 6a, 6b4.5 +
(RCIP / 2)
6.5 +
(RCIP / 2)
8.2 +
(RCIP / 2)ns
Deserializer Phase-Locked-
Loop SetRPLLSFigure 765,600 x
RCIPns
Deserializer Power-Down DelayRPDDFigure 8100ns
Deserializer Phase-Locked-
Loop Set from SSG ChangeRPLLS2Figure 932,800 x
RCIPnsaxi m um outp ut
fr eq uency
fRxCLKIN_
+ 3.6%
fRxCLKIN_
+ 4.0%
fRxCLKIN_
+ 4.4%SSG = high,
Figure 10Minimum output
frequency
fRxCLKIN_
- 4.4%
fRxCLKIN_
- 4.0%
fRxCLKIN_
- 3.6%axi m um outp ut
fr eq uency
fRxCLKIN_
+ 1.8%
fRxCLKIN_
+ 2.0%
fRxCLKIN_
+ 2.2%SSG = open,
Figure 10Minimum output
frequency
fRxCLKIN_
- 2.2%
fRxCLKIN_
- 2.0%
fRxCLKIN_
- 1.8%
Spread-Spectrum Output
FrequencyfRxCLKOUT
SSG = lowfRxCLKIN_fRxCLKIN_
MHz
Spread-Spectrum Modulation
FrequencyfSSMFigure 10fRxCLKIN_ /
1016Hz
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balanceest Circuits/Timing DiagramsVCC - 0.3V
VCC
RIN2
RIN1
RxIN_ + OR
RxCLKIN+
RxIN_ - OR
RxCLKIN-
RIN1
RIN1
RxIN_ + OR
RxCLKIN+
RxIN_ - OR
RxCLKIN-
RIN1
FAIL-SAFE
COMPARATOR
DC-BALANCED MODENON-DC-BALANCED MODE
1.2V
Figure 1. LVDS Input Circuits
RCOP
RxCLKOUT
ODD RxOUT
EVEN RxOUT
Figure 2. Worst-Case Test Pattern
90%90%
10%10%
CHLTCLHT
RxOUT_ OR
RxCLKOUTRxOUT_ OR
RxCLKOUT
8pF
Figure 3. Output Load and Transition Times
IDEAL
MINMAX
INTERNAL STROBE
IDEAL
RSKMRSKM
IDEAL SERIAL BIT TIME
1.3V
1.1V
Figure 4. LVDS Receiver Input Skew Margin
RxOUT_
RxCLK OUT
RCOP
RCOHRCOL
2.0V
0.8V
2.0V
0.8V
2.0V2.0V2.0V
0.8V 0.8V
RHRCRSRC
Figure 5a. Rising-Edge Output Setup/Hold and High/Low Times
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Test Circuits/Timing Diagrams (continued)VID = 0V
1.5V
RCCD
RxCLKIN_
RxCLKOUT
RCIP
Figure 6a. Clock-IN to Clock-OUT Delay (MAX9244/MAX9246/
MAX9254)
VCC
RxCLKIN_
RxCLKOUT
PWRDWN
RPLLS
HIGH IMPEDANCE
1.5V
Figure 7. Phase-Locked-Loop Set Time
1.5V
PWRDWN
RxCLKIN_
RxOUT_
RxCLKOUT
RPDD
HIGH IMPEDANCE1.5V
Figure 8. Power-Down Delay
RxCLKIN_
RxCLKOUT
RCCD
1.5V
VID = 0V
RCIP
Figure 6b. Clock-IN to Clock-OUT Delay (MAX9242)
RxOUT_
RxCLKOUT
RCOP
RCOHRCOL
2.0V
0.8V
2.0V
0.8V
2.0V2.0V
0.8V0.8V0.8V
RHRCRSRC
Figure 5b. Falling-Edge Output Setup/Hold and High/Low Times
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Test Circuits/Timing Diagrams (continued)FREQUENCY
TIME
fRxCLKOUT (MAX)
fRxCLKIN_
fRxCLKOUT (MIN)
1 / fSSM
Figure 10. Simplified Modulation Profile
RxCLKOUT
SSGOPEN OR LESS THAN ±10μA LEAKAGE
2.5V
0.8V
RxCLKIN_
RxOUT_
RPLLS2
TIMING SHOWN FOR FALLING-EDGE STROBE (MAX9244/MAX9246/MAX9254)
PWRDWN = HIGH
Figure 9. Phase-Locked-Loop Set Time from SSG Change
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(NON-DC-BALANCED MODE, NO SPREAD)MAX9242 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)302520
WORST-CASE PATTERN
27 - 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, NO SPREAD)MAX9242 toc02
FREQUENCY (MHz)
SUPPLY CURRENT (mA)302520
WORST-CASE PATTERN
27 - 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, 2% SPREAD)MAX9242 toc03
FREQUENCY (MHz)
SUPPLY CURRENT (mA)302520
WORST-CASE PATTERN
27 - 1 PRBS
WORST-CASE AND PRBS SUPPLY CURRENT
vs. FREQUENCY
(DC-BALANCED MODE, 4% SPREAD)MAX9242 toc04
FREQUENCY (MHz)
SUPPLY CURRENT (mA)302520
WORST-CASE PATTERN
27 - 1 PRBS
RxOUT_ OUTPUT LOADINGMAX9242 toc05
LOAD (mA)
DROPOUT (V)1
MAX9254
MAX9244
Typical Operating Characteristics(VCC= PLLVCC= LVDSVCC= VCCO= +3.3V, CL= 8pF, PWRDWN= high, differential input voltage |VID| = 0.2V, input common-mode
voltage VCM= 1.2V, TA = +25°C, MAX9244/MAX9254, unless otherwise noted.)
RxOUT_TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (VCCO)MAX9242 toc06
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
CLHT
CHLT
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, NO SPREAD)MAX9242 toc07
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 2% SPREAD)MAX9242 toc08
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 4% SPREAD)MAX9242 toc09
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Typical Operating Characteristics(continued)(VCC= PLLVCC= LVDSVCC= VCCO= +3.3V, CL= 8pF, PWRDWN= high, differential input voltage |VID| = 0.2V, input common-mode
voltage VCM= 1.2V, TA = +25°C, MAX9244/MAX9254, unless otherwise noted.)
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, NO SPREAD)MAX9242 toc10
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, 2% SPREAD)MAX9242 toc11
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxCLKOUT POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, 4% SPREAD)MAX9242 toc12
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, NO SPREAD)MAX9242 toc13
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 2% SPREAD)MAX9242 toc14
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 33MHz, 4% SPREAD)MAX9242 toc15
FREQUENCY (MHz)
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, NO SPREAD)MAX9242 toc16
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, 2% SPREAD)MAX9242 toc17
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
RxOUT_ POWER SPECTRUM
vs. FREQUENCY
(RxCLKIN_ = 16MHz, 4% SPREAD)MAX9242 toc18
POWER SPECTRUM (dBm)
RESOLUTION BW = 100kHz
VIDEO BW = 100kHz
ATTENUATION = 50dB
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Pin Description
PINNAMEFUNCTIONRxOUT17RxOUT18Channel 2 Single-Ended Outputs
3, 25, 32,
38, 44GNDGroundRxOUT19RxOUT20Channel 2 Single-Ended OutputsSSGThree-Level-Logic, Spread-Spectrum Generator Control Input. SSG selects the frequency spread of
RxCLKOUT relative to RxCLKIN_ (see Table 3).DCBThree-Level-Logic, DC-Balance Control Input. DCB selects DC-balanced, non-DC-balanced, or reserved
operation (see Table 1).RxIN0-Inverting Channel 0 LVDS Serial-Data InputRxIN0+Noninverting Channel 0 LVDS Serial-Data InputRxIN1-Inverting Channel 1 LVDS Serial-Data InputRxIN1+Noninverting Channel 1 LVDS Serial-Data InputLVDSVCCLVDS Supply Voltage. Bypass LVDSVCC to GND with 0.1µF and 0.001µF capacitors in parallel as close to
the pin as possible.
13, 18LVDSGNDLVDS GroundRxIN2-Inverting Channel 2 LVDS Serial-Data InputRxIN2+Noninverting Channel 2 LVDS Serial-Data InputRxCLKIN-Inverting LVDS Parallel-Rate Clock InputRxCLKIN+Noninverting LVDS Parallel-Rate Clock Input
19, 21PLLGNDPLL GroundPLLVCCPLL Supply Voltage. Bypass PLLVCC to GND with 0.1µF and 0.001µF capacitors in parallel as close to
the pin as possible.PWRDWN5V-Tolerant LVTTL/LVCMOS Power-Down Input. PWRDWN is internally pulled down to GND. Outputs are
high impedance when PWRDWN = low or open.RxCLKOUTP ar al l el - Rate C l ock S i ng l e- E nd ed O utp ut. The M AX 9242 has a r i si ng - ed g e str ob e. The M AX 9244/M AX 9246/AX 9254 have a fal l i ng - ed g e str ob e.RxOUT0RxOUT1RxOUT2
Channel 0 Single-Ended Outputs
28, 36, 48VCCOOutput Supply Voltage. Bypass each VCCO to GND with 0.1µF and 0.001µF capacitors in parallel as
close to the pin as possible.RxOUT3RxOUT4RxOUT5RxOUT6
Channel 0 Single-Ended Outputs
MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC BalanceMAX9242
MAX9244
MAX9246
MAX9254
RxIN0+
RxIN0-
RxIN1+
RxIN1-
RxIN2+
RxIN2-
RxCLKIN+
RxCLKIN-
DCB
RxOUT0–RxOUT6
RxOUT7–RxOUT13
RxOUT14–RxOUT20
RxCLKOUT
SSG
SERIAL-TO-PARALLEL
CHANNEL 07
SERIAL-TO-PARALLEL
CHANNEL 17
SERIAL-TO-PARALLEL
CHANNEL 27
FIFO
PLL1
7x OR 9x STROBES
FIFO
CONTROL
SPREAD-
SPECTRUM
PLL (SSPLL)
CLK
CLK
OUT
PARALLEL
CLOCK
PWRDWN
Functional Diagram
Pin Description (continued)
PINNAMEFUNCTIONRxOUT7RxOUT8RxOUT9RxOUT10RxOUT11RxOUT12
Channel 1 Single-Ended OutputsVCCDigital Supply Voltage. Bypass VCC to GND with 0.1µF and 0.001µF capacitors in parallel as close to the
pin as possible.RxOUT13Channel 1 Single-Ended OutputRxOUT14RxOUT15RxOUT16
Channel 2 Single-Ended Outputs
