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MAX9224ETI+
22-Bit, Low-Power, 5MHz to 10MHz Serializer and Deserializer Chipsets
General DescriptionThe MAX9223/MAX9224 serializer/deserializer chipsets
reduce wiring by serializing 22 bits onto a single differen-
tial pair. 22 bits are serialized in each cycle of the paral-
lel input clock resulting in a 110Mbps to 220Mbps net
serial-data rate ideal for cell phone QVGA and QCIF dis-
plays. The MAX9223 serializes the 18-bit RGB, VSYNC,
HSYNC, and two control signals from the baseband
processor to reduce wiring through the hinge to the LCD
controller. The 2-wire serial interface uses low-current dif-
ferential signaling (LCDS) for low EMI, high common-
mode noise immunity, and ground-shift tolerance. The
MAX9223/MAX9224 automatically identify the word
boundary in serial data in case of signal interruption. The
MAX9224 power-down is controlled by the MAX9223.
The MAX9223 and MAX9224 consume 3.5µA or less in
power-down mode.
The MAX9223 serializer operates from a single +2.375V
to +3.465V supply and accepts +1.71V to +3.465V
inputs. The MAX9224 deserializer operates from a
+2.375V to +3.465V core supply and has a separate
output buffer supply (VDDO), allowing +1.71V to
+3.465V output high levels.
The MAX9223/MAX9224 are specified over the -40°C to
+85°C extended temperature range and are available
in 28-pin TQFN (4mm x 4mm x 0.8mm) packages with
an exposed paddle.
ApplicationsCell Phones
LCDs
Digital Cameras
FeaturesIdeal for Serializing Cell Phone LCD or Imager
Parallel InterfaceMAX9223 Serializes 18-Bit RGB, VSYNC, HSYNC,
and Two Control SignalsLCDS Rejects Common-Mode NoiseAutomatic Location of Word Boundary After Signal
InterruptionPower-Down Control Through the Serial LinkPower-Down Supply Current
0.5μA (max)—MAX9223
3.0μA (max)—MAX9224+2.375V to +3.465V Core Supply VoltageParallel I/O Interfaces Directly to 1.8V to 3.3V Logic±15kV Human Body Model ESD Protection-40°C to +85°C Operating Temperature Range
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipsets
Ordering Information19-3861; Rev 1; 12/07
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE
MAX9223ETI-40°C to +85°C28 TQFN-EP*T2844-1
MAX9223ETI+-40°C to +85°C28 TQFN-EP*T2844-1
MAX9224ETI-40°C to +85°C28 TQFN-EP*T2844-1
MAX9224ETI+-40°C to +85°C28 TQFN-EP*T2844-1
EVALUATION KIT
AVAILABLE+Denotes lead-free package.
*EP = Exposed paddle.
Typical Application CircuitTIMING
AND
CONTROL
PARALLEL
SERIAL
PARALLEL
DATA OUT
TIMING AND CONTROL
OUTPUT
LATCH
PIXEL
CLOCK OUTDLL
LCDS
POWER-DOWN
CONTROL
SERIAL
PARALLEL
PARALLEL
DATA IN
PIXEL
CLOCK IN
LATCH
INPUT
MAX9223MAX9224
Pin Configurations appear at end of data sheet.
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS—MAX9223(VDD= +2.375V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +2.5V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.5V to +4.0V
VDDOto GND.........................................................-0.5V to +4.0V
Serial Interface (SDO+, SDO-, SDI+,
SDI-) to GND.....................................................-0.5V to +4.0V
Single-Ended Inputs (DIN_, PCLKIN,
PWRDN) to GND....................................-0.5V to (VDD+ 0.5V)
Single-Ended Outputs (DOUT_,
PCLKOUT) to GND..............................-0.5V to (VDDO+ 0.5V)
Continuous Power Dissipation (TA= +70°C)
28-Pin TQFN (4mm x 4mm x 0.8mm)
Multilayer PCB (derate 28.6mW/°C
above +70°C).............................................................2286mW
Single-Layer PCB (derate 20.8mW/°C
above +70°C).............................................................1667mW
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
ESD Protection (Human Body Model)
SDO+, SDO-, SDI+, SDI- to GND...............................>±15kV
All Other Pins................................................................>±2kV
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SINGLE-ENDED INPUTS (PCLKIN, DIN_, PWRDN)High-Level Input VoltageVIH1.19VDD + 0.3V
Low-Level Input VoltageVIL-0.3+0.3V
VIN = 0V to VDD-20+20
-0.3V ≤ VIN < 0VInput CurrentIIN
VDD < VIN ≤ (VDD + 0.3V)-100+100µA
LCDS OUTPUT (SDO+, SDO-)IODHHigh level600643880Differential Output Current (Note 3)IODLLow level200229300µA
Output Short-Circuit CurrentIOSShorted to 0V or VDD880µA
POWER SUPPLYPCLKIN = 5MHz
(110Mbps)4.48.2
Supply CurrentIDD
VDD = 2.5V,
DIN_ = all low or
all highPCLKIN = 10MHz
(220Mbps)5.68.2
PCLKIN = 5MHz
(110Mbps)4.110.6
Worst-Case Pattern Supply CurrentIDDWVDD = 2.5V,
Figure 1PCLKIN = 10MHz
(220Mbps)5.410.6
Power-Down Supply CurrentIDDZAll inputs = low0.5µA
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
DC ELECTRICAL CHARACTERISTICS—MAX9224(VDD= +2.375V to +3.465V, VDDO= +1.71V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD=
VDDO= +2.5V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SINGLE-ENDED OUTPUTS (PCLKOUT, DOUT_)High-Level Output VoltageVOHVDDO = +2.375V to +3.465V, IOH = -1mA0.8 x VDDOV
Low-Level Output VoltageVOLVDDO = +2.375V to +3.465V, IOL = 1mA0.2V
VDDO = 2.375V-2
VDDO = 3.135V-9Output Short-Circuit CurrentIOSOutput shorted
to groundVDDO = 3.465V-25
LCDS INPUT (SDI+, SDI-)Differential Input-Current ThresholdIID400µA
Common-Mode Input CurrentIIC-300±500+300µA
IIC = 0µA at VDD = 3.3V ±5%6990109
IIC = 0µA at VDD = 2.8V ±5%82108132
IIC = 0µA at VDD = 2.5V ±5%95125153
IIC = ±300µA at VDD = 3.3V ±5%6791112
Differential Input ImpedanceZID
IIC = ±300µA at VDD = 2.8V ±5%86108136
Common-Mode Input ImpedanceZICIIC = ±300µA90167375Ω
Input CapacitanceCINSDI+ or SDI- to ground2pF
POWER SUPPLYPCLKOUT = 5MHz
(110Mbps)912
Supply Current (Note 4)ITOT
VDD = VDDO = 2.5V
DOUT_ = all high or
all lowPCLKOUT = 10MHz
(220Mbps)912
PCLKOUT = 5MHz
(110Mbps)1012
Worst-Case Pattern
Supply Current (Note 4)ITOTW
CL = 5pF, VDD =
VDDO = 2.5V,
Figure 2PCLKOUT = 10MHz
(220Mbps)1012
Power-Down Supply Current
(Note 4)ITOTZ0.083µA
Supply DifferenceVSDMAX9223 VDD to MAX9224 VDD-5+5%
GROUND POTENTIALGround DifferenceVGDMAX9223 to MAX9224 ground difference-0.2+0.2V
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
AC ELECTRICAL CHARACTERISTICS—MAX9223(VDD= +2.375V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +2.5V, TA= +25°C.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PCLKIN INPUT REQUIREMENTS (Figure 3)Input Rise TimetR2ns
Input Fall TimetF2ns
PCLKIN PeriodtP100200ns
High-Level Pulse WidthtPWH0.3 x tP0.7 x tPns
Low-Level Pulse WidthtPWL0.3 x tP0.7 x tPns
Setup TimetS3ns
Hold TimetH1ns
AC ELECTRICAL CHARACTERISTICS—MAX9224(VDD= VDDO= +2.375V to +3.465V, CL= 5pF, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= VDDO=
+2.5V, TA= +25°C.) (Notes 3, 5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPCLKOUT PeriodtPFigure 4100200ns
High-Level Pulse WidthtPWHFigure 40.4 x tP0.6 x tPns
Low-Level Pulse WidthtPWLFigure 40.4 x tP0.6 x tPns
Data Valid Before PCLKOUTtVBFigure 45ns
Data Valid After PCLKOUTtVAFigure 45ns
SERIALIZER AND DESERIALIZER LINKtPU1From VDD = VDDO = 2.375V when supplies
are ramping up
6144 xPower-Up Time
tPU2From PWRDN low to high4096 x
Power-Down TimetPWRDNFrom PWRDN high to low2.810µs
Note 1:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground.
Note 2:Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA= +85°C.
Note 3:Parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 4:ITOT= IDD+ IDDO.
Note 5:CLincludes probe and test jig capacitance.
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
Test Circuits/Timing DiagramsVIL
VIH
VIH
tPWL
VIL
VIH
PCLKIN
tPWH
VIL
VIH
VIL
VIHDIN_
PWRDN
VIH IS THE MINIMUM HIGH-LEVEL INPUT AND VIL IS THE MAXIMUM LOW-LEVEL INPUT (SEE THE DC ELECTRICAL CHARACTERISTICS TABLE).
Figure 3. Serializer Input Timing
ODD DIN_
EVEN DIN_
PCLKIN
Figure 1. Serializer Worst-Case Switching Pattern
ODD DOUT_
EVEN DOUT_
PCLKOUT
Figure 2. Deserializer Worst-Case Switching Pattern
tVB
VOL
VOHVOH
tPWL
tVA
VOL
VOH
PCLKOUT
tPWH
VOL
VOH
VOL
VOHDOUT_
VOH IS THE MINIMUM HIGH-LEVEL OUTPUT AND VOL IS THE MAXIMUM LOW-LEVEL OUTPUT (SEE THE DC ELECTRICAL CHARACTERISTICS TABLE).
Figure 4. Deserializer Output Timing
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
Typical Operating Characteristics(VDD= VDDO= +2.8V, logic input levels = 0 to +2.8V, logic output load CL= 5pF, TA= +25°C, unless otherwise noted.)
MAX9223
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKIN = 10MHz
PCLKIN = 5MHz
DIN[21:0] = ALL LOW10
MAX9223
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKIN = 10MHz
PCLKIN = 5MHz
DIN[21:0] = ALL HIGH10
MAX9223
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKIN = 10MHz
PCLKIN = 5MHz
DIN[21:0] = WORST-CASE SWITCHING PATTERN78910
MAX9223
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc04
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DIN[21:0] = ALL LOW878910
MAX9223
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc05
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DIN[21:0] = ALL HIGH878910
MAX9223
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc06
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DIN[21:0] = WORST-CASE SWITCHING PATTERN
MAX9223 POWER-DOWN
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc07
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
PCLKIN = LOW
PWRDN = LOW
DIN[21:0] = ALL LOW
MAX9224
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc08
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKOUT = 10MHz
PCLKOUT = 5MHz
DOUT[21:0] = ALL LOW12
MAX9224
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc09
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKOUT = 10MHz
PCLKOUT = 5MHz
DOUT[21:0] = ALL HIGH
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer ChipsetMAX9224
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc10
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
PCLKOUT = 10MHz
PCLKOUT = 5MHz
DOUT[21:0] = WORST-CASE SWITCHING
PATTERN78910
MAX9224
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc11
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DOUT[21:0] = ALL LOW1278910
MAX9224
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc12
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DOUT[21:0] = ALL HIGH
MAX9224 DOUT OUTPUT-LOW VOLTAGE
vs. SINK CURRENT
MAX9233/4 toc16
SINK CURRENT (mA)
DOUT (mV)
VDDO = +1.71V TO +2.375V160
MAX9224 DIFFERENTIAL INPUT
IMPEDANCE vs. SUPPLY VOLTAGE
MAX9233/4 toc17
SUPPLY VOLTAGE (V)
INPUT IMPEDANCE (
Typical Operating Characteristics (continued)(VDD= VDDO= +2.8V, logic input levels = 0 to +2.8V, logic output load CL= 5pF, TA= +25°C, unless otherwise noted.)78910
MAX9224
SUPPLY CURRENT vs. FREQUENCYMAX9233/4 toc13
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
DOUT[21:0] = WORST-CASE SWITCHING
PATTERN
MAX9224 POWER-DOWN
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9233/4 toc14
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
SDI+/SDI- PULLED UP TO VDD
DOUT[21:0] = ALL LOW
MAX9224 DOUT OUTPUT-HIGH VOLTAGE
vs. SOURCE CURRENT
MAX9233/4 toc15
SOURCE CURRENT (mA)
DOUT (V)
VDDO = 2.375VVDDO = 2V
VDDO = 1.71V
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
Pin Description (MAX9223)
PINNAMEFUNCTION1–12, 14, 15,
DIN13–DIN2,
DIN1, DIN0,
DIN21–DIN14
Single-Ended Parallel Data Inputs. The 22 data bits are loaded into the input latch on the rising
edge of PCLKIN. DIN[21:0] are 1.71V to 3.465V tolerant. Internally pulled down to GND.PCLKINParallel Clock Input. The rising edge of PCLKIN (typically the pixel clock) latches the parallel
data input. Internally pulled down to GND.PWRDNPower-Down Input. Pull PWRDN low to place the MAX9223 and MAX9224 in power-down mode.
Drive PWRDN high for normal operation. Internally pulled down to GND.SDO-Inverting LCDS Serial-Data OutputSDO+Noninverting LCDS Serial-Data OutputGNDGroundVDDCore Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.EPExposed Paddle. Connect EP to ground.
Pin Description (MAX9224)
PINNAMEFUNCTION1, 7, 8, 10–28
DOUT21,
DOUT0, DOUT1,
DOUT2–DOUT20
Single-Ended Parallel Data Outputs. DOUT[21:0] are valid on the rising edge of PCLKOUT.
2VDDOOutput Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.GNDGroundSDI+Noninverting LCDS Serial-Data InputSDI-Inverting LCDS Serial-Data Input
6VDDCore Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.PCLKOUTParallel Clock Output. Parallel output data are valid on the rising edge of PCLKOUT (typically
the pixel clock).EPExposed Paddle. Connect EP to ground.
