MAX9169EUE+T ,4-Port LVDS and LVTTL-to-LVDS Repeatersapplications that require high-speed data or clock23630Mbps (2 - 1) PRBS Patterndistribution while ..
MAX9170ESE ,4-Port LVDS and LVTTL-to-LVDS Repeatersapplications that require high-speed data or clock23630Mbps (2 - 1) PRBS Patterndistribution while ..
MAX9170EUE+ ,4-Port LVDS and LVTTL-to-LVDS RepeatersELECTRICAL CHARACTERISTICS(V = 3.0V to 3.6V, R = 100Ω ±1%, EN_ = high, MAX9169 differential input v ..
MAX9172ESA ,Single/Dual LVDS Line Receivers with "In-Path" Fail-SafeApplications Ordering InformationMultipoint Backplane InterconnectTOP PKGPART PIN-PACKAGEMARK CODEL ..
MAX9172ESA+ ,Single/Dual LVDS Line Receivers with "In-Path" Fail-SafeFeaturesThe MAX9171/MAX9172 single/dual low-voltage differential♦ Input Accepts LVDS and LVPECLsign ..
MAX9172ESA+T ,Single/Dual LVDS Line Receivers with "In-Path" Fail-Safeapplications requiring minimum power consumption,♦ Space-Saving 8-Pin TDFN and SOT23 Packagesspace, ..
MB88345PF ,D/A Converter for Digital Tuning (24-channel, 8-bit, on-chip OP amp)FEATURES• Ultra-low power consumption (1.1 mW/ch : typical) • Compact space-saving package (QFP-32 ..
MB88346B ,R-2R TYPE 8-BIT D/A CONVERTER WITH OPERATIONAL AMPLIFIER OUTPUT BUFFERSFUJITSU SEMICONDUCTORDS04-13501-2EDATA SHEETLINEAR ICR-2R TYPE 8-BIT D/A CONVERTER WITHOPERATIONAL ..
MB88346BP ,R-2R type 8-bit D/A converter with operetional amplifier output buffersFEATURESPLASTIC SOP(FPT-20P-M01)• Conversion method : R-2R resistor ladder• 8-bit x 12-channel D/A ..
MB88346BPF ,R-2R type 8-bit D/A converter with operetional amplifier output buffersFUJITSU SEMICONDUCTORDS04-13501-2EDATA SHEETLINEAR ICR-2R TYPE 8-BIT D/A CONVERTER WITHOPERATIONAL ..
MB88346BPFV ,R-2R type 8-bit D/A converter with operetional amplifier output buffersFUJITSU SEMICONDUCTORDS04-13501-2EDATA SHEETLINEAR ICR-2R TYPE 8-BIT D/A CONVERTER WITHOPERATIONAL ..
MB88346L ,D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp, low-voltage)FUJITSU SEMICONDUCTORDS04-13511-2EDATA SHEETLinear IC ConverterCMOSD/A Converter for Digital Tuni ..
MAX9169EUE+T-MAX9170EUE+
4-Port LVDS and LVTTL-to-LVDS Repeaters
General DescriptionThe MAX9169/MAX9170 low-jitter, low-voltage differen-
tial signaling LVDS/LVTTL-to-LVDS repeaters are ideal
for applications that require high-speed data or clock
distribution while minimizing power, space, and noise.
The devices accept a single LVDS (MAX9169) or LVTTL
(MAX9170) input and repeat the input at four LVDS out-
puts. Each differential output drives 100Ω, allowing
point-to-point distribution of signals on transmission
lines with 100Ωtermination at the receiver input. The
MAX9169 and MAX9170 are pin compatible with the
SN65LVDS104 and SN65LVDS105, respectively, and
offer improved pulse-skew performance.
Ultra-low 150ps (max) pulse skew and 200psP-P(max)
added deterministic jitter ensure reliable communica-
tion in high-speed links that are highly sensitive to tim-
ing error, especially those incorporating clock-and-data
recovery or serializers and deserializers. The high-
speed switching performance guarantees 630Mbps
data rate and less than 120ps channel-to-channel skew
over the 3.0V to 3.6V operating supply range.
Supply current is 30mA (max) for the MAX9169, and
25mA (max) for the MAX9170. LVDS inputs and outputs
conform to the ANSI EIA/TIA-644 standard. A fail-safe
feature on the MAX9169 sets the output high when the
input is undriven and open, terminated, or shorted. The
MAX9169/MAX9170 are offered in 16-pin TSSOP and
SO packages, and operate over an extended -40°C to
+85°C temperature range.
Refer to the MAX9130 data sheet for an LVDS line
receiver in an SC70 package.
ApplicationsPoint-to-Point Baseband Data Transmission
Cellular Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Features150ps (max) Pulse Skew200psP-P(max) Added Deterministic Jitter at
630Mbps (223- 1) PRBS Pattern8psRMS(max) Added Random Jitter120ps (max) Channel-to-Channel Skew630Mbps Data RateConforms to ANSI EIA/TIA-644 LVDS Standard30mA (max) (MAX9169), 25mA (max) (MAX9170)
Supply Current, a 15% Improvement vs.
CompetitionLVDS (MAX9169) or +5V Tolerant LVTTL/LVCMOS
(MAX9170) Input VersionsFail-Safe Circuit Sets Output High for Undriven
Differential Input Output Rated for 10pF LoadIndividual Output EnablesSingle 3.3V SupplyImproved Second Source of the SN65LVDS104
(MAX9169)/SN65LVDS105 (MAX9170)16-Pin SO and TSSOP Packages
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
Ordering InformationMAX9180
MAX9169
MAX9130
MAX9130
100Ω
LVDS
LVDS
BACKPLANE
OR CABLE
1
100Ω
100Ω
ypical Application Circuit19-2616; Rev 0; 10/02
Pin Configurations appear at end of data sheet.
PARTTEMP RANGEPIN-
PACKAGEINPUT
MAX9169ESE-40°C to +85°C16 SOLVDS
MAX9169EUE-40°C to +85°C16 TSSOPLVDS
MAX9170ESE-40°C to +85°C16 SOLVTTL
MAX9170EUE-40°C to +85°C16 TSSOPLVTTL
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC= 3.0V to 3.6V, RL= 100Ω±1%, EN_ = high, MAX9169 differential input voltage | VID | = 0.05V to 1.2V, LVDS input common-
mode voltage VCM= | VID/2 | to +2.4V - | VID/2 |, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= 3.3V, | VID|
= 0.2V, VCM= 1.25V, TA= +25°C for MAX9169. Typical values are at VCC= 3.3V, VIN= 0 or VCC, TA= +25°C for MAX9170.)
(Notes 1 and 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND..............................................................-0.5V to +4V
Inputs
IN+, IN- to GND....................................................-0.5V to +4V
IN, EN_ to GND....................................................-0.5V to +6V
Outputs
OUT_+, OUT_- to GND.........................................-0.5V to +4V
Continuous Power Dissipation (TA= +70°C)
16-Pin SO (derate 8.7mW/°C above +70°C)................696mW
16-Pin TSSOP (derate 9.4mW/°C above +70°C).........755mW
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
ESD Protection
Human Body Model (MAX9169)
(IN+, IN-, OUT_+, OUT_-)..............................................≥16kV
Human Body Model (MAX9170)
(OUT_+, OUT_-).............................................................≥10kV
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LVDS INPUTS (IN+, IN-) (MAX9169)Differential Input High ThresholdVTH550mV
Differential Input Low ThresholdVTL-50-5mV
VIN = 0V, other input open, Figure 1-2-11.8-20Input Current
(IN+ or IN-, Single Ended)IIN+, IIN-VIN = +2.4V, other input open, Figure 1-1.2-3.2µA
Power-Off Input Current
(IN+ or IN-, Single Ended)IINO+, IINO-VCC = +1.5V, VIN = +2.4V, other input open,
Figure 13.220µA
0.05V ≤VID≤ 0.6V, Figure 1-15+15Input CurrentIIN+, IIN-0.6V <VID≤ 1.2V, Figure 1-20+20µA
0.05V ≤VID≤ 0.6V, VCC = 1.5V, Figure 1-15+15Power-Off Input CurrentIINO+, IINO-0.6V <VID≤ 1.2V, VCC = 1.5V, Figure 1-20+20µA
RIN1VCC = 3.6V, 0 or open, Figure 1103138190Fail-Safe Input ResistorRIN2VCC = 3.6V, 0 or open, Figure 1154210260kΩ
Input CapacitanceCININ+ or IN- to GND (Note 3)2.2pF
+5V TOLERANT LVTTL/LVCMOS INPUTS (IN, EN_)Input High VoltageVIH2.05.5V
Input Low VoltageVIL00.8V
IIHVIN = 2V to 5.5V20Input CurrentIILVIN = 0 to 0.8V10µA
Input Capacitance (MAX9170)CININ to GND (Note 3)2.2pF
LVDS OUTPUTS (OUT_+, OUT_-)Differential Output VoltageVODFigures 3, 4, 6, 7250350450mV
Change in VOD Between
Complementary Output StatesΔVODFigures 3, 4, 6, 71.525mV
Steady-State Output Offset
VoltageVOSFigures 2, 4, 5, 7, 8, 91.1251.261.375V
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
DC ELECTRICAL CHARACTERISTICS (continued)(VCC= 3.0V to 3.6V, RL= 100Ω±1%, EN_ = high, MAX9169 differential input voltage | VID | = 0.05V to 1.2V, LVDS input common-
mode voltage VCM= | VID/2 | to +2.4V - | VID/2 |, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= 3.3V, | VID|
= 0.2V, VCM= 1.25V, TA= +25°C for MAX9169. Typical values are at VCC= 3.3V, VIN= 0 or VCC, TA= +25°C for MAX9170.)
(Notes 1 and 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSChange in VOS Between
Complementary Output StatesΔVOSFigures 2, 4, 5, 7, 8, 91.525mV
Peak-to-Peak Output Offset
VoltageVOS(P-P)Figures 8, 9 (Note 4)40150mV
VOHFigures 3, 4, 6, 71.65Output VoltageVOLFigures 3, 4, 6, 70.9V
Fail-Safe Differential Output
Voltage (MAX9169)VOD+IN+, IN- open, undriven and shorted, or
undriven and parallel terminated+250+350+450mV
High-Impedance Output CurrentIOZEN_ = low, VOUT_+ = +3.6V or 0,
VOUT_- = +3.6V or 0-0.50.01+0.5µA
Power-Off Output CurrentIOFFVCC = +1.5V, VOUT_+ = +3.6V or 0,
VOUT_- = +3.6V or 0-0.50.01+0.5µA
Output Short-Circuit CurrentIOSVID = +50mV or -50mV,
VOUT+ = 0 or VCC, VOUT- = 0 or VCC-10±5.8+10mA
Magnitude of Differential Output
Short-Circuit CurrentIOSDVID = +50mV or -50mV, VOD = 0 (Note 5)5.810mA
Output CapacitanceCOOUT_+ or OUT_- to GND (Note 6)3.6pF
POWER SUPPLYMAX91692230DC, RL = 100Ω,
Figures 10, 13MAX91701825
MAX91694360Supply CurrentICC
315MHz (630Mbps),
RL = 100Ω, Figures 10, 13MAX91704155
MAX91696.88.0Disabled Supply CurrentICCZEN_ = lowMAX91704.36.4mA
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
Note 1:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except VTH, VTL, VID, VOD, and ΔVOD.
Note 2:Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA= +25°C.
Note 3:Signal generator output for IN+, IN-, or single-ended IN: VIN= 0.4 sin(4E6πt) + 0.5.
Note 4:All input pulses are supplied by a generator having the following characteristics: tRor tF≤1ns, pulse repetition rate (PRR) =
0.5 Mpps, pulsewidth = 500 ±10ns.
Note 5:Guaranteed by design and characterization.
Note 6:Signal generator output for OUT+ or OUT-: VIN= 0.4 sin(4E6πt) + 0.5, EN_ = low.
Note 7:CLincludes scope probe and test jig capacitance.
Note 8:Signal generator output for differential inputs IN+, IN- (unless otherwise noted): frequency = 50MHz, 49% to 51% duty cycle,= 50Ω, tR= 1.0ns, and tF= 1.0ns (0% to 100%). Signal generator output for single-ended input IN (unless otherwise noted):
frequency = 50MHz, 49% to 51% duty cycle, RO= 50Ω, VIH= VCC, VIL= 0V, tR= 1.0ns, and tF= 1.0ns (0% to 100%).
Note 9:Signal generator output for MAX9169 tDJ: VOH= +1.3V, VOL= +1.1V, data rate = 630Mbps, 223-1 PRBS, RO= 50Ω, = 1.0ns and tF= 1.0ns (0% to 100%). Signal generator output for MAX9170 tDJ: VOH= VCC, VOL= 0V, data rate =
630Mbps, 223-1 PRBS, RO= 50Ω, tR= 1.0ns, and tF= 1.0ns (0% to 100%).
Note 10:Signal generator output for MAX9169 tRJ: VOH= +1.3V, VOL= +1.1V, frequency = 315MHz, 50% duty cycle, RO= 50Ω,= 1.0ns, and tF= 1.0ns (0% to 100%). Signal generator output for MAX9170 tRJ: VOH= VCC, VOL= 0V, frequency =
315MHz, 50% duty cycle, RO= 50Ω, tR= 1.0ns, and tF= 1.0ns (0% to 100%).
Note 11:Signal generator output for MAX9169 tSK(P): VOH= +1.4V, VOL= +1.0V, RO= 50Ω, tR= 1.0ns, and tF= 1.0ns (0% to 100%).
Signal generator output for MAX9170 tSK(P): VOH= +3.0, VOL= 0V, RO= 50Ω, tR= 1.0ns, and tF= 1.0ns (0% to 100%).
Note 12:tSK(0)is the magnitude of the time difference between tPLHor tPHLof all drivers of a single device with all of their inputs
connected together.
Note 13:tSK(PP)is the magnitude of the difference in propagation delay times between any specified terminals of two devices when
both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
AC ELECTRICAL CHARACTERISTICS(VCC= 3.0V to 3.6V, RL= 100Ω±1%, CL= 10pF, EN_ = high, MAX9169 differential input voltage | VID | = 0.15V to 1.2V, LVDS input
common-mode voltage VCM= | VID/2 | to +2.4V - | VID/2 |, TA= -40°C to +85°C, unless otherwise noted. Typical values are at | VID| =
0.2V, VCM= 1.25V, VCC= 3.3V, TA= +25°C for MAX9169. Typical values are at VIN= 0 or VCC, VCC= 3.3V, TA= +25°C for
MAX9170.) (Notes 5, 7, and 8)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSRise TimetRFigures 10–150.60.81.2ns
Fall TimetFFigures 10–150.60.81.2ns
Added Deterministic JittertDJ(Note 9)110200ps
Added Random JittertRJ(Note 10)68ps
MAX91692.23.54.2Differential Propagation Delay
High to LowtPHLFigures 10, 11, 13, 14MAX91701.52.63.2ns
MAX91692.23.54.2Differential Propagation Delay
Low to HightPLHFigures 10, 11, 13, 14MAX91701.52.63.2ns
Pulse Skew tPLH - tPHLtSKEWFigures 10, 11, 13, 1440250ps
Pulse Skew tPLH - tPHLtSK(P)Figures 10, 12, 13, 15 (Note 11)40150ps
MAX9169, Figures 10, 11, 1225120Channel-to-Channel Skew
(Note 12)tSK(0)MAX9170, Figures 13, 14, 1515100ps
MAX9169, Figures 10, 11, 120.281.2Differential Part-to-Part Skew
(Note 13)tSK(PP)MAX9170, Figures 13, 14, 150.191.2ns
tPHZHigh to high-Z, Figures 16–191115Disable TimetPLZLow to high-Z, Figures 16–1911.815ns
tPZHHigh-Z to high, Figures 16–192.310Enable TimetPZLHigh-Z to low, Figures 16–195.810ns
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
MAX9169 SUPPLY CURRENT
vs. FREQUENCYMAX9169/70 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
4 CHANNELS ACTIVE
3 CHANNELS ACTIVE
2 CHANNELS ACTIVE
1 CHANNEL ACTIVE
ALL CHANNELS DISABLED
MAX9170 SUPPLY CURRENT
vs. FREQUENCYMAX9169/70 toc02
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
4 CHANNELS ACTIVE
3 CHANNELS ACTIVE
2 CHANNELS ACTIVE
1 CHANNEL ACTIVE
ALL CHANNELS DISABLED
DIFFERENTIAL OUTPUT AMPLITUDE
vs. FREQUENCYMAX9169/70 toc03
FREQUENCY (MHz)
DIFFERENTIAL OUTPUT AMPLITUDE (mV)
VCC = 3.6V
VCC = 3.3V
VCC = 3.0V
TRANSITION TIME
vs. TEMPERATUREMAX9169/70 toc04
TEMPERATURE (°C)
TRANSITION TIME (ns)3510-15
-4085tf
MAX9169 PROPAGATION DELAY
vs. TEMPERATUREMAX9169/70 toc05
TEMPERATURE (°C)
PROPAGATION DELAY (ns)3510-15
tPHL
tPLH
MAX9170 PROPAGATION DELAY
vs. TEMPERATUREMAX9169/70 toc06
TEMPERATURE (°C)
PROPAGATION DELAY (ns)3510-15
tPLH
tPHL
DIFFERENTIAL OUTPUT VOLTAGE
vs. LOAD RESISTORMAX9169/70 toc07
LOAD RESISTOR (Ω)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
TRANSITION TIME
vs. CAPACITIVE LOAD
MAX9169/70 toc08
CAPACITIVE LOAD (pF)
TRANSITION TIME (ps)1197
Typical Operating Characteristics
(VCC= 3.3V, RL= 100Ω, CL= 10pF, | VID| = 150mV, VCM= 1.25V, fIN= 50MHz, TA= +25°C, unless otherwise noted.)
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
Pin Description
Table 1. MAX9169 Input/Output Functions
PIN
MAX9169MAX9170NAMEFUNCTION1EN1
OUT1+/OUT1- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN1 high to enable
OUT1+/OUT1-. Set EN1 low to disable OUT1+/OUT1- (high-impedance mode). Integrated
pulldown to GND.2EN2
OUT2+/OUT2- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN2 high to enable
OUT2+/OUT2-. Set EN2 low to disable OUT2+/OUT2- (high-impedance mode). Integrated
pulldown to GND.3EN3
OUT3+/OUT3- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN3 high to enable
OUT3+/OUT3-. Set EN3 low to disable OUT3+/OUT3- (high-impedance mode). Integrated
pulldown to GND.VCCPower-Supply Voltage. Bypass with 0.1µF and 0.001µF capacitors to ground.5GNDGround—IN+Noninverting Differential LVDS Input—IN-Inverting Differential LVDS Input8EN4
OUT4+/OUT4- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN4 high to enable
OUT4+/OUT4-. Set EN4 low to disable OUT4+/OUT4- (high-impedance mode). Integrated
pulldown to GND.9OUT4-Inverting Differential LVDS Output10OUT4+Noninverting Differential LVDS Output11OUT3-Inverting Differential LVDS Output12OUT3+Noninverting Differential LVDS Output13OUT2-Inverting Differential LVDS Output14OUT2+Noninverting Differential LVDS Output15OUT1-Inverting Differential LVDS Output16OUT1+Noninverting Differential LVDS Output6INData Input, 5V Tolerant LVTTL/LVCMOS. Integrated pulldown to GND.7N.C.No Connection
INPUTOUTPUT
VID = VIN+ - VIN-EN_VODLow or openHigh-Z
+50mVHighHigh
-50mVHighLow
OpenHighHigh
Undriven shortHighHigh
Undriven parallel terminatedHighHigh
Table 2. MAX9170 Input/Output Functions
INPUTOUTPUT
VINEN_VODLow or openHigh-Z
HighHighHigh
LowHighLow
OpenHighLow
Detailed DescriptionLVDS is a signaling method for point-to-point and
multidrop data communication over a controlled-imped-
ance medium as defined by the ANSI TIA/EIA-644 and
IEEE 1596.3 standards. LVDS uses a lower voltage swing
than other common standards, achieving higher data
rates with reduced power consumption, while reducing
EMI emissions and system susceptibility to noise.
The MAX9169/MAX9170 are 630Mbps, four-port
repeaters for high-speed, low-power applications. The
MAX9169 accepts an LVDS input and has a fail-safe
input circuit. The MAX9170 features a +5V tolerant sin-
gle-ended LVTTL/LVCMOS input. Both devices repeat
the input at four LVDS outputs. The MAX9169 detects
differential signals as low as 50mV and as high as 1.2V
over a |VID|/2 to 2.4V - |VID|/2 common-mode range.
The MAX9170’s +5V tolerant LVTTL/LVCMOS input
includes circuitry to hold the decision threshold con-
stant at +1.5V over temperature and supply voltage.
The MAX9169/MAX9170 outputs use a current-steering
configuration to generate a 2.5mA to 4.5mA output cur-
rent. This current-steering approach induces less ground
bounce and shoot-through current, enhancing noise
margin and system speed performance. The outputs are
short-circuit current limited and are high impedance
when disabled or when the device is not powered.
The MAX9169/MAX9170 current-steering output requires
a resistive load to terminate the signal and complete the
transmission loop. Because the devices switch the direc-
tion of current flow and not voltage levels, the output volt-
age swing is determined by the value of the termination
resistor multiplied by the output current. With a typical
3.5mA output current, the MAX9169/MAX9170 produce
a 350mV output voltage when driving a transmission line
terminated with a 100Ωresistor (3.5mA ✕100Ω=
350mV). Logic states are determined by the direction of
current flow through the termination resistor.
Fail-Safe CircuitryThe fail-safe feature of the MAX9169 sets the outputs
high when the differential input is:OpenUndriven and shortedUndriven and terminated
Without a fail-safe circuit, when the input is undriven,
noise at the input may switch the outputs and it may
appear to the system that data is being sent. Open or
undriven terminated input conditions can occur when a
cable is disconnected or cut, or when an LVDS driver
output is in high impedance. A shorted input can occur
because of cable failure.
When the input is driven with signals meeting the LVDS
standard, the input common-mode voltage is less than
VCC- 0.3V and the fail-safe circuit is not activated
(Figure 1). If the input is open, undriven and shorted, or
undriven and parallel terminated, an internal resistor in
the fail-safe circuit pulls both the inputs above VCC-
0.3V, activating the fail-safe circuit and forcing the out-
puts high.
Applications Information
Supply BypassingBypass VCCwith high-frequency surface-mount ceram-
ic 0.1µF and 0.001µF capacitors in parallel as close to
the device as possible, with the smaller value capacitor
closest to the VCCpin. Use multiple parallel vias to min-
imize parasitic inductance.
Traces, Cables, and ConnectorsThe characteristics of differential input and output con-
nections affect the performance of the MAX9169/
MAX9170. Use controlled-impedance traces, cables,
and connectors with matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the traces of a differential pair. Excessive
skew can result in a degradation of magnetic field can-
cellation. Maintain a constant distance between traces
of a differential pair to avoid discontinuities in differen-
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS RepeatersMAX9169
VCC
RIN2
RIN1/2
RIN1/2
VCC - 0.3V
COMPARATOR
IN+
IN-
RECEIVER
OUT1+
OUT1-
OUT4+
OUT4-
Figure 1. MAX9169 Input Fail-Safe Circuit
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS RepeatersMAX9169
IN+
IN-
PULSE
GENERATOR
50Ω
50Ω
OUT1+
OUT4+
OUT4-
OUT1-
VOS
VOS
50Ω
50Ω
50Ω
50Ω
10pF
10pF
10pF
10pF
Figure 2. MAX9169 Output Offset Voltage Test Circuit
est Circuits and Timing Diagramstial impedance. Minimize the number of vias to further
prevent impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon
cable. Balanced cables, such as twisted pair, offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
LVDS receiver.
TerminationThe MAX9169/MAX9170 LVDS outputs are specified for
a 100Ωload but can drive 90Ωto 132Ωto accommo-
date various types of interconnect. The termination
resistor at the driven receiver should match the differ-
ential characteristic impedance of the interconnect and
be located close to the receiver input. Use a ±1% sur-
face-mount termination resistor.
Board LayoutA four-layer PC board with separate layers for power,
ground, and LVDS signals is recommended. Keep
LVTTL/LVCMOS signals separated from the LVDS sig-
nals to prevent crosstalk to the LVDS lines.
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS RepeatersMAX9169
IN+
IN-
PULSE
GENERATOR
50Ω
50Ω
OUT1+
OUT1-
VOD100Ω
3.75kΩ
3.75kΩ
0V ≤ VTEST ≤ 2.4V
OUT4+
OUT4-
VOD100Ω
3.75kΩ
3.75kΩ
0V ≤ VTEST ≤ 2.4V
Figure 3. MAX9169 Differential Output Voltage Test Circuit
est Circuits and Timing Diagrams (continued)IN-
IN+
DIFFERENTIAL0VVID
OUT_-
OUT_+
VOS(-)VOS(-)VOS(+)
(OUT_+) - (OUT_-)
VCM = ((VIN+) - (VIN-)) / 2
ΔVOS = | (VOS(+)) - (VOS(-)) |
ΔVOD = | (VOD_+) - (VOD_-) |
VOL
VOH
VOD = 0V
VOD_-
VOD_+
Figure 4. MAX9169 Output DC Parameters
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS RepeatersMAX9170PULSE
GENERATOR
50Ω
OUT1+
OUT4+
OUT4-
OUT1-
VOS
VOS
50Ω
50Ω
50Ω
50Ω
10pF
10pF
10pF
10pF
Figure 5. MAX9170 Output Offset Voltage Test Circuit
est Circuits and Timing Diagrams (continued)MAX9170PULSE
GENERATOR
50Ω
OUT1+
OUT1-
VOD100Ω
3.75kΩ
3.75kΩ
0V ≤ VTEST ≤ 2.4V
OUT4+
OUT4-
VOD100Ω
3.75kΩ
3.75kΩ
0V ≤ VTEST ≤ 2.4V
Figure 6. MAX9170 Differential Output Voltage Test Circuit
