MAX9155EXT+T Fast Delivery |IC PHOENIX CO.,LIMITED

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MAX9155EXT+T
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package
General Description
The MAX9155 is a low-voltage differential signaling
(LVDS) repeater, which accepts a single LVDS input
and duplicates the signal at a single LVDS output. Its
low-jitter, low-noise performance makes it ideal for
buffering LVDS signals sent over long distances or
noisy environments, such as cables and backplanes.
The MAX9155’s tiny size makes it especially suitable for
minimizing stub lengths in multidrop backplane appli-
cations. The SC70 package (half the size of a SOT23)
allows the MAX9155 to be placed close to the connec-
tor, thereby minimizing stub lengths and reflections on
the bus. The point-to-point connection between the
MAX9155 output and the destination IC, such as an
FPGA or ASIC, allows the destination IC to be located
at greater distances from the bus connector.
Ultra-low, 23psp-padded deterministic jitter and
0.6psRMSadded random jitter ensure reliable commu-
nication in high-speed links that are highly sensitive to
timing errors, especially those incorporating clock-and-
data recovery, PLLs, serializers, or deserializers. The
MAX9155’s switching performance guarantees a
200Mbps data rate, but minimizes radiated noise by
guaranteeing 0.5ns minimum output transition time.
The MAX9155 has fail-safe circuitry that sets the output
high for undriven open, short, or terminated inputs.
The MAX9155 operates from a single +3.3V supply and
consumes only 10mA over a -40°C to +85°C tempera-
ture range. Refer to the MAX9129 data sheet for a quad
bus LVDS driver, and to the MAX9156 data sheet for a
low-jitter, low-noise LVPECL-to-LVDS level translator in
an SC70 package.
Applications
Cellular Phone Base Stations
DSLAMs
Digital Cross-Connects
Add/Drop Muxes
Network Switches/Routers
Multidrop Buses
Cable Repeaters
FeaturesTiny SC70 PackageUltra-Low Jitter
23psp-pAdded Deterministic Jitter23-1 PRBS)
0.6psRMSAdded Random Jitter 0.5ns (min) Transition Time Minimizes Radiated
Noise200Mbps Guaranteed Data RateFail-Safe Circuit Sets Output High for Undriven
Inputs (Open, Terminated, or Shorted)Low 10mA Supply CurrentLow 6mA Supply Current in Fail-SafeConforms to ANSI/EIA/TIA-644 LVDS StandardHigh-Impedance Inputs and Outputs in
Power-Down Mode
MAX9155
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
GND
IN+IN-6OUT+
5VCC
OUT-
MAX9155
SC70
TOP VIEW
Pin Configuration
19-2213; Rev 0; 10/01
Ordering InformationPART TEMP. RANGE PIN -
PA C K A G E TOPM ARK
MAX9155EXT-T-40°C to +85°C6 SC70-6ABC
Typical Operating Circuit appears at end of data sheet.
MAX9155
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
IN+, IN- to GND.....................................................-0.3V to +4.0V
OUT+, OUT- to GND.............................................-0.3V to +4.0V
Short-Circuit Duration (OUT+, OUT-).........................Continuous
Continuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Operating Temperature Range...........................-40°C to +85°C
ESD Protection
Human Body Model, IN+, IN-, OUT+, OUT-....................±8kV
Lead Temperature (soldering, 10s).................................+300°C
DC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100Ω±1%, |VID|= 0.05V to 1.2V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, TA= -40°C to +85°C, unless otherwise
noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXU N I T S
LVDS INPUT
Differential Input High ThresholdVTH750mV
Differential Input Low ThresholdVTL-50-7mV
0.05V ≤ |VID| ≤ 0.6V-15-2.515Input CurrentIIN+, IIN-0.6V< |VID| ≤ 1.2V,-20-3.520µA
0.05V ≤ |VID| ≤0.6V, VCC = 0-151.315Power-Off Input CurrentIIN+, IIN-0.6V < |VID| ≤ 1.2V, VCC = 0-202.620µA
Input Resistor 1RIN1VCC = +3.6V or 0, Figure 167232kΩ
Input Resistor 2RIN2VCC = +3.6V or 0, Figure 12671174kΩ
LVDS OUTPUT
Differential Output VoltageVODFigure 2250360450mV
Change in VOD Between
Complementary Output StatesΔVODFigure 20.00825mV
Offset (Common-Mode) VoltageVOSFigure 21.1251.251.375V
Change in VOS for
Complementary Output StatesΔVOSFigure 20.00525mV
Output High VoltageVOH1.441.6V
Output Low VoltageVOL0.91.08V
Fail-Safe Differential Output
VoltageVOD+IN+, IN- shorted, open, or parallel
terminated+250+360+450mVU T+ = 3.6V , other outp ut op en-100.0210Power-Off Output Leakage
CurrentIOOFFVCC = 0O U T- = 3.6V , other outp ut op en-100.0210µA
Differential Output ResistanceRODIFFVCC = +3.6V or 0100260400Ω
VID = +50mV, OUT+ = GND-5-15Output Short CurrentISCVID = -50mV, OUT- = GND-5-15mA
POWER SUPPLY
Supply CurrentICCOutput loaded1015mA
Supply Current in Fail-SafeICCFOutput loaded, input undriven68mA
MAX9155
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
Note 1:All devices are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design and characterization.
Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except VTH, VTL, VOD, and ΔVOD.
Note 3:Guaranteed by design and characterization.
Note 4:Signal generator output (unless otherwise noted): frequency = 100MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF=
1.5ns (0% to 100%).
Note 5:CLincludes scope probe and test jig capacitance.
Note 6:Signal generator output for tDJ: VOD= 150mV, VOS= 1.2V, tDJincludes pulse (duty-cycle) skew.
Note 7:Signal generator output for tRJ: VOD= 150mV, VOS= 1.2V.
Note 8:tSKPP1is the magnitude difference of any differential propagation delays between devices operating over rated conditions
at the same supply voltage, input common-mode voltage, and ambient temperature.
Note 9:tSKPP2is the magnitude difference of any differential propagation delays between devices operating over rated conditions.
Note 10:Device meets VODDC specification and AC specifications while operating at fMAX.
Note 11:Jitter added to the input signal.
AC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.15V to 1.2V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 3, 4, 5) (Figures 3, 4)
PARAMETERSYMBOLCONDITIONSMINTYPMAXU N I T S
Differential Propagation Delay High to
LowtPHLD1.32.02.8ns
Differential Propagation Delay Low to
HightPLHD1.32.02.8ns
Added Deterministic Jitter (Notes 6, 11)tDJ200Mbps 223-1 PRBS data pattern23100psp-p
Added Random Jitter (Notes 7, 11)tRJfIN = 100MHz0.62.9psRMS
Differential Part-to-Part Skew (Note 8)tSKPP10.170.6ns
Differential Part-to-Part Skew (Note 9)tSKPP21.5ns
Switching Supply CurrentICCSW11.318mA
Rise TimetTLH0.50.661.0ns
Fall TimetTHL0.50.641.0ns
Input Frequency (Note 10)fMAX100MHz
MAX9155
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package100501502002512575175225250
SUPPLY CURRENT
VS. INPUT FREQUENCY
MAX9155 toc01
INPUT FREQUENCY (MHz)
SUPPLY CURRENT (mA)
SWITCHING SUPPLY CURRENT
VS. TEMPERATURE
MAX9155 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
OUTPUT SHORT-CIRCUIT CURRENT
VS. SUPPLY VOLTAGE
MAX9155 toc03
SUPPLY VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
FAIL-SAFE SUPPLY CURRENT
VS. SUPPLY VOLTAGE
MAX9155 toc04
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
OUTPUT LOW VOLTAGE
VS. SUPPLY VOLTAGE
MAX9155 toc05
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE (V)
OUTPUT HIGH VOLTAGE
VS. SUPPLY VOLTAGE
MAX9155 toc06
SUPPLY VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY
VS. SUPPLY VOLTAGE
MAX9155 toc07
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
DIFFERENTIAL PROPAGATION DELAY
VS. TEMPERATURE
MAX9155 toc08
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
TRANSITION TIME
VS. SUPPLY VOLTAGE
MAX9155 toc09
SUPPLY VOLTAGE (V)
TRANSITION TIME (ps)
tTHL
tTLH
Typical Operating Characteristics
(VCC= +3.3V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:
frequency = 100MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
Detailed Description
The LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled-impedance medium, as defined by the ANSI/
TIA/EIA-644 and IEEE 1596.3 standards. The LVDS
standard uses a lower voltage swing than other com-
mon communication standards, achieving higher data
rates with reduced power consumption while reducing
EMI emissions and system susceptibility to noise.
The MAX9155 is a 200Mbps LVDS repeater intended
for high-speed, point-to-point, low-power applications.
The MAX9155 accepts an LVDS input and reproduces
an LVDS signal at the output. This device is capable of
detecting differential signals as low as 50mV and as
high as 1.2V within a 0 to 2.4V input voltage range. The
LVDS standard specifies an input voltage range of 0 to
2.4V referenced to ground.
Fail-Safe
Fail-safe is a feature that puts the output in a known
logic state (differential high) under certain fault condi-
tions. The MAX9155 outputs are differential high when
the inputs are undriven and open, terminated, or shorted
(Table 1).
MAX9155
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
TRANSITION TIME
VS. TEMPERATURE
MAX9155 toc10
TEMPERATURE (°C)
TRANSITION TIME (ps)
tTLH, tTHL
DIFFERENTIAL OUTPUT VOLTAGE
VS. LOAD RESISTOR
MAX9155 toc11
LOAD RESISTOR (Ω)
DIFFERENTIAL OUTPUT VOLTAGE (mV)50100125
Typical Operating Characteristics (continued)
(VCC= +3.3V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:
frequency = 100MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
Pin Description
PINNAMEFUNCTIONOUT-Inverting LVDS OutputGNDGroundIN-Inverting LVDS InputIN+Noninverting LVDS Input
5VCCPower Supply. Bypass VCC to GND
with 0.01µF ceramic capacitor.OUT+Noninverting LVDS Output
INPUT, VIDOUTPUT, VOD 50mVHigh -50mVLow
50mV > VID > -50mVIndeterminate
Undriven open, short, or terminatedHigh
Note:VID= (IN+ - IN-), VOD= (OUT+ - OUT-)
High = 450mV ≥VOD≥250mV
Low = -250mV ≥VOD≥-450mV
Table 1. Function Table for LVDS Fail-Safe
Input (Figure 2)
MAX9155
Applications Information
Supply Bypassing
Bypass VCCwith a high-frequency surface-mount
ceramic 0.01µF capacitor as close to the device as
possible.
Differential Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9155. Use controlled-impedance dif-
ferential traces. Ensure that noise couples as common
mode by running the traces within a differential pair
close together.
Maintain the distance within a differential pair to avoid
discontinuities in differential impedance. Avoid 90°
turns and minimize the number of vias to further prevent
impedance discontinuities.
Cables and Connectors
The LVDS standards define signal levels for intercon-
nect with a differential characteristic impedance and
termination of 100Ω. Interconnects with a characteristic
impedance and termination of 90Ωto 132Ωimpedance
are allowed, but produce different signal levels (see
Termination).
Use cables and connectors that have matched differen-
tial impedance to minimize impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon or
coaxial cable. Balanced cables, such as twisted pair,
offer superior signal quality and tend to generate less
EMI due to canceling effects. Balanced cables tend to
pick up noise as common mode, which is rejected by
the LVDS receiver.
Termination
For point-to-point links, the termination resistor should
be located at the LVDS receiver input and match the
differential characteristic impedance of the transmis-
sion line.
For a multidrop bus driven at one end, terminate at the
other end of the bus with a resistor that matches the
loaded differential characteristic impedance of the bus.
For a multidrop bus driven from a point other than the
end, terminate each end of the bus with a resistor that
matches the loaded differential characteristic imped-
ance of the bus. When terminating at both ends, or for a
large number of drops, a bus LVDS (BLVDS) driver is
needed to drive the bus to LVDS signal levels. The
MAX9155 is not intended to drive double-terminated
multidrop buses to LVDS levels.
The differential output voltage level depends upon the
differential characteristic impedance of the interconnect
and the value of the termination resistance. The
MAX9155 is guaranteed to produce LVDS output levels
into 100Ω. With the typical 3.6mA output current, the
MAX9155 produces an output voltage of 360mV when
driving a 100Ωtransmission line terminated with a
100Ωtermination resistor (3.6mA x 100Ω= 360mV). For
typical output levels with different loads, see the
Differential Output Voltage vs. Load Resistor typical
operating curve.
Chip Information
TRANSISTOR COUNT: 401
PROCESS: CMOS
Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package

Partno	Mfg	Dc	Qty	Available	Descript
MAX9155EXT+T \|MAX9155EXTT	MAXIM	N/a	60	avai	Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package