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MAX9153EUI+ |MAX9153EUIMAXIMN/a206avaiLow-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100Ω Drive
MAX9153EUI+T |MAX9153EUITMAXIMN/a6856avaiLow-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100Ω Drive


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MAX9153EUI+-MAX9153EUI+T
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100Ω Drive
General Description
The MAX9153/MAX9154 low-jitter, low-voltage differential
signaling (LVDS) repeaters are ideal for applications that
require high-speed data or clock distribution while mini-
mizing power, space, and noise. The devices accept a
single LVDS input (MAX9153) or single LVPECL input
(MAX9154) and repeat the signal at 10 LVDS outputs.
Each differential output drives 100Ω, allowing point-to-
point distribution of signals on transmission lines with
100Ωtermination at the receiver input.
Ultra-low 90psp-p(max) added deterministic jitter and
1psRMS(max)added random jitter ensure reliable com-
munication in high-speed links that are highly sensitive to
timing error, especially those incorporating clock-and-
data recovery or serializers and deserializers. The high-
speed switching performance guarantees 800Mbps data
rate and less than 60ps (max) skew between channels
while operating from a single +3.3V supply.
Supply current at 800Mbps is 118mA and reduces to
2µA in power-down mode. LVDS inputs and outputs con-
form to the ANSI/EIA/TIA -644 standard. A fail-safe fea-
ture on the MAX9153 sets the output high when the input
is undriven and open, terminated, or shorted. The
MAX9153/MAX9154 are available in a 28-pin TSSOP
package and are specified for the -40°C to +85°C
extended temperature range.
Refer to the MAX9150 data sheet for a pin-compatible
10-port LVDS repeater capable of driving a double-termi-
nated (50Ω) LVDS link.
Refer to the MAX9110/MAX9112 and MAX9111/MAX9113
data sheets for LVDS line drivers and receivers.
Applications

Cellular Phone Base-Stations
Add/Drop Muxes
Digital Cross-Connects
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Features
Ultra-Low 90psp-p(max) Added Deterministic
Jitter at 800Mbps (223-1) PRBS Pattern
1psRMS(max) Added Random Jitter60ps (max) Skew Between ChannelsGuaranteed 800Mbps Data RateLVDS (MAX9153) or LVPECL (MAX9154) Input
Versions
Fail-Safe Circuit Sets Output High for Undriven
Inputs (MAX9153)
High-Impedance Differential Input when VCC= 02µA Power-Down Supply CurrentConforms to ANSI/EIA/TIA-644 LVDS StandardPin-Compatible Upgrade to DS90LV110
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDrive

19-2167; Rev 0; 10/01
Ordering Information
PARTTEMP.
RANGE
PIN-
PACKAGEINPUT
MAX9153EUI
-40°C to +85°C28 TSSOPLVDS
MAX9154EUI
-40°C to +85°C28 TSSOPLVPECL
Pin Configuration appears at end of data sheet.

100Ω
LVDS
LVDS
BACKPLANE
OR CABLE
1
10
100Ω
100Ω
MAX9153
MAX9154RX
RX
MAX9111
MAX9111
TX
MAX9110
*(LVPECL INPUT FOR MAX9154)
Typical Application Circuit
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDrive
ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, differential input voltage |VID| = 0.05V to 1.2V, MAX9153 LVDS input common-mode voltage
VCM= |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN= high, TA= -40°C to +85°C, unless other-
wise noted. Typical values are at VCC= +3.3V, |VID| = 0.2V, VCM= 1.2V, TA= +25°C.) (Notes 1 and 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
RIN+, RIN- to GND................................................-0.3V to +4.0V
PWRDNto GND..........................................-0.3V to (VCC+ 0.3V)
DO_+, DO_- to GND..............................................-0.3V to +4.0V
Short-Circuit Duration (DO_+, DO_-).........................Continuous
Continuous Power Dissipation (TA= +70°C)
28-Pin TSSOP (derate 12.8mW/°C above +70°C).....1026mW
Storage Temperature.........................................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Operating Temperature Range...........................-40°C to +85°C
ESD Protection
Human Body Model (RIN+, RIN-, DO_+, DO_-)..............±8kV
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CONTROL INPUT (PWRDN)

Input High VoltageVIH2.0VCCV
Input Low VoltageVILGND0.8V
Input CurrentIINPWRDN = high or low-2020µA
DIFFERENTIAL INPUT (RIN+, RIN-)

Differential Input High ThresholdVTH-350mV
Differential Input Low ThresholdVTL-50-3mV
0.05V ≤ | VID | ≤ 0.6V, PWRDN = high or low
(Figure 1)-15-315
Input Current (MAX9153)IRIN+,
IRIN-0.6V < | VID | ≤ 1.2V, PWRDN = high or low
(Figure 1)-20-420
0.05V ≤ | VID | ≤ 0.6V, VCC = 0 or open,
PWRDN = 0 or open (Figure 1)-15315Power-Off Input Current
(MAX9153)
IRIN+ (OFF),
IRIN- (OFF)0.6V < | VID | ≤ 1.2V, VCC = 0 or open,
PWRDN = 0 or open (Figure 1)-20420
PWRDN = high or low (Figure 1)103
Input Resistor 1 (MAX9153)RIN1VCC = 0 or open, PWRDN = 0 or open
(Figure 1)103kΩ
PWRDN = high or low (Figure 1)154
Input Resistor 2 (MAX9153)RIN2VCC = 0 or open, PWRDN = 0 or
open(Figure 1)154kΩ
VRIN+ = 3.6V, VRIN- = 3.6V or 0, PWRDN =
high or low (Figure 2)-10310
Input Current (MAX9154)IRIN+,
IRIN-VRIN+ = 0, VRIN- = 3.6V or 0, PWRDN =
high or low (Figure 2)-10±310
VRIN+ = 3.6V, VRIN- = 0, VCC = 0 or open,
PWRDN = 0 or open (Figure 2)-10310Power-Off Input Current
(MAX9154)
IRIN+ (OFF),
IRIN- (OFF)VRIN+ = 0, VRIN- = 3.6V, VCC = 0 or open,
PWRDN = 0 or open (Figure 2)-10310
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDriveELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, differential input voltage |VID| = 0.05V to 1.2V, MAX9153 LVDS input common-mode voltage
VCM= |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN= high, TA= -40°C to +85°C, unless other-
wise noted. Typical values are at VCC= +3.3V, |VID| = 0.2V, VCM= 1.2V, TA= +25°C.) (Notes 1 and 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

PWRDN = high or low (Figure 2)360
Input Resistor 3 (MAX9154)RIN3VCC = 0 or open, PWRDN = 0 or open
(Figure 2)360kΩ
LVDS OUTPUT (DO_+, DO_-)

Differential Output VoltageVODFigure 3250380450mV
Charge in VOD Between
Complementary Output StatesΔVODFigure 3125mV
Offset (Common-Mode) VoltageVOSFigure 31.1251.261.375V
Change in VOS Between
Complementary Output StatesΔVOSFigure 3325mV
Output High VoltageVOHFigure 31.6V
Output Low VoltageVOLFigure 30.9V
PWDRN = high or lowDifferential Output ResistanceRODIFFVCC = 0 PWDRN = 0 or open150238330Ω
RIN+, RIN- undriven with short, open, or
100Ω termination (MAX9153)250450Differential High Output
Voltage in Fail-SafeVOD+
RIN+, RIN- open (MAX9154)250450
PWDRN = low; VDO_+ = 3.6V or 0, DO_- +
open; or VDO_- = 3.6V or 0, DO_+ = open-11
Single-Ended Output Short-
Circuit CurrentIOZVCC = 0, PWRDN = 0 or open; VDO_+ = 3.6V
or 0, DO_- = 3.6V or VDO_- = 3.6V or 0,
DO_+ = open1
VID = +50mV, VDO_+ = 0 or VCC, VDO_- = 0
or VCCSingle-Ended Output
Short-Circuit CurrentIOSVID = -50mV, VDO_+ = 0 or VCC, VDO_- = 0
or VCC
-1515mA
VID = +50mV, VOD = 0Differential Output Short-Circuit
Current (Note 3)IOSDVID = -50mV, VOD = 0-1515mA
SUPPLY

DC, RL = 100Ω (Figure 4)7095
200MHz (400Mbps), RL = 100Ω90115Supply CurrentICC
400MHz (800Mbps), RL = 100Ω
Figure 4
(Note 3)118145
Power-Down Supply CurrentICCZPWDRN = low220µA
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDrive
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced
to ground except VTH, VTL, VID, VOD, and ΔVOD.
Note 2:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are
production tested at TA= +25°C.
Note 3:
Guaranteed by design and characterization.
Note 4:
CLincludes scope probe and test jig capacitance.
Note 5:
Signal generator conditions unless otherwise noted: frequency = 400MHz, 50% duty cycle, RO= 50Ω, tR= 0.6ns,
and tF= 0.6ns (0% to 100%).
Note 6:
Device jitter added to the input signal.
Note 7:
tCCSis the magnitude difference in differential propagation delay between outputs for a same-edge transition.
Note 8:
tPPS1is the magnitude difference of any differential propagation delays between devices operating over rated
conditions at the same supply voltage, input conditions, and ambient temperature.
Note 9:
TPPS2is the magnitude difference of any differential propagation delays between devices operating over rated conditions.
Note 10:Device meets VOD
DC specification, and AC specifications while operating at fMAX.ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100Ω±1%, CL= 5pF, differential input voltage |VID| = 0.15V to 1.2V, MAX9153 LVDS input common-
mode voltage VCM= |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN= high, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, |VID| = 0.2V, VCM= 1.2V, TA= +25°C.) (Notes 3, 4, 5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Rise TimetLHT150220450ps
Fall TimetHLTFigures 4, 5150220450ps
400Mbps (NRZ)1350Added Deterministic Jitter
(Note 6)tDJVID = 200mV, 223 - 1
PRBS data, VCM = 1.2V800Mbps (NRZ)2490
(p-p)
200MHz1
Added Random Jitter (Note 6)tRJVID = 200mV, 50% duty
cycle input, VCM = 1.2V400MHz1
(RMS)
Differential Propagation Delay
Low to HightPLHD1.62.33.3
Differential Propagation Delay
High to LowtPHLD
Figures 4, 5
Pulse Skew | tPLHD - tPHLD |tSKEWFigures 4, 52780ps
Channel-to-Channel Skew
(Note 7)tCCSFigures 4, 53560ps
Differential Part-to-Part Skew 1
(Note 8)tPPS11.2ns
Differential Part-to-Part Skew 2
(Note 9)tPPS2
Figures 4, 5
1.7ns
Maximum Input Frequency
(Note 10)fMAXFigures 4, 5800Mbps
Power-Down TimetPD1020ns
Power-Up TimetPUFigures 6, 72040µs
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDrive

DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9153/54 toc02
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPLHD
tPHLD
DIFFERENTIAL PROPAGATION DELAY
vs. OUTPUT LOAD
MAX9153/54 toc03
OUTPUT LOAD (Ω)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPLHD
tPHLD
SUPPLY CURRENT vs. FREQUENCY
MAX9153/54 toc01
INPUT FREQUENCY (MHz)
SUPPLY CURRENT (mA)
Typical Operating Characteristics

(VCC= +3.3V, RL= 100Ω, CL= 5pF, |VID| = 200mV, VCM= 1.2V, fIN= 200MHz, TA= +25°C, unless otherwise noted.)
DIFFERENTIAL OUTPUT-TO-OUTPUT
SKEW vs. SUPPLY VOLTAGE

MAX9153/54 toc05
SUPPLY VOLTAGE (V)
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW (ps)
A, FI
A = DO5 - DO1
C = DO5 - DO3
E = DO5 - DO6
G = DO5 - DO8
I = DO5 - D010
B = DO5 - DO2
D = DO5 - DO4
F = DO5 - DO7
H = DO5 - DO9
TRANSITION TIME vs. SUPPLY VOLTAGE
MAX9153/54 toc06
SUPPLY VOLTAGE (V)
TRANSITION TIME (ps)
tHLT
tLHT
DIFFERENTIAL PROPAGATION DELAY
vs. INPUT COMMON-MODE VOLTAGE
MAX9153/54 toc04
INPUT COMMON MODE-MODE VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPLHD
tPHLD
TRANSITION TIME vs. LOAD CAPACITANCE
MAX9153/54 toc08
LOAD CAPACITANCE (pF)
TRANSITION TIME (ps)
tHLT
tLHT
TRANSITION TIME vs. OUTPUT LOAD
MAX9153/54 toc07
OUTPUT LOAD (Ω)
TRANSITION TIME (ps)
tHLT
tLHT
Detailed Description
LVDS is a signaling method for point-to-point data com-
munication over a controlled-impedance medium as
defined by the ANSI/TIA/EIA-644 and IEEE 1596.3 stan-
dards. LVDS uses a lower voltage swing than other
common communication standards, achieving higher
data rates with reduced power consumption, while
reducing EMI emissions and system susceptibility to
noise.
The MAX9153/MAX9154 are 800Mbps, 10-port
repeaters for high-speed, point-to-point, low-power
applications. The MAX9153 accepts an LVDS input and
has a fail-safe input circuit. The MAX9154 accepts an
LVPECL input. Both devices repeat the input at 10 LVDS
outputs. The devices detect differential signals as low
as 50mV and as high as 1.2V within the 0 to 2.4V input
voltage range as specified in the LVDS standards.
The MAX9153/MAX9154 outputs use a current-steering
configuration to generate a 2.5mA to 4.5mA output cur-
rent. This current-steering approach induces less
ground bounce and no shoot-through current, enhanc-
ing noise margin and system speed performance. The
outputs are short-circuit current limited and are high
PINNAMEFUNCTION

1, 3, 11, 13,
16, 18, 20,
24, 26, 28
DO2+, DO1+, DO10+,
DO9+, DO8+, DO7+,
DO6+, DO5+, DO4+, DO3+
2, 4, 12, 14,
15, 17, 19,
23, 25, 27
DO2-, DO1-, DO10-, DO9-,
DO8-, DO7-,
DO6-, DO5-, DO4-, DO3-
Differential LVDS OutputsPWRDNPower Down. Drive PWRDN low to disable all outputs and reduce supply current
to 2µA. Drive PWRDN high for normal operation.
6, 9, 21GNDGround
10, 22VCCPower. Bypass each VCC pin to GND with 0.1µF and 1nF ceramic capacitors.
7RIN+
8RIN-
LVDS (MAX9153) or LVPECL (MAX9154) Differential Inputs. RIN+ and RIN- are
high-impedance inputs. Connect a resistor from RIN+ to RIN- to terminate the
input signal.
Pin Description
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100ΩDrive
Typical Operating Characteristics (continued)

(VCC= +3.3V, RL= 100Ω, CL= 5pF, |VID| = 200mV, VCM= 1.2V, fIN= 200MHz, TA= +25°C, unless otherwise noted.)
DIFFERENTIAL OUTPUT vs.
OUTPUT LOAD
MAX9153/54 toc10
OUTPUT LOAD (Ω)
DIFFERENTIAL OUTPUT (mV)70110130
DIFFERENTIAL OUTPUT vs.
SUPPLY VOLTAGE
MAX9153/54 toc09
SUPPLY VOLTAGE (V)
DIFFERENTIAL OUTPUT (mV)
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