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MAX9150EUI
Low-Jitter / 10-Port LVDS Repeater
MAX9150
Low-Jitter, 10-Port LVDSRepeater19-1815; Rev 0; 10/0019-1815; Rev 0; 10/00
Ordering Information
Typical Application Circuit
Pin Configuration
General DescriptionThe MAX9150 low-jitter, 10-port, low-voltage differential
signaling (LVDS) repeater is designed for applications
that require high-speed data or clock distribution while
minimizing power, space, and noise. The device
accepts a single LVDS input and repeats the signal at
10 LVDS outputs. Each differential output drives a total
of 50Ω, allowing point-to-point distribution of signals on
transmission lines with 100Ωterminations on each end.
Ultra-low 120ps (max) peak-to-peak jitter (deterministic
and random) ensures reliable communication in high-
speed links that are highly sensitive to timing error,
especially those incorporating clock-and-data recovery,
or serializers and deserializers. The high-speed switch-
ing performance guarantees 400Mbps data rate and
less than 100ps skew between channels while operat-
ing from a single +3.3V supply.
Supply current at 400Mbps is 160mA (max) and is
reduced to 60µA (max) in low-power shutdown mode.
Inputs and outputs conform to the EIA/TIA-644 LVDS
standard. A fail-safe feature sets the outputs high when
the input is undriven and open, terminated, or shorted.
The MAX9150 is available in a 28-pin TSSOP package.
Refer to the MAX9110/MAX9112 and MAX9111/MAX9113
data sheets for LVDS line drivers and receivers.
________________________ApplicationsCellular Phone Base Stations
Add/Drop Muxes
Digital Crossconnects
Network Switches/Routers
Backplane Interconnect
Clock Distribution
FeaturesUltra-Low 120psp-p(max) Total Jitter
(Deterministic and Random)100ps (max) Skew Between ChannelsGuaranteed 400Mbps Data Rate60µA Shutdown Supply CurrentConforms to EIA/TIA-644 LVDS StandardSingle +3.3V SupplyFail-Safe Circuit Sets Output High for Undriven
Inputs
High-Impedance LVDS Input when VCC= 0
MAX9150
Low-Jitter, 10-Port LVDSRepeater
ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, |VID|= 0.1V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
RIN+, RIN- to GND................................................-0.3V to +4.0V
PWRDNto GND..........................................-0.3V to (VCC+ 0.3V)
DO_+, DO_-...........................................................-0.3V to +4.0V
Short-Circuit Duration (DO_+, DO_-).........................Continuous
Continuous Power Dissipation (TA= +70°C)
28-Pin TSSOP (derate 12.8mW/°C above +70°C).....1026mW
Storage Temperature.........................................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Operating Temperature Range...........................-40°C to +85°C
Lead Temperature (soldering, 10s).................................+300°C
MAX9150
Low-Jitter, 10-Port LVDSRepeater
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, |VID|= 0.1V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, CL= 5pF, |VID|= 0.2V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C
to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 2–5)
MAX9150
Low-Jitter, 10-Port LVDSRepeater
Typical Operating Characteristics
(Figure 2, VCC= +3.3V, RL= 50Ω, CL= 5pF, IVIDI = 200mV, VCM= 1.2V, fIN= 50MHz, TA = +25°C, unless otherwise noted.)
Note 1:Current-into-device pins is defined as positive. Current-out-of-device pins is defined as negative. All voltages are
referenced to ground, except VTH, VTL, VOD, and ∆VOD.
Note 2:Guaranteed by design, not production tested.
Note 3:AC parameters are guaranteed by design and characterization.
Note 4:CLincludes scope probe and test jig capacitance.
Note 5:Signal generator conditions, unless otherwise noted: frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1ns, and tF=
1ns (0% to 100%).
Note 6:Signal generator conditions for tJPP: VOD= 200mV, VOS= 1.2V, frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1ns,
and tF= 1ns (0% to 100%. tJPPincludes pulse (duty cycle) skew.
Note 7:tSKOOis the magnitude difference in differential propagation delay between outputs for a same-edge transition.
Note 8:tSKPPis the |MAX - MIN|differential propagation delay.
Note 9:Device meets VODand AC specifications while operating at fMAX.ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, CL= 5pF, |VID|= 0.2V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C
to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 2–5)
MAX9150
Low-Jitter, 10-Port LVDSRepeater
Typical Operating Characteristics (continued)
(Figure 2, VCC= +3.3V, RL= 50Ω, CL= 5pF, IVIDI = 200 mV, VCM= 1.2V, fIN= 50MHz, TA = +25°C, unless otherwise noted.)
Detailed Description
The LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled impedance medium, as defined by the
ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The
LVDS standard uses a lower voltage swing than other
common communication standards, achieving higher
data rates with reduced power consumption while
reducing EMI emissions and system susceptibility to
noise.
The MAX9150 is a 400Mbps, 10-port LVDS repeater
intended for high-speed, point-to-point, low-power
applications. This device accepts an LVDS input and
repeats it on 10 LVDS outputs. The device is capable of
detecting differential signals as low as 100mV and as
high as 1V within a 0 to 2.4V input voltage range. The
LVDS standard specifies an input voltage range of 0 to
2.4V referenced to ground.
The MAX9150 outputs use a current-steering configura-
tion to generate a 5mA to 9mA output current. This cur-
rent-steering approach induces less ground bounce
and no shoot-through current, enhancing noise margin
and system speed performance. The driver outputs are
short-circuit current limited, and are high impedance
(to ground) when PWRDN= low or the device is not
powered. The outputs have a typical differential resis-
tance of 240Ω.
The MAX9150 current-steering architecture requires a
resistive load to terminate the signal and complete the
transmission loop. Because the device switches the
direction of current flow and not voltage levels, the out-
put voltage swing is determined by the total value of
the termination resistors multiplied by the output cur-
rent. With a typical 6.4mA output current, the MAX9150
produces a 320mV output voltage when driving a trans-
mission line terminated at each end with a 100Ωtermi-
nation resistor (6.4mA x 50Ω= 320mV). Logic states
are determined by the direction of current flow through
the termination resistors.
Fail-Safe
Fail-safe is a receiver feature that puts the output in a
known logic state (high) under certain fault conditions.
The MAX9150 outputs are differential high when the
inputs are undriven and open, terminated, or shorted
(Table 1).
MAX9150
Low-Jitter, 10-Port LVDSRepeater
