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MAX8834YEWP+T
Adaptive Step-Up Converters with 1.5A Flash Driver
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverEVALUATION KIT AVAILABLE
General DescriptionThe MAX8834Y/MAX8834Z flash drivers integrate a
1.5A PWM DC-DC step-up converter and three pro-
grammable low-side, low-dropout LED current regula-
tors. The step-up converter features an internal
switching MOSFET and synchronous rectifier to
improve efficiency and minimize external component
count. An I2C interface provides flexible control of step-
up converter output voltage setting, movie/flash mode
selection, flash timer duration settings, and current reg-
ulator settings. The MAX8834Y/MAX8834Z operate
down to 2.5V, making them future proof for new battery
technologies.
The MAX8834Y/MAX8834Z consist of two current regula-
tors for the flash/movie mode. Each current regulator can
sink 750mA in flash mode and 125mA in movie mode.
The MAX8834Y/MAX8834Z also integrate a 16mA low-
current regulator that can be used to indicate camera
status. The indicator current regulator includes program-
mable ramp and blink timer settings. A programmable
input current limit, invoked using the GSMB control,
reduces the total current drawn from the battery during
PA transmit events. This ensures the flash current is set
to the maximum possible for any given operating condi-
tion. Additionally, the MAX8834Y/MAX8834Z include a
MAXFLASH function that adaptively reduces flash cur-
rent during low battery conditions to help prevent system
undervoltage lockup.
Other features include an optional NTC input for finger-
burn protection and open/short LED detection. The
MAX8834Y switches at 2MHz, providing best overall
efficiency. The MAX8834Z switches at 4MHz, providing
smallest overall solution size. The MAX8834Y/
MAX8834Z are available in a 20-bump, 0.5mm pitch
WLP package (2.5mm x 2.0mm).
Features2.5V to 5.5V Operation RangeStep-Up DC-DC Converter
1.5A Guaranteed Output Current
Adaptive or I2C Programmable Output Voltage
2MHz and 4MHz Switching Frequency OptionsTwo Flash/Movie LED Current Regulators2C Programmable Flash and Movie Current
Low-Dropout Voltage (110mV max) at 500mALED Indicator Current Regulator
I2C Programmable Output Current
Ramp and Blink Timers for Indicator Mode
Low-Dropout Voltage (130mV max) at 16mAI2C Programmable Safety and Watchdog TimersGSM Blank Logic InputMAXFLASH System Lockup ProtectionRemote Temperature Sensor Input Open/Short LED DetectionThermal Shutdown Protection< 1µA Shutdown Current20-Bump, 0.5mm Pitch, 2.5mm x 2.0mm WLPAGND
PGND
OUT
INPUT
2.5V TO 5.5V
FLED1
LED_EN
SCL
SDA
VDD
VLOGIC
I2C
COMP
FLASH ON
1.5A TOTAL
FLASH
PROGRAMMABLE
OUTPUT
3.7V TO 5.2V
FLED2
NTC
GSMBPA_TXONINDLED
16mA INDICATOR
FINGER-BURN
PROTECTION
1µH OR 2.2µH
MAX8834Y
MAX8834Z
FGND
10µF10µF
0.1µF
Typical Operating Circuit
Ordering Information
PARTTEMP
RANGEPIN-PACKAGE
SWITCHING
FREQUENCY
(MHz)
MAX8834YEWP+T -40°C to
+85°C
20 WLP
(2.5mm x 2.0mm) 2
MAX8834ZEWP+T -40°C to
+85°C
20 WLP
(2.5mm x 2.0mm) 4
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Pin Configuration appears at end of data sheet.
ApplicationsCell Phones and Smart Phones
PDAs, Digital Cameras, and Camcorders
Visit www.maximintegrated.com/products/patentsfor
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN= 3.6V, VAGND= VPGND= VFGND= 0V, VDD= 1.8V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
*This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board
level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry-standard specification, JEDEC 020A, para-
graph 7.6, Table 3 for IR/VPR and Convection reflow. Preheating is required. Hand or wave soldering is not allowed.
IN, OUT, NTC to AGND.........................................-0.3V to +6.0V
VDDto AGND.........................................................-0.3V to +4.0V
SCL, SDA, LED_EN, GSMB to AGND........-0.3V to (VDD+ 0.3V)
FLED1, FLED2, INDLED to FGND............-0.3V to (VOUT+ 0.3V)
COMP to AGND...........................................-0.3V to (VIN+ 0.3V)
PGND, FGND to AGND.........................................-0.3V to +0.3V
ILXCurrent (rms)......................................................................3A
Continuous Power Dissipation (TA= +70°C)
(derate 17.5mW/°C above +70°C).............................1410mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Bump Temperature* (soldering)......................................+260°C
PARAMETERCONDITIONSMINTYPMAXUNITS IN Operating Voltage 2.5 5.5 V
VDD Operating Range 1.62 3.6 V
VDD Undervoltage Lockout
(UVLO) Threshold VDD falling 1.25 1.4 1.55 V
VDD UVLO Hysteresis 50 mV
IN UVLO Threshold VIN falling 2.15 2.3 2.45 V
IN UVLO Hysteresis 50 mV
IN Standby Supply Current VSCL = VSDA = VDD, VIN = 5.5V, I2C ready 1 µA
VDD Standby Supply Current
(All Outputs Off, I2C Enabled) VSCL = VSDA = VDD = 3.6V, I2C ready 4 7 µA
LOGIC INTERFACE LED_EN, GSMB 1.4
Logic Input-High Voltage VDD = 1.62V to 3.6V SCL, SDA 0.7 x
VDD
LED_EN, GSMB 0.4
Logic Input-Low Voltage VDD = 1.62V to 3.6V SCL, SDA 0.3 x
VDD
LED_EN Minimum High Time
(LED_EN is Internally Sampled
by a 1MHz Clock) 1 µs
LED_EN Propagation Delay From LED_EN going high to rising edge on current
regulator 3 µs
LED_EN and GSMB Pulldown
Resistor 400 800 1600 k
TA = +25°C -1 0.01 +1 Logic Input Current (SCL, SDA) VIL = 0V or VIH= 3.6V µA
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
PARAMETER CONDITIONS MIN TYP MAX UNITS TA = +25°C -1 0.01 +1 Shutdown Leakage Current IN and VDD in UVLO,
VLED_EN = VGSMB = 0V TA = +85°C 0.1 µA
I2C INTERFACE SDA Output Low Voltage ISDA = 3mA 0.03 0.4 V
I2C Clock Frequency 400 kHz
Bus-Free Time Between STOP
and START tBUF 1.3 µs
Hold Time Repeated START
Condition tHD_STA 0.6 0.1 µs
SCL Low Period tLOW 1.3 0.2 µs
SCL High Period tHIGH 0.6 0.2 µs
Setup Time Repeated START
Condition tSU_STA 0.6 0.1 µs
SDA Hold Time tHD_DAT 0 -0.01 µs
SDA Setup Time tSU_DAT 100 50 ns
Setup Time for STOP Condition tSU_STO 0.6 0.1 µs
STEP-UP DC-DC CONVERTER OUT Voltage Range 100mV steps 3.7 5.2 V
OUT Voltage Accuracy No load, VOUT = 5V -2.75 ±0.5 +2.75 %
OUT Overvoltage Protection When running in adaptive mode 5.2 5.35 5.5 V
Adaptive Output Voltage
Regulation Threshold IFLED1 = IFLED2 = 492.24mA setting, IINDLED = 16mA 150 mV
PGOOD Window Comparator VOUT = 5V, in programmable mode -15 -12.5 -10 %
Line Regulation VIN= 2.5V to 4.2V 0.1 %/V
Load Regulation IOUT = 0mA to 1500mA 0.5 %/A
nFET Current Limit 3.6 A
LX nFET On-Resistance LX to PGND, ILX = 200mA 0.055 0.130
LX pFET On-Resistance LX to OUT, ILX = 200mA 0.12 0.200
TA = +25°C 0.1 1 LX Leakage VLX = 5.5V TA = +85°C 0.1 µA
Input Current Limit Range During
GSMB Trigger 50 800 mA
Input Current Limit Step Size
During GSMB Trigger 50 mA
Input Current Limit Accuracy IILIM = 100mA, in dropout mode -15 +15 %= +25°C 1.8 2 2.2 MAX8834Y TA= -40°C to +85°C 1.6 2.4 = +25°C 3.6 4 4.4 Operating Frequency, No Load
MAX8834Z TA= -40°C to +85°C 3.2 4.8
MHz
ELECTRICAL CHARACTERISTICS (continued)(VIN= 3.6V, VAGND= VPGND= VFGND= 0V, VDD= 1.8V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
PARAMETERCONDITIONS MIN TYP MAX UNITS Maximum Duty Cycle VOUT = 4.5V 69 75 %
Minimum Duty Cycle VOUT = 4.5V 7.5 %
COMP Transconductance VCOMP = 1.5V 55 µS
COMP Discharge Resistance During shutdown or UVLO, from COMP to AGND 120
OUT Discharge Resistance During shutdown or UVLO, from OUT to LX 10 k
FLED1/FLED2 CURRENT REGULATOR IN Supply Current Step-up off, FLED1/FLED2 on, supply current for each
current source 0.6 mA
Flash 750 Maximum Current Setting Movie 125 mA
23.44mA setting TA = +25°C -5 +20 %
TA = +25°C -2.5 ±0.5 +2.5 492.24mA setting TA= -40°C to +85°C -4 +4 %Current Accuracy
750mA setting TA = -40°C to +85°C -10 +5 %
492.24mA setting 110 Current Regulator Dropout
(Note 2) 93.75mA setting 50 100 mV = +25°C -1 0.01 +1 FLED1/FLED2 Leakage in
Shutdown VFLED1 = VFLED2 = 5.5V = +85°C 0.1
µA
INDLED CURRENT REGULATOR IN Supply Current Step-up converter off, INDLED on 0.6 mA
Maximum Current Setting 16 mA
0.5mA setting TA = +25°C -10 +10 %
TA = +25°C -3 ±0.5 +3 % Current Accuracy 16mA setting TA = -40°C to +85°C -5 +5 %
Current Regulator Dropout 16mA setting (Note 2) 55 130 mV
TA = +25°C -1 0.01 +1 INDLED Leakage in Shutdown VINDLED = 5.5V TA = +85°C 0.1 µA
PROTECTION CIRCUITS NTC BIAS Current 19.4 20 20.6 µA
NTC Overtemperature Detection
Threshold VNTC falling, 100mV hysteresis, NTC_CNTL[2:0] = 100 388 400 412 mV
NTC Short Detection Threshold VNTC falling 100 mV
Flash Duration Timer Range In 50ms steps (Note 3) 50 800 ms
TA = +25°C 360 400 440 Flash Duration Timer Accuracy
(400ms Setting) TA = -40°C to +85°C 320 480 ms
Minimum Flash Duration FLASH_EN[2:0] = 1XX 2 ms
Flash Safety Timer Reset Inhibit
Period
From falling edge of LED_EN until flash safety timer is
reset 30 ms
ELECTRICAL CHARACTERISTICS (continued)(VIN= 3.6V, VAGND= VPGND= VFGND= 0V, VDD= 1.8V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
PARAMETERCONDITIONS MIN TYP MAX UNITS TA = +25°C 3.6 4 4.4 Watchdog Timer Accuracy
(4s setting) TA = -40°C to +85°C 3.2 4.8 s
Open LED Detection Threshold FLED1, FLED2, INDLED enabled 100 mV
Shorted LED Detection Threshold FLED1, FLED2, INDLED enabled VOUT -
1V V
Open and Short Debounce Timer From LED open or short detected until LED current
regulator is disabled 30 ms
Thermal-Shutdown Hysteresis 20 °C
Thermal Shutdown +160 °C
MAXFLASH Low-Battery Detect Threshold
Range 33mV steps 2.5 3.4 V
Low-Battery Voltage Threshold
Accuracy ±2.5 %
Low-Battery Voltage Hysteresis
Programmable Range 100 200 mV
Low-Battery Voltage Hysteresis
Step Size 100 mV
LB_TMR[1:0] = 00 200 250 300 Low-Battery Reset Time LB_TMR[1:0] = 01 400 500 600 µs
ELECTRICAL CHARACTERISTICS (continued)(VIN= 3.6V, VAGND= VPGND= VFGND= 0V, VDD= 1.8V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
Note 1:All devices are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by
design.
Note 2:LED current regulator dropout voltage is defined as the voltage when current drops 10% from the current level measured at
0.6V.
Note 3:Flash duration is from rising edge of LED_EN until IFLED= 0A (safety time in one-shot mode).
Note 4:The adaptive output voltage regulation threshold is individually set on each device to 75mV above the dropout voltage of
the LED current regulators. This ensures minimum power dissipation on the IC during a flash event. The dropout voltage
chosen is the highest measured dropout voltage of FLED1, FLED2, and INDLED.
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Typical Operating Characteristics(Circuit of Figure 1, VIN= 3.6V, VOUT= 3.8V, VDD= 3.0V, TA= +25°C, unless otherwise noted.)
STEP-UP CONVERTER EFFICIENCY
vs. INPUT VOLTAGE (MAX8834Y)
MAX8834Y/Z toc01
INPUT VOLTAGE (V)
EFFICIENCY (%)
VOUT = 3.8V
IOUT = 16mA
VOUT = 5V
IOUT = 16mA
VOUT = 5V
IOUT = 750mA
VOUT = 3.8V
IOUT = 750mA
VOUT = 5V
IOUT = 250mA
VOUT = 3.8V
IOUT = 250mA
FOR VIN > VOUT, VOUT INCREASES ABOVE THE
PROGRAMMED VALUE DUE TO THE MINIMUM
DUTY CYCLE CONSTRAINT.0
STEP-UP CONVERTER EFFICIENCY
vs. INPUT VOLTAGE (MAX8834Z)
MAX8834Y/Z toc02
INPUT VOLTAGE (V)
EFFICIENCY (%)VOUT = 3.8V
IOUT = 16mA
VOUT = 5V
IOUT = 16mA
VOUT = 5V
IOUT = 750mA
VOUT = 3.8V
IOUT = 750mA
VOUT = 5V
IOUT = 250mA
VOUT = 3.8V
IOUT = 250mA
FOR VIN > VOUT, VOUT INCREASES ABOVE THE
PROGRAMMED VALUE DUE TO THE MINIMUM
DUTY CYCLE CONSTRAINT.
STEP-UP CONVERTER EFFICIENCY
vs. OUTPUT CURRENT (MAX8834Y)MAX8834Y/Z toc03
OUTPUT CURRENT (mA)
EFFICIENCY (%)
10010,000
VIN = 3.6V
VIN = 2.5V
VIN = 3.2V
STEP-UP CONVERTER EFFICIENCY
vs. OUTPUT CURRENT (MAX8834Z)MAX8834Y/Z toc04
OUTPUT CURRENT (mA)
EFFICIENCY (%)
10010,000
VIN = 3.6V
VIN = 2.5V
VIN = 3.2V
STEP-UP CONVERTER SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX8834Y/Z toc05
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
VOUT = 3.8V
MAX8834Z
MAX8834Y
STEP-UP CONVERTER SUPPLY CURRENT
vs. TEMPERATUREMAX8834Y/Z toc06
TEMPERATURE (°C)
SUPPLY CURRENT (mA)3510-15
MAX8834Z
MAX8834Y
VOUT = 5V
LED CURRENT ACCURACY
vs. INPUT VOLTAGE
MAX8834Y/Z toc07
LED CURRENT ACCURACY (%)
IFLED1 = 125mA
IFLED2 = 125mAIFLED1 = 492.19mA
IFLED2 = 492.19mAIINDLED = 16mA
IFLED1 = 750mA
IFLED2 = 750mA
VOUT = 5V
LED CURRENT ACCURACY
vs. TEMPERATURE
MAX8834Y/Z toc08
LED CURRENT ACCURACY (%)
VOUT = 5V
IFLED2 = 125mA
IFLED1 = 492.19mAIFLED1 = 125mA
IFLED2 = 492.19mA
IFLED1 = 750mA
IFLED2 = 750mA
IINDLED = 16mA
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.6V, VOUT= 3.8V, VDD= 3.0V, TA= +25°C, unless otherwise noted.)
OUTPUT VOLTAGE ACCURACY
vs. TEMPERATURE
MAX8834Y/Z toc09
TEMPERATURE (°C)
OUTPUT VOLTAGE ACCURACY (%)
MAX8834Z, NO LOAD
MAX8834Y, NO LOAD
MAX8834Y, IOUT = 250mA
MAX8834Z, IOUT = 250mA
VOUT = 5V
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX8834Y/Z toc10
SUPPLY VOLTAGE (V)
OSCILLATOR FREQUENCY (MHz)
MAX8834Z
MAX8834Y
1ms/div
STARTUP WAVEFORM
(MAX8834Y, VOUT = 5V)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
VOUT = 5V
ILED1 = 31.25mA
MAX8834Y/Z toc11
1ms/div
STARTUP WAVEFORM
(MAX8834Y, ADAPTIVE MODE)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
ADAPTIVE MODE
ILED1 = 31.25mA
MAX8834Y/Z toc12
1ms/div
STARTUP WAVEFORM
(MAX8834Z, VOUT = 5V)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc13
VOUT = 5V
ILED1 = 31.25mA
1ms/div
STARTUP WAVEFORM
(MAX8834Z, ADAPTIVE MODE)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc14
ADAPTIVE MODE
ILED1 = 31.25mA
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.6V, VOUT= 3.8V, VDD= 3.0V, TA= +25°C, unless otherwise noted.)
400μs/div
SHUTDOWN WAVEFORM
(MAX8834Z, ADAPTIVE MODE)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc18
ADAPTIVE MODE
ILED1 = 31.25mA
LIGHT-LOAD SWITCHING WAVEFORMS
(MAX8834Y)VLX
200mA/div
0mA
2V/div
20mV/div
ILX
VOUT
AC RIPPLE
VOUT = 5V
IOUT = 16mA
MAX8834Y/Z toc19
LIGHT-LOAD SWITCHING WAVEFORMS
(MAX8834Z)VLX
200mA/div
0mA
2V/div
20mV/div
ILX
VOUT
AC RIPPLE
VOUT = 5V
IOUT = 16mA
MAX8834Y/Z toc20
400μs/div
SHUTDOWN WAVEFORM
(MAX8834Z, VOUT = 5V)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc17
VOUT = 5V
ILED1 = 31.25mA
400μs/div
SHUTDOWN WAVEFORM
(MAX8834Y, VOUT = 5V)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc15
VOUT = 5V
ILED1 = 31.25mA
400μs/div
SHUTDOWN WAVEFORM
(MAX8834Y, ADAPTIVE MODE)VOUT
VLX
500mA/div
2V/div
1V/div
2V/div
ILX
VCOMP
MAX8834Y/Z toc16
ADAPTIVE MODE
ILED1 = 31.25mA
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverOUTPUT VOLTAGE LINE REGULATION
(MAX8834Y)
MAX8834Y/Z toc25
OUTPUT VOLTAGE (V)
IOUT = 750mA
IOUT = 16mA
IOUT = 250mA
VOUT = 5V
OUTPUT VOLTAGE LINE REGULATION
(MAX8834Z)
MAX8834Y/Z toc26
OUTPUT VOLTAGE (V)
IOUT = 750mA
IOUT = 16mA
IOUT = 250mA
VOUT = 5V
400ns/div
HEAVY-LOAD SWITCHING WAVEFORMS
(MAX8834Y)VLX
500mA/div
1.5A
2V/div
50mV/div
ILX
VOUT
AC RIPPLE
VOUT = 5V
IOUT = 1A
MAX8834Y/Z toc21
400ns/div
HEAVY-LOAD SWITCHING WAVEFORMS
(MAX8834Z)VLX
500mA/div
1.5A
2V/div
50mV/div
ILX
VOUT
AC RIPPLE
VOUT = 5V
IOUT = 1A
MAX8834Y/Z toc22
1ms/div
GSMB WAVEFORMVGSMB
500mA/div
500mA/div
2V/div
1A/div
IFLED1
IFLED2
IIN
VOUT = 5V
ILIM = 500mA
IFLED1 = IFLED2 = 515.63mA
tHC_TRM = 80μs
MAX8834Y/Z toc23
10ms/div
MAXFLASH FUNCTIONVIN200mV/div
200mV/divIFLED1
VOUT = 5V
IFLED1 = 750mA
VLB_TH = 3.0V
VLB_HYS DISABLED
tTMR_DUR = 50ms
VIN INCREASES TO
THE THRESHOLD
VIN DROPS
BELOW THE
THRESHOLD
VOLTAGE
3.6V3.6V
0mA
MAX8834Y/Z toc24
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.6V, VOUT= 3.8V, VDD= 3.0V, TA= +25°C, unless otherwise noted.)
OUTPUT VOLTAGE LOAD REGULATION
(MAX8834Y)MAX8834Y/Z toc27
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
4.9610,000
VOUT = 5V
OUTPUT VOLTAGE LOAD REGULATION
(MAX8834Z)MAX8834Y/Z toc28
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
4.9610,000
VOUT = 5V
INPUT CURRENT LIMIT
vs. PROGRAMMED OUTPUT VOLTAGE
MAX8834Y/Z toc29
PROGRAMMED OUTPUT VOLTAGE (V)
INPUT CURRENT LIMIT (mA)
ILIM = 500mA
INPUT CURRENT LIMIT
vs. PROGRAMMED VALUE
MAX8834Y/Z toc30
PROGRAMMED VALUE (mA)
INPUT CURRENT LIMIT (mA)
IDEAL LINE
VOUT = 5V
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.6V, VOUT= 3.8V, VDD= 3.0V, TA= +25°C, unless otherwise noted.)
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Pin Description
PINNAMEFUNCTIONA1, B1 OUT Regulator Output. Connect OUT to the anodes of the external LEDs. Bypass OUT to PGND with a 10µF
ceramic capacitor. OUT is connected to LX through an internal 10k resistor during shutdown.
A2, B2 LX
Inductor Connection. Connect LX to the switched side of the inductor. LX is internally connected to
the drains of the internal MOSFETs. LX is connected to OUT through an internal 10k resistor during
shutdown.
A3, B3 PGND Power Ground. Connect PGND to AGND and to the input capacitor ground. Connect PGND to the PCB
ground plane.
A4 IN Analog Supply Voltage Input. The input voltage range is 2.5V to 5.5V. Bypass IN to AGND and PGND
with a 10µF ceramic capacitor as close as possible to the IC. IN is high impedance during shutdown.
A5 VDD
Logic Input Supply Voltage. Connect VDD to the logic supply driving SCL, SDA, LED_EN, and GSMB.
Bypass VDD to AGND with a 0.1µF ceramic capacitor. When VDD is below the UVLO, the I2C registers
reset and the step-up converter turns off.
B4 SCL I2C Clock Input. Data is read on the rising edge of SCL.
B5 AGND Analog Ground. Connect AGND to PGND and to the input capacitor ground. Connect AGND to the PCB
ground plane.
C1 COMP Compensation Input. See the CompensationNetwork Selection section for details. COMP is internally
pulled to AGND through a 180 resistor in shutdown.
C2, D2 FGND FLED1/FLED2 and INDLED Power Ground. Connect FGND to PGND.
C3 LED_EN
LED Enable Logic Input. LED_EN controls FLED1, FLED2, and INDLED, depending on control bits
written into the LED_CNTL register. See the LED_EN Control register description for an explanation of
this input function. LED_EN has an internal 800k pulldown resistor to AGND.
C4 GSMB
GSM Blank Signal. Assert GSMB to reduce the current regulator settings according to the values
programmed into the GSMB_CUR register. The status of the flash safety timer and the flash/movie
mode values in the current regulator registers are not affected by the GSMB state. Connect GSMB to
the PA module enable signal or other suitable logic signal that indicates a GSM transmit is in
process. Polarity of this signal is set by a bit in the GSMB_CUR register (default is active-high).
GSMB has an internal 800k pulldown resistor to AGND.
C5 SDA I2C Data Input. Data is read on the rising edge of SCL and data is clocked out on the falling edge of
SCL.
D1 FLED2
FLED2 Current Regulator. Current flowing into FLED2 is based on the internal I2C registers
FLASH2_CUR and MOVIE_CUR. Connect FLED2 to the cathode of an external flash LED or LED
module. FLED2 is high impedance during shutdown. If unused, connect FLED2 to ground.
D3 FLED1
FLED1 Current Regulator. Current flowing into FLED1 is based on the internal I2C registers
FLASH1_CUR and MOVIE_CUR. Connect FLED1 to the cathode of an external flash LED or LED
module. FLED1 is high impedance during shutdown. If unused, connect FLED1 to ground.
D4 INDLED
INDLED Current Regulator. Current flowing into INDLED is based on the internal I2C registers
IND_CUR. Connect INDLED to the cathode of an external indicator LED. INDLED is high impedance
during shutdown. If unused, connect INDLED to ground.
D5 NTC
NTC Bias Output. NTC provides 20µA to bias the NTC thermistor. The NTC voltage is compared to the
trip threshold programmed by the NTC_CNTL register. NTC is high impedance during shutdown.
Connect NTC to IN if not used. See the Finger-Burn Protection (NTC) section for details.
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Detailed DescriptionThe MAX8834Y/MAX8834Z flash drivers integrate an
adaptive 1.5A PWM step-up DC-DC converter, two
750mA white LED camera flash/movie current regula-
tors, and a 16mA indicator LED current regulator. An
I2C interface controls individual output on/off, the step-
up output voltage setting, the movie/flash current, and
the flash timer duration settings.
Step-Up Converter (LX, OUT, COMP, PGND)The MAX8834Y/MAX8834Z include a fixed-frequency,
PWM step-up converter that supplies power to the flash
LEDs. The output voltage is programmable from 3.7V to
5.2V (in 100mV steps) through the I2C interface. The
output voltage can also be set adaptively based on the
LED forward voltage. The step-up converter switches
an internal power MOSFET and synchronous rectifier at
a constant 2MHz or 4MHz frequency, with varying duty
cycle up to 75%, to maintain constant output voltage as
the input voltage and load vary. Internal circuitry pre-
vents any unwanted subharmonic switching by forcing
a minimum 7% (typ) duty cycle.
When the step-up converter is set to dropout mode, the
internal synchronous rectifier is driven fully on, keeping
the voltage at OUT equal to the LX input. This mode
provides the lowest current consumption when driving
LEDs with low forward voltage.
The output voltage is internally monitored for a fault
condition. If the output voltage drops below 8% (typ) of
the nominal programmed value, a POK fault is indicat-
ed in STATUS1 register bit 5. This feature is disabled if
the step-up converter is set to operate in adaptive
mode.
Overvoltage ProtectionThe MAX8834Y/MAX8834Z include a comparator to
monitor the output voltage (VOUT) during adaptive
mode operation of the step-up converter. If at anytime
the output voltage exceeds a maximum threshold of
5.5V, the COMP capacitor is discharged until the output
voltage is reduced by the 200mV (typ) hysteresis. Once
the output voltage drops below this threshold, normal
charging of the COMP capacitor is resumed.
Flash Current Regulator
(FLED1 and FLED2)A low-dropout linear current regulator from FLED1/
FLED2 to FGND sinks current from the cathode terminal
of the flash LED(s). The FLED1/FLED2 current is regu-
lated to I2C programmable levels for movie mode (up to
125mA, see Table 5) and flash mode (up to 750mA,
see Tables 3 and 4). The movie mode provides continu-
ous lighting when enabled through I2C or LED_EN.
When the flash mode is enabled, a flash safety timer,
programmable from 50ms to 800ms through I2C, limits
the duration of the flash mode. Once the flash safety
timer expires, the current regulators return to movie
mode if movie mode was active when a flash event was
triggered. The flash mode has priority over the movie
mode.
Flash Safety TimerThe flash safety timer is activated any time flash mode is
selected, either with LED_EN or through the I2C interface.
The flash safety timer, programmable from 50ms to
800ms through I2C, limits the duration of the flash mode
in case LED_EN is stuck high or the I2C command to
turn off has not been sent within the programmed flash
safety timer duration. This timer can be configured to
operate either in one-shot mode or maximum flash
duration mode (see Table 9). In one-shot mode, the
flash function is initiated on the rising edge of LED_EN
(or I2C bit) and terminated based on the programmed
value of the safety timer (see Figure 1). In the maximum
flash timer mode, flash function remains enabled as
long as LED_EN (or I2C bit) is high, unless the prepro-
grammed safety timer times out (see Figure 2).
Once the flash mode is disabled, by either LED_EN,2C, or flash safety timer, the flash has to be off for a
minimum time (flash safety timer reset inhibit period),
before it can be reinitiated (see Figure 3). This prevents
spurious events from re-enabling the flash mode.
Indicator Current Regulator (INDLED)A low-dropout linear current regulator from INDLED to
FGND sinks current from the cathode terminal of the
indicator LED. The INDLED current is regulated to I2C
programmable levels up to 16mA. Programmable con-
trol is provided for ramp-up (OFF to ON) and ramp-
down (ON to OFF) times, as well as blink rate and duty
cycle. The user can choose to enable or disable the
ramp time and blink rate features. See Tables 6, 7, and
8 for more information.
INDLED Blink FunctionINDLED current regulator is able to generate a blink
function. The OFF and ON time for INDLED are set
using the I2C interface. See Figure 4.
INDLED Ramp FunctionThe INDLED current regulator output provides ramp-up/
down for smooth transition between different brightness
settings. The ramp-up/down times are controlled by the
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverIND_RU and IND_RD control bits, and the ramp func-
tion is enabled/disabled by the IND_RP_EN bit. The
current regulator increases/decreases the current one-
step every tRAMP/32 until 0mA or IND[4:0] current is
reached. See Figures 5 and 6.
Combining BLINK Timer and Ramp FunctionWhen using the ramp function for INDLED together with
the blink timer, keep the ramp-up timer shorter than the
ON blink timer and the ramp-down timer shorter than
the OFF timer. Failing to comply with this results in the
ONE-SHOT FLASH TIMER
ENABLING OF FLASH MODE BY
LED_EN OR I2C CONTROL
ONE-SHOT FLASH TIMER
Figure 1. One-Shot Flash-Timer Mode
ENABLING OF FLASH MODE BY
LED_EN OR I2C CONTROL
MAXIMUM FLASH
SAFETY TIMER
MAXIMUM FLASH TIMER
Figure 2. Maximum Flash-Timer Mode
ENABLING OF FLASH MODE BY
LED_EN OR I2C CONTROL
30ms
Figure 3. Flash Safety Timer Reset Inhibit Period
tIND_ONtIND_OFF
IIND[4:0]
Figure 4. Blink Function Timing
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driverprogrammed current not being reached during the ON
time, or the INDLED current not returning to 0mA during
the OFF time. See Figure 7.
where IND_LED is the code from 0 to 31 specified in
the IND_LED[4:0].
LED Enable Input (LED_EN)The LED_EN logic input can enable/disable the FLED1,
FLED2, and INDLED current regulators. It can be
programmed to control movie mode, flash mode, and
indicator mode by using the IND_EN, MOVIE_EN,
and FLASH_EN bits, respectively. See Table 8 for
If FLED1/FLED2 is enabled for both movie and flash
modes at the same time, flash mode has priority. Once
the safety timer expires, the current regulator then
returns to the movie mode.
Watchdog TimerThe MAX8834Y/MAX8834Z include a watchdog timer
function that can be programmed using the I2C inter-
face from 4 seconds to 16 seconds with a 4-second
step. If the watchdog timer expires, the MAX8834Y/
MAX8834Z interpret it as an indication that the system
is no longer responding and enters safe mode. In safe
mode, the MAX8834Y/MAX8834Z disable all current
regulators and the step-up DC-DC converter to prevent
potential damage to the system. The I2C setting for the
respective registers does not change, therefore, reset-
ting the watchdog timer reverts the MAX8834Y/
MAX8834Z back to the state present before entering
safe mode.tINDLEDt
INDONINDRU
INDOFF
INDR_)≥+1DINDLED321(_)+
IINDLED = FULL SCALE
IINDLED = 1/2 SCALE
0mA
128ms256ms512ms1024ms
Figure 5. Ramp-Up Behavior
0mA
128ms256ms512ms1024ms
IINDLED = FULL SCALE
IINDLED = 1/2 SCALE
Figure 6. Ramp-Down Behavior
tIND_ON
tIND_RUt =
tIND_RDt =
tIND_OFFtIND_ONtIND_OFFtIND_OFF
IIND_LED = IND_LED[4:0]
IIND_LED = CODE 0111
IIND_LED = CODE 0011
IIND_LED = OFF
Figure 7. Combining RAMP Function and Blink Timer
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverSetting the WDT_EN bit to 1 in the TMR_DUR register
(Table 9) enables the watchdog timer. Resetting the
watchdog timer is achieved by the rising or falling edge
of LED_EN or by setting bit 0 in the WDT_RST register
(Table 14). See Figures 8 and 9 for two examples of
watchdog timer timing diagrams.
t < WDT_DUR[1:0]
WATCHDOG
TIMER ENABLED
t < WDT_DUR[1:0]t > WDT_DUR[1:0]t < WDT_DUR[1:0]
WATCHDOG
TIMER RESET
WATCHDOG
TIMER RESET
WATCHDOG
TIMEOUT
SUSPENDING ALL
CURRENT
REGULATIONS
WATCHDOG
TIMER RESET
WDT_RST IS
CLEARED(I2C) WDT_EN
(I2C) WDT_RST
WATCHDOG TIMER
LED_EN
IFLED_ OR
IINDLED
Figure 8. Watchdog Timer Timing Diagram 1
t < WDT_DUR[1:0]
WATCHDOG
TIMER ENABLED
t < WDT_DUR[1:0]t > WDT_DUR[1:0]t < WDT_DUR[1:0]
WATCHDOG
TIMER RESET
WATCHDOG
TIMER RESET
WATCHDOG
TIMEOUT
SUSPENDING ALL
CURRENT
REGULATIONS
WATCHDOG
TIMER RESET
WDT_RST IS
CLEARED(I2C) WDT_EN
(I2C) WDT_RST
WATCHDOG TIMER
LED_EN
IFLED_ OR
IINDLED
Figure 9. Watchdog Timer Timing Diagram 2
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverINPUT CURRENT
PREDEFINED INPUT CURRENT
LIMIT DURING GSMB
FLED2 OUTPUT
CURRENT
FLED1 OUTPUT
CURRENT
GSMB (ACTIVE-HIGH)
GSMB EVENT
TIME
1μs AFTER GSMB
ACTIVATED, FLED_ GOES
TO THE MINIMUM SETTING
FLED1/FLED2 DECREASED ONE
LSB SINCE IIN > ILIM[3:0]
FLED1/FLED2 INCREASED
ONE LSB SINCE IIN < ILIM[3:0]
HC_TMR[1:0]
1μs AFTER GSMB
DEACTIVATED, FLED_ GOES
TO THE PREVIOUS SETTING
FLASH1_CUR
SETTING
Figure 10. Input Current Limit During GSMB Event
GSM Blank Function (GSMB)The GSMB input is provided to allow the flash current to
be momentarily reduced during a GSM transmit to
reduce the peak current drawn from the battery. The
input current limit ensures that the maximum possible
output current is always provided, regardless of the
input voltage and the LED forward voltages.
When a GSMB event is triggered, the FLED1 and
FLED2 current regulators go to the lowest setting to
ensure the current drawn from the battery is quickly
reduced to a safe level. The MAX8834Y/MAX8834Z
then start increasing the FLED1 and FLED2 current by
one LSB steps, at a time interval set by HC_TMR[1:0]
(see Table 11). The increasing continues until either the
predefined FLED1/FLED2 current setting is reached or
the input current exceeds the maximum predefined
input current limit during a GSMB event. When the input
current exceeds the predefined input current limit, the
FLED1/FLED2 current is reduced by one LSB. The
MAX8834Y/MAX8834Z continue to adjust the FLED1
and FLED2 up and down depending on the input cur-
rent limit as long as the GSMB event is present. See
Figure 10 for more detailed information.
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverTo use this feature, connect the logic signal used to
enable the PA, or equivalent, to the GSMB input.
Assertion of this signal does not change the current sta-
tus of the flash safety timer or the flash current values
stored in the I2C registers. Once the signal is deassert-
ed, the current regulators change back to their previ-
ously programmed values. Polarity of this signal is
controlled through bit 6 in the GSMB_CUR register
(Table 11). The default is active-high.
Finger-Burn Protection (NTC)An NTC input is provided for the (optional) finger-burn
protection feature. To use this feature, connect a 100kΩ
NTC with B = 4550 between NTC and AGND. NTC
sources 20µA current and the voltage established by
this current and the NTC resistance is compared inter-
nally to a voltage threshold in the range of 200mV to
550mV, programmed through bits [2:0] of the NTC
Control register (see Table 10).
If the voltage on the NTC pin falls below the programmed
threshold during a flash event, the flash cycle is immedi-
ately terminated, and an indication is latched through bit 3
in the STATUS1 register (see Table 15).
To disable this function, clear bit 3 (enable bit) in the
NTC Control register.
MAXFLASH FunctionDuring high load currents, the battery voltage momen-
tarily drops due to its internal ESR, together with the
serial impedance from the battery to the load. For
equipment requiring a minimum voltage for stable oper-
ation, the battery ESR needs to be calculated to esti-
mate the maximum battery current that maintains the
battery voltage above the critical threshold. Due to the
complicated measurement of the battery ESR, the
MAX8834Y/MAX8834Z feature the MAXFLASH function
to prevent the battery voltage from dropping below the
threshold voltage. See Figure 11 for details.
TheMAX8834Y/MAX8834Zinputvoltageismonitored
duringaFLASH/MOVIEevent.Iftheinputvoltage
dropsbelowapredefinedthreshold(VLB_TH),itindi-
catesthattheFLASH/MOVIEeventisdrawingmore
currentthanthebatterycansupport.Asaresult,the
FLED1/FLED2currentregulatorsstartdecreasingtheir
outputcurrentsbyonestep.Therefore,theinputcur-
rentisreducedandtheinputvoltagestartstoriseduetheinternalbatteryESR.Theinputvoltageisthen
sampledagainaftertLB_TMRandcomparedtoVLB_TH
plusa predefined hysteresis (VLB_HYS). If it is still
below VLB_TH+ VLB_HYS, the FLED1/FLED2 current
regulators reduce their output current again to ensure
that minimum input voltage is available for the system.
If the input voltage is above VLB_TH+ VLB_HYS, the cur-
rent regulator increases the output current by one step
(if it is less than the user-defined output current). To
disable the hysteresis, set LB_HYS[1:0] to 11. In this
case, after the FLED1/FLED2 current is reduced, it
stays at the current setting. Figures 12, 13, and 14
show examples of MAXFLASH function operation. See
Tables 12 and 13 for control register details.
The MAXFLASH function continues for the entire dura-
tion of the FLASH/MOVIE event to ensure that the
FLASH/MOVIE output current is always maximized for
the specific operating conditions.
Undervoltage LockoutThe MAX8834Y/MAX8834Z contain undervoltage lock-
out (UVLO) circuitry that disables the IC until VINis
greater than 2.3V (typ). Once VINrises above 2.3V
(typ), the UVLO circuitry does not disable the IC until
VINfalls below the UVLO threshold minus the hysteresis
voltage. The MAX8834Y/MAX8834Z also contain a VDD
UVLO circuitry that monitors the VDDvoltage. When the
VDDvoltage falls below 1.4V (typ), the contents of all
the logic registers are reset to their default states. The
logic registers are only reset in a VDDUVLO condition
and not an IN UVLO condition.
CURRENT
REGULATOR
IOUT_MAXtLB_TMR
DOWN
VLB_TH
VLB_HYS
VLB_TH
Figure 11. Block Diagram of MAXFLASH Function
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverREDUCTION IN BATTERY CURRENT CAUSED
BY OTHER SYSTEM
VLB_TH
TTER
Y VOL
AGE
TIME
FLASH/MOVIE CURRENT
VLB_TH + VLB_HYS
IMAX
tLB_TMR
Figure 13. Example 2 of MAXFLASH Function Operation
TIME
IMAX
REDUCTION IN BATTERY CURRENT
CAUSED BY OTHER SYSTEM
FLASH CURRENT IS NOT INCREASED
AGAIN SINCE LB_HYS = 11
FLASH/MOVIE CURRENT
TTER
Y VOL
AGEVLB_TH + VLB_HYS
VLB_TH
tLB_TMR
VLB_TH
TTER
Y VOL
TAGE
TIME
FLASH/MOVIE CURRENT
tLB_TMR
VLB_TH + VLB_HYS
Figure 12. Example 1 of MAXFLASH Function Operation
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Soft-StartThe step-up converter implements a soft-start to control
inrush current when it turns on.It soft-starts by charging
CCOMPwith a 100µA current source. During this time,
the internal MOSFET is switching at the minimum duty
cycle. Once VCOMPrises above 1V, the duty cycle
increases until the output voltage reaches the desired
regulation level. COMP is pulled to AGND with a 180Ω
(typ) internal resistor during IN, UVLO, dropout mode,
or shutdown. See the Typical Operating Characteristics
for an example of soft-start operation. Soft-start is reini-
tiated after UVLO or if the step-up converter is re-
enabled after shutdown or dropout mode.
Shutdown and StandbyThe MAX8834Y/MAX8834Z are in shutdown when either
VINor VDDare in UVLO. In shutdown, supply current is
reduced to 0.1µA (typ). When VINis above its UVLO
threshold, but VDDis below its UVLO threshold, the IC
disables its internal reference, keeps all registers reset,
turns the step-up converter off, and turns the
FLED1/FLED2 current regulators off (high impedance).
Once a logic-level voltage is supplied to VDD, the IC
enters standby condition and is ready to accept I2C
commands. The internal MOSFET, synchronous rectifi-
er, and FLED1/FLED2 are also high impedance in
standby.
Typical shutdown timing characteristics are shown in
the Typical Operating Characteristics.
Parallel Connection of Current RegulatorsThe FLED1/FLED2 current regulators can be connected
in parallel as long as the system software properly sets
the current levels for each regulator. Unused current
regulators may be connected to ground. The FLED1/
FLED2 regulators must be disabled through I2C to
avoid a fault detection from an open or short.
Open/Short DetectionThe MAX8834Y/MAX8834Z monitor the FLED1, FLED2,
and INDLED voltage to detect any open or short LEDs.
A short fault is detected when the voltage rises above
VOUT- 1V (typ), and an open fault is detected when
the voltage falls below 100mV. The fault detection cir-
cuitry is only activated when the corresponding current
regulator is enabled and provides a continuous moni-
tor of the current regulator condition. Once a fault is
detected, the corresponding current regulator is dis-
abled and the status is latched into the corresponding
fault register bit (see Table 15). This allows the proces-
sor to determine the MAX8834Y/MAX8834Z operating
condition.
Thermal ShutdownThermal shutdown limits total power dissipation in the
MAX8834Y/MAX8834Z. When the junction temperature
exceeds +160°C (typ), the IC turns off, allowing itself to
cool. The IC turns on and begins soft-start after the junc-
tion temperature cools by 20°C. This results in a pulsed
output during continuous thermal overload conditions.
2C Serial InterfaceAn I2C-compatible, 2-wire serial interface controls the
step-up converter output voltage, flash, movie, and
indicator current settings, flash duration, and other
parameters. The serial bus consists of a bidirectional
serial-data line (SDA) and a serial-clock input (SCL).
The MAX8834Y/MAX8834Z are slave-only devices, rely-
ing upon a master to generate a clock signal. The mas-
ter initiates data transfer to and from the MAX8834Y/
SCL
SDA tF
tBUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION START CONDITION
tSU,STO
tHD,STA
tSU,STA
tHD,DAT
tSU,DAT tLOW
tHIGH
tHD,STA
Figure 15. 2-Wire Serial Interface Timing Detail
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverMAX8834Z and generates SCL to synchronize the data
transfer (Figure 15). 2C is an open-drain bus. Both SDA and SCL are bidi-
rectional lines, connected to a positive supply voltage
through a pullup resistor. They both have Schmitt trig-
gers and filter circuits to suppress noise spikes on the
bus to assure proper device operation.
A bus master initiates communication with the
MAX8834Y/MAX8834Z as a slave device by issuing a
START (S) condition followed by the MAX8834Y/
MAX8834Z address. The MAX8834Y/MAX8834Z
address byte consists of 7 address bits and a read/
write bit (R/W). After receiving the proper address, the
MAX8834Y/MAX8834Z issue an acknowledge bit by
pulling SDA low during the ninth clock cycle.
Slave AddressThe MAX8834Y/MAX8834Z act as a slave transmitter/
receiver. Its slave address is 0x94 for write operations
and 0x95 for read operations.
Bit TransferEach data bit, from the most significant bit to the least
significant bit, is transferred one by one during each
clock cycle. During data transfer, the SDA signal is
allowed to change only during the low period of the
SCL clock and it must remain stable during the high
period of the SCL clock (Figure 16).
START and STOP ConditionsBoth SCL and SDA remain high when the bus is not
busy. The master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the MAX8834Y/
MAX8834Z, it issues a STOP (P) condition by transition-
ing SDA from low to high while SCL is high. The bus is
then free for another transmission (Figure 17). Both
START and STOP conditions are generated by the bus
master.
AcknowledgeThe acknowledge bit is used by the recipient to hand-
shake the receipt of each byte of data (Figure 18). After
data transfer, the master generates the acknowledge
clock pulse and the recipient pulls down the SDA line
during this acknowledge clock pulse so the SDA line
stays low during the high duration of the clock pulse.
When the master transmits the data to the
MAX8834Y/MAX8834Z, it releases the SDA line and the
MAX8834Y/MAX8834Z take control of the SDA line and
generate the acknowledge bit. When SDA remains high
during this 9th clock pulse, this is defined as the not
acknowledge signal. The master can then generate
either a STOP condition to abort the transfer, or a
repeated START condition to start a new transfer.
START
CONDITION
(S)
DATA LINE STABLE
DATA VALID
DATA ALLOWED TO
CHANGE
STOP
CONDITION
(P)
SCL
SDA
Figure 16. Bit Transfer
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash Driver
Write OperationsThe MAX8834Y/MAX8834Z recognize the write byte
protocol as defined in the SMBus™ specification and
shown in section A of Figure 19. The write byte proto-
col allows the I2C master device to send 1 byte of data
to the slave device. The write-byte protocol requires a
register pointer address for the subsequent write. The
MAX8834Y/MAX8834Z acknowledge any register
pointer even though only a subset of those registers
actually exists in the device. The write byte protocol is
as follows:The master sends a start command.The master sends the 7-bit slave address followed
by a write bit.The addressed slave asserts an acknowledge by
pulling SDA low.The master sends an 8-bit register pointer.The slave acknowledges the register pointer.The master sends a data byte.The slave updates with the new data.The slave acknowledges the data byte.The master sends a STOP (P) condition.
In addition to the write-byte protocol, the MAX8834Y/
MAX8834Z can write to multiple registers as shown in
section B of Figure 19. This protocol allows the I2C
master device to address the slave only once and then
send data to a sequential block of registers starting at
the specified register pointer.
Use the following procedure to write to a sequential
block of registers:The master sends a start command.The master sends the 7-bit slave address followed
by a write bit.The addressed slave asserts an acknowledge by
pulling SDA low.The master sends the 8-bit register pointer of the
first register to write.The slave acknowledges the register pointer.The master sends a data byte.The slave updates with the new data. The slave acknowledges the data byte.Steps 6 to 8 are repeated for as many registers in
the block, with the register pointer automatically
incremented each time.
10)The master sends a STOP condition.
Read OperationsThe method for reading a single register (byte) is shown
in section A of Figure 20. To read a single register:The master sends a start command.The master sends the 7-bit slave address followed
by a write bit.The addressed slave asserts an acknowledge by
pulling SDA low.The master sends an 8-bit register pointer.
SDA
SCL
START
CONDITION
STOP
CONDITION
Figure 17. STARTand STOPConditions
SDA BY MASTER
SDA BY SLAVE
SCL289
ACKNOWLEDGE
CLOCK PULSE FOR
ACKNOWLEDGEMENTD6D0
START CONDITION
NOT ACKNOWLEDGE
Figure 18. Acknowledge
MAX8834Y/MAX8834Z
Adaptive Step-Up Converters
with 1.5A Flash DriverThe slave acknowledges the register pointer.The master sends a REPEATEDSTART (Sr) condition.The master sends the 7-bit slave address followed
by a read bit.The slave asserts an acknowledge by pulling SDA
low.The slave sends the 8-bit data (contents of the reg-
ister).
10)The master asserts an acknowledge by pulling SDA
low.
11)The master sends a STOP (P) condition.
In addition, the MAX8834Y/MAX8834Z can read a block
of multiple sequential registers as shown in section B of
Figure 20. Use the following procedure to read a
sequential block of registers:The master sends a start command.The master sends the 7-bit slave address followed
by a write bit.The addressed slave asserts an acknowledge by
pulling SDA low.The master sends an 8-bit register pointer of the
first register in the block.The slave acknowledges the register pointer.The master sends a REPEATEDSTART condition.The master sends the 7-bit slave address followed
by a read bit.The slave asserts an acknowledge by pulling SDA
low.The slave sends the 8-bit data (contents of the reg-
ister).
10)The master asserts an acknowledge by pulling SDA
low.
11)Steps 9 and 10 are repeated for as many registers
in the block, with the register pointer automatically
incremented each time.
12)The master sends a STOP condition.
NUMBER OF BITS
R/W
SLAVE ADDRESS
REGISTER POINTER8
DATA
SLAVE TO
MASTER
MASTER TO
SLAVE
LEGEND
A. WRITING TO A SINGLE REGISTER WITH THE WRITE BYTE PROTOCOL
NUMBER OF BITS
R/W
SLAVE ADDRESS
REGISTER POINTER X
DATA X
B. WRITING TO MULTIPLE REGISTERS
DATA X+n-1
DATA X+nNUMBER OF BITS
...P
DATA X+1AAAAA
Figure 19. Writing to the MAX8834Y/MAX8834Z
