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MAX8759ETI+-MAX8759ETI+T
Low-Cost, SMBus, CCFL Backlight Controller
General Description
The MAX8759 integrated cold-cathode fluorescent lamp
(CCFL) inverter controller is designed to drive CCFLs
using a full-bridge resonant inverter. The resonant opera-
tion ensures reliable striking and provides near-sinusoidal
waveforms over the entire input range. The controller
operates over a wide input-voltage range of 4.5V to
28V with high power to light efficiency. The device also
includes safety features that effectively protect against
single-point fault conditions such as lamp-out, secondary
overvoltage, and secondary short-circuit faults.
The MAX8759 provides accurate lamp-current regulation
(±2.5%) for superior CCFL inverter performance. The lamp
current is adjustable with an external resistor; 10:1 dim-
ming range can be achieved by turning the CCFL on and
off using a digital pulse-width modulation (DPWM) method,
while maintaining the lamp-current constant. The MAX8759
provides three mechanisms for controlling brightness:
2-wire SMBus™-compatible interface, external ambient-
light sensor (ALS), or system PWM control. The MAX8759
supports Intel display power-saving technology (DPST) to
maximize battery life. The device includes two lamp-current
feedback input pins that support dual-lamp applications with
a minimum number of external components.
The MAX8759 controls a full-bridge inverter for maximum
efficiency and directly drives four external n-channel
power MOSFETs. An internal 5.35V linear regulator pow-
ers the MOSFET drivers and most of the internal circuitry.
The MAX8759 is available in a space-saving, 28-pin, thin
QFN package and operates over a -40°C to +85°C tem-
perature range.
Applications●Notebooks●LCD Monitors
Features●Accurate Dimming Control Using SMBus, PWM
Interface, or Ambient Light Sensor●10:1 Dimming Range with 256-Step Resolution●Resonant-Mode Operation Longer Lamp Life with Near Sinusoidal Lamp Current Waveform Guaranteed Striking Capability High-Power-to-Light Efficiency●Wide Input-Voltage Range (4.5V to 28V)●Input Feed-Forward for Excellent Line Rejection●±2.5% Lamp-Current Regulation●Adjustable 1.5% Accurate DPWM Frequency●Dual Lamp-Current Feedback Inputs●Comprehensive Fault Protection Secondary Voltage Limiting Primary Current Limit with Lossless Sensing Lamp-Out Protection with Adjustable Timeout Secondary Short-Circuit Protection●Small 28-Pin, 5mm x 5mm, Thin QFN Package
Pin Configuration appears at end of data sheet.
+Denotes a lead-free package.
*EP = Exposed paddle.
SMBus is a trademark of Intel Corp.
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE
MAX8759ETI+-40°C to +85°C28 Thin QFN-EP*
5mm x 5mmT2855-6
VCC1
CCFL
VCC
BATT
GND
DEL
VCC
SDA
SCL
PWMI
PWMO
FREQ
VALS
ALSVCC
PGND1
BST2
VDD
BST1
GH1
LX1
LX2
GL1
PGND2
GL2
GH2
IFB1
IFB2
VFB
ISEC
COMP
TFLT
PWM INPUT
INPUT VOLTAGE
SMB_DATA
SMB_CLOCK
ALS SUPPLY
ALS OUTPUT
7.5V TO 24V
MAX8759
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Minimal Operating Circuit
Ordering Information
BATT to GND ........................................................-0.3V to +30V
BST1, BST2 to GND .............................................-0.3V to +36V
BST1 to LX1, BST2 to LX2 .....................................-0.3V to +6V
FREQ, VCC, VDD to GND .......................................-0.3V to +6V
SDA, SCL to GND ...................................................-0.3V to +6V
ALS, COMP, PWMI, PWMO,
TFLT, DEL, VALS to GND ....................-0.3V to (VCC + 0.3V)
GH1 to LX1............................................-0.3V to (VBST1 + 0.3V)
GH2 to LX2............................................-0.3V to (VBST2 + 0.3V)
GL1, GL2 to GND .....................................-0.3V to (VDD + 0.3V)
IFB1, IFB2, ISEC, VFB to GND .................................-3V to +6V
PGND1, PGND2 to GND .....................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70°C)
28-Pin Thin QFN 5mm x 5mm
(derate 21.3mW/°C above +70°C) ............................1702mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
BATT Input Voltage RangeVCC = VDD = VBATT4.55.5V
VCC = VDD = open5.528.0
BATT Quiescent CurrentMAX8759 is enabledVBATT = 28V2.55mAVBATT = VCC = 5V5
BATT Quiescent Current, ShutdownMAX8759 is disabled100200µA
VCC Output Voltage, Normal OperationMAX8759 is enabled, 6V < VBATT < 28V,
0 < ILOAD < 10mA5.25.355.5V
VCC Output Voltage, ShutdownMAX8759 is disabled, no load3.54.35.5V
VCC Undervoltage Lockout ThresholdVCC rising (leaving lockout)4.3VVCC falling (entering lockout)3.7
VCC Undervoltage Lockout Hysteresis230mV
VCC POR ThresholdRising edge1.75V
VCC POR Hysteresis50mV
GH1, GH2, GL1, GL2 On-Resistance,
Low StateITEST = 100mA, VCC = VDD = 5V36Ω
GH1, GH2, GL1, GL2 On-Resistance,
High StateITEST = 100mA, VCC = VDD = 5V1018Ω
BST1, BST2 Leakage CurrentVBST_ = 12V, VLX_ = 7V410µA
Resonant Frequency RangeGuaranteed by design3080kHz
Minimum On-Time350500700ns
Maximum Off-Time406080µs
Current-Limit Threshold LX1 - PGND1, LX2 - PGND2415430445mV
Zero-Current-Crossing Threshold LX1 - PGND1, LX2 - PGND23813mV
Current-Limit Leading-Edge Blanking 350ns
IFB1, IFB2 Input-Voltage Range-3+3V
IFB1 Regulation Point765785805mV
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
IFB1, IFB2 Input Bias Current0 < VIFB1,2 < 3V-3+3µA-3V < VIFB1,2 < 0-230
IFB1, IFB2 Lamp-Out Threshold575600625mV
IFB1, IFB2 to COMP Transconductance0.5V < VCOMP < 4V60100160µS
COMP Output Impedance61224MΩ
COMP Discharge Current During
Overvoltage or Overcurrent FaultVVFB = 2.6V or VISEC = 1.5V50010002000µA
COMP Discharge Current During
DPWM Off-TimeVCOMP = 1.5V90110130µA
DPWM Rising-to-Falling RatioVIFB1,2 = 02.5
ISEC Input Voltage Range-3+3V
ISEC Overcurrent Threshold1.181.211.26V
ISEC Input Bias CurrentVISEC = 1.25V-0.3+0.3µA
VFB Input Voltage Range-4+4V
VFB Input Impedance150300450MΩ
VFB Overvoltage Threshold2.22.32.4V
VFB Undervoltage Threshold210240280mV
VFB Undervoltage DelayRFREQ = 169kΩ250µs
DPWM Oscillator Frequency
RFREQ = 169kΩ, TA = +25°C to +85°C207210213
RFREQ = 169kΩ205210215
RFREQ = 340kΩ106
RFREQ = 100kΩ343
PWMO Output Impedance204060kΩ
PWMI Input Low Voltage0.7V
PWMI Input High Voltage2.1V
PWMI Input Hysteresis300mV
PWMI Input Bias Current-0.3+0.3µA
PWMI Input Frequency Range550kHz
PWMI Full-Range Accuracy5LSB
PWMI Brightness Setting
PWMI duty cycle = 100%98100PWMI duty cycle = 50%485052
PWMI duty cycle = 0%9.710.010.3
ALS Full-Adjustment Range01.8V
ALS Full-Range Accuracy5LSB
ALS Input Bias Current-0.1+0.1µA
VALS Output VoltageMAX8759 is enabled, 6V < VBATT < 28V,
ILOAD = 1mA5.105.305.50V
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Electrical Characteristics (continued)
(Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
Zero-Crossing Delay
VBATT = 9V, RTHR = 120kW00.150.30
VBATT = 12V, RTHR = 120kW1.501.802.10
Maximum Zero-Crossing DelayVBATT = 18V, RTHR = 120kW3.23.84.4µs
DEL Disable ThresholdDEL rising4.5V
DEL falling3.8
TFLT Charge Current
VISEC < 1.25V and VIFB < 540mV; VFLT = 2V0.91.01.1VISEC < 1.25V and VIFB > 660mV; VFLT = 2V-1.5-1.2-0.8
VISEC > 1.25V and VIFB > 660mV; VFLT = 2V115135155
TFLT Trip ThresholdRising edge3.744.3V
SDA, SCL, Input Low Voltage0.7V
SDA, SCL, Input High Voltage2.1V
SDA, SCL, Input Hysteresis100mV
SDA, SCL, Input Bias Current-1+1µA
SDA Output Low Sink CurrentVSDA = 0.4V4mA
SMBus Frequency10100kHz
SMBus Free TimetBUF4.71µs
SCL Serial Clock High PeriodtHIGH4µs
SCL Serial Clock Low PeriodtLOW4.7µs
START Condition Setup TimetSU:STA4.7µs
START Condition Hold TimetHD:STA4µs
STOP Condition Setup Time from SCLtSU:STO4µs
SDA Valid to SCL Rising-Edge Setup
Time, Slave Clocking in DatatSU:DAT250ns
SCL Falling Edge to SDA TransitiontHD:DAT0ns
SCL Falling Edge to SDA Valid, Reading
Out DatatDV200ns
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Electrical Characteristics (continued)
(Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = -40°C to +85°C).(Note 1)
PARAMETERCONDITIONSMINTYPMAXUNITS
BATT Input Voltage RangeVCC = VDD = VBATT4.55.5VVCC = VDD = open5.528.0
BATT Quiescent CurrentMAX8759 is enabled
VBATT = 28V5VBATT = VCC = 5V5
VCC Output Voltage, Normal OperationMAX8759 is enabled, 6V < VBATT < 28V,
0 < ILOAD < 10mA5.25.5V
VCC Output Voltage, ShutdownMAX8759 is disabled, no load3.55.5V
VCC Undervoltage Lockout Threshold
VCC rising (leaving lockout)4.3VCC falling (entering lockout)3.7
GH1, GH2, GL1, GL2 On-Resistance,
Low StateITEST = 100mA, VCC = VDD = 5V6Ω
GH1, GH2, GL1, GL2 On-Resistance,
High StateITEST = 100mA, VCC = VDD = 5V18Ω
Resonant Frequency RangeGuaranteed by design3080kHz
Minimum On-Time350700ns
Maximum Off-Time4080µs
Current-Limit Threshold LX1 - PGND1, LX2 - PGND2410450mV
Zero-Current Crossing Threshold LX1 - PGND1, LX2 - PGND2313mV
IFB1, IFB2 Input Voltage Range-3+3V
IFB1 Regulation Point760810mV
IFB2 Regulation Point775825mV
IFB1, IFB2 Input Bias Current-3V < VIFB1,2 < 0-230µA
IFB1, IFB2 Lamp-Out Threshold565635mV
IFB1, IFB2 to COMP Transconductance0.5V < VCOMP < 4V60160µS
COMP Output Impedance625MΩ
COMP Discharge Current During
Overvoltage or Overcurrent FaultVVFB = 2.6V or VISEC = 1.5V5002000µA
COMP Discharge Current During
DPWM Off-TimeVCOMP = 1.5V90130µA
ISEC Input Voltage Range-3+3V
ISEC Overcurrent Threshold1.181.26V
VFB Input Voltage Range-4+4V
VFB Input Impedance150450MΩ
VFB Overvoltage Threshold2.22.4V
VFB Undervoltage Threshold210280mV
DPWM Oscillator FrequencyRFREQ = 169kΩ203217Hz
PWMO Output Impedance2060kΩ
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Electrical Characteristics
(Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = -40°C to +85°C).(Note 1)
Note 1: Specifications to -40°C are guaranteed by design, not production tested.
PARAMETERCONDITIONSMINTYPMAXUNITS
PWMI Input Low Voltage0.7V
PWMI Input High Voltage2.1V
PWMI Input Frequency Range550kHz
PWMI Brightness Setting
PWMI duty cycle = 100%98PWMI duty cycle = 50%4852
PWMI duty cycle = 0%9.710.3
ALS Full-Adjustment Range01.8V
VALS Output VoltageMAX8759 is enabled, 6V < VBATT < 28V,
ILOAD = 1mA5.105.50V
VALS On-ResistanceMAX8759 is enabled60Ω
Zero-Crossing DelayVBATT = 9V, RTHR = 100kΩ00.3µsVBATT = 12V, RTHR = 100kΩ1.502.10
Maximum Zero-Crossing DelayVBATT = 16V, RTHR = 100kΩ3.24.4µs
DEL Disable ThresholdDEL rising4.5VDEL falling3.9
TFLT Charge Current
VISEC < 1.25V and VIFB < 540mV; VFLT = 2V0.81.2VISEC < 1.25V and VIFB > 660mV; VFLT = 2V-1.5-0.8
VISEC > 1.25V and VIFB > 660mV; VFLT = 2V115155
TFLT Trip ThresholdRising edge3.74.3V
SDA, SCL, Input Low Voltage0.7V
SDA, SCL, Input High Voltage2.1V
SDA Output Low-Sink CurrentVSDA = 0.4V4mA
SMBus Frequency10100kHz
SMBus Free TimetBUF4.7µs
SCL Serial Clock High PeriodtHIGH4µs
SCL Serial Clock Low PeriodtLOW4.7µs
START Condition Setup TimetSU:STA4.7µs
START Condition Hold TimetHD:STA4µs
STOP Condition Setup Time from SCLtSU:STO4µs
SDA Valid to SCL Rising-Edge Setup
Time, Slave Clocking in DatatSU:DAT250ns
SCL Falling Edge to SDA TransitiontHD:DAT0ns
SCL Falling Edge to SDA Valid,
Reading Out DatatDV200ns
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Electrical Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VCC = VDD, TA = +25°C, unless otherwise noted.)
A: VFB, 2V/div
B: LX1, 20V/div
HIGH-INPUT VOLTAGE OPERATION
(VIN = 20.0V)
MAX8759 toc02
10µs/div
C: LX2, 20V/div
D: IFB, 2V/div
A: VIN, 10V/div
B: COMP, 2V/div
LINE TRANSIENT RESPONSE
(8V TO 20V)
MAX8759 toc03
100µs/div
C: IFB, 2V/div
D: LX1, 20V/div
A: VIN, 10V/div
B: COMP, 2V/div
LINE TRANSIENT RESPONSE
(20V TO 8V)
MAX8759 toc04
100µs/div
C: IFB, 2V/div
D: LX1, 20V/div
A: VFB, 2V/div
B: COMP, 1V/div
MINIMUM BRIGHTNESS STARTUP WAVEFORM
(SMBus MODE, BRIGHTNESS REGISTER = 0x00)
MAX8759 toc05
2ms/div
C: IFB, 2V/div
A: VFB, 2V/div
B: COMP, 1V/div
MINIMUM BRIGHTNESS DPWM OPERATION
(SMBus MODE, BRIGHTNESS REGISTER = 0x00)
MAX8759 toc06
2ms/div
C: IFB, 2V/div
50% BRIGHTNESS DPWM OPERATION
(SMBus MODE, BRIGHTNESS REGISTER = 0x80)
MAX8759 toc07
2ms/div
A: VFB, 2V/div
B: LX1, 10V/div
LOW-INPUT VOLTAGE OPERATION
(VIN = 8.0V)
MAX8759 toc01
10µs/div
C: LX2, 10V/div
D:IFB, 2V/div
DPWM SOFT-START
MAX8759 toc08
40µs/div
DPWM SOFT-STOP
MAX8759 toc09
40µs/div
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 12V, VCC = VDD, TA = +25°C, unless otherwise noted.)
A: VFB, 2V/div
B: COMP, 500mV/div
OPEN-LAMP VOLTAGE
LIMITING AND TIMEOUT
MAX8759 toc010
200ms/div
C: TFLT, 5V/div
A: ISEC, 2V/div
B: COMP, 1V/div
SECONDARY SHORT-CIRCUIT
PROTECTION AND TIMEOUT
MAX8759 toc011
2ms/div
C: TFLT, 1V/div
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX8759 toc12
VIN (V)
SWITCHING FREQUENCY (kHz)15102025
DPWM FREQUENCY
vs. RFREQ
MAX8759 toc13
RFREQ (kΩ)
DPWM FREQUENCY (Hz)150200100250300350
RMS LAMP CURRENT
vs. INPUT VOLTAGE
MAX8759 toc14
INPUT VOLTAGE (V)
RMS LAMP CURRENT (mA)15102025
ILAMP = 7mA
ILAMP = 6mA
ILAMP = 5mA
ILAMP = 4mA
RMS LAMP CURRENT (ILAMP = 6mA)
vs. INPUT VOLTAGE
MAX8759 toc15
INPUT VOLTAGE (V)
RMS LAMP CURRENT (mA)
NORMALIZED BRIGHTNESS
vs. SMBus BRIGHTNESS SETTING
MAX8759 toc16
NORMALIZED BRIGHTNESS (%)
NORMALIZED BRIGHTNESS
vs. PWMI DUTY CYCLE
MAX8759 toc17
NORMALIZED BRIGHTNESS (%)
NORMALIZED BRIGHTNESS
vs. ALS VOLTAGE
MAX8759 toc18
NORMALIZED BRIGHTNESS (%)
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VCC = VDD, TA = +25°C, unless otherwise noted.)
NORMALIZED BRIGHTNESS
vs. SMBus BRIGHTNESS AND PWMI DUTY CYCLE
MAX8759 toc19
PWMI DUTY RATIO
NORMALIZED BRIGHTNESS (%)
SMB = 0xFF
SMB = 0x80
NORMALIZED BRIGHTNESS
vs. ALS VOLTAGE AND PWMI DUTY CYCLE
MAX8759 toc20
PWMI DUTY RATIO
ALS
= 1.8V
VALS = 1.8V
VALS = 0.8V
ALS TRANSIENT RESPONSE
(ALSDEL1 = ALSDEL0 = 0)
MAX8759 toc21
A: ALS, 1V/div B: COMP, 1V/div
1s/div
VCC LINE REGULATION
MAX8759 toc22
INPUT VOLTAGE (V)
VOLTAGE (V)16122024
VCC LOAD REGULATION
MAX8759 toc23
VOLTAGE (V)
VIN = 24V
VIN = 12V
VCC VOLTAGE
vs. TEMPERATURE
MAX8759 toc24
VOLTAGE (V)
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Typical Operating Characteristics (continued)
PINNAMEFUNCTIONBATTSupply Input. BATT is the input to the internal 5.35V linear regulator that powers the device. Bypass BATT
to GND with a 0.1µF ceramic capacitor.SDASMBus Serial Data InputSCLSMBus Serial Clock InputTFLTFault-Timer Adjustment Pin. Connect a capacitor from TFLT to GND to set the time-out periods for open-
lamp and secondary overcurrent faults.VALSAmbient-Light-Sensor Supply Pin. Bypass VALS to GND with a 0.1µF capacitor.ALSAmbient-Light-Sensor InputPWMIDPST Control InputPWMODPST Buffer Output. Connect a capacitor between PWMO and GND. The capacitor forms a lowpass ilter with an internal 40kΩ (typ) resistor for iltering the DPST signal.FREQChopping-Frequency Adjustment Pin. Connect a resistor from FREQ to GND to set the DPWM frequency:
fDPWM = 210Hz x 169kΩ / RFREQ.COMPTransconductance Error Ampliier Output. A compensation capacitor connected between COMP and GND
sets the rise and fall time of the lamp-current envelope in DPWM operation.DELAdaptive Zero-Crossing-Delay Adjustment Pin. Connect a resistor between DEL and GND to adjust the
range of the zero-crossing delay. Connecting DEL to VCC disables the zero-crossing delay function.IFB1
Lamp-Current-Feedback Input. The IFB1 sense signal is internally full-wave rectiied. IFB1 is compared with IFB2 and the larger is used for lamp-current regulation. The average value of the rectiied signal is
regulated to 785mV (typ) by controlling the on-time of high-side switch. An open-lamp fault is generated if
the peak voltage of IFB1 is below 600mV for a fault delay period set by TFLT.IFB2
Lamp-Current-Feedback Input. The IFB2 sense signal is internally full-wave rectiied. IFB1 is compared with IFB2 and the larger is used for lamp-current regulation. The average value of the rectiied signal is
regulated to 800mV (typ) by controlling the on-time of high-side switch. An open-lamp fault is generated if
the peak voltage of IFB2 is below 600mV for a fault-delay period set by TFLT. IFB2 input can be disabled
by connecting IFB2 to VCC.VFB
Transformer Secondary Voltage-Feedback Input. A capacitive voltage-divider between the high-voltage
terminal of the CCFL tube and GND sets the maximum average lamp voltage during striking and lamp-out
fault. When the peak voltage on VFB exceeds the internal overvoltage threshold, the controller turns on an
internal current sink, discharging the COMP capacitor to limit the switch on-time. The VFB pin is also used
to detect a secondary undervoltage condition. If the peak voltage on VFB is below 230mV continuously for
250µs during the DPWM ON period, the MAX8759 shuts down.ISEC
Transformer Secondary Current-Feedback Input. A current-sense resistor connected between the low-
voltage end of the transformer secondary and the ground sets the maximum secondary current during
short-circuit fault. When the peak voltage on ISEC exceeds the internal overcurrent threshold, the controller
turns on an internal current sink discharging the COMP capacitor.LX1
GH1 Gate-Driver Return. LX1 is the input to the current-limit and zero-crossing comparators. The device
senses the voltage across the low-side MOSFET NL1 to detect primary current zero crossing and primary
overcurrent.GH1High-Side MOSFET NH1 Gate Driver Output
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Pin Description
PINNAMEFUNCTIONBST1GH1 Gate-Driver Supply Input. Connect a 0.1µF capacitor from LX1 to BST1.PGND1Power Ground. PGND1 is the return for the GL1 gate driver.GL1Low-Side MOSFET NL1 Gate Driver OutputVDDLow-Side Gate-Driver Supply Input. Connect VDD to the output of the internal linear regulator (VCC).
Bypass VDD with a 0.1µF capacitor to PGND.GL2Low-Side MOSFET NL2 Gate-Driver OutputPGND2Power Ground. PGND2 is the return for the GL2 gate driver.BST2GH2 Gate-Driver Supply Input. Connect a 0.1µF capacitor from LX2 to BST2.GH2High-Side MOSFET NH2 Gate-Driver OutputLX2
GH2 Gate-Driver Return. LX2 is the input to the current-limit and zero-crossing comparators. The device
senses the voltage across the low-side MOSFET NL2 to detect primary current zero crossing and primary
overcurrent.GNDAnalog Ground. The ground return for VCC, REF, and other analog circuitry. Connect GND to PGND under
the IC at the IC’s backside exposed metal pad.VCC5.35V/10mA Internal Linear-Regulator Output. VCC is the supply voltage for the device. Bypass VCC with a
0.47µF ceramic capacitor to GND.EPExposed Backside Pad. Connect PAD to GND.
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Pin Description (continued)
N2A21
0.1µF
0.47µF
10µF
25V
C10
0.1µF
C11
0.1µF
C13
6.8nF
68nF
10nF
10pF
3kV
2.2µF
2.2µF
1:110
CCFL
3.9kΩ
150Ω
169kΩ
C14
0.22µF
FDC6561AN
FDC6561AN
0.47µF
C12
1µF
C15
0.1µF
VCC
BATT
GND
DEL
VCC
SDA
SCL
PWMI
PWMO
FREQ
VALS
ALSVCC
PGND1
BST2
VDD
BST1
GH1
LX1
LX2
GL1
PGND2
GL2
GH2
IFB1
IFB2
VFB
ISEC
COMP
TFLT
N2B
N1AN1B
PWM INPUT
INPUT VOLTAGE
SMB_DATA
SMB_CLOCK
ALS SUPPLY
ALS OUTPUT
7.5V TO 24V
MAX8759
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Typical Operating Circuit
The MAX8759 typical operating circuit (Figure 1) is a sin-
gle-lamp CCFL backlight inverter for notebook computer
TFT LCD panels. The input voltage range of the circuit
is from 7.5V to 24V. The maximum RMS lamp current is
set to 6mA and the maximum RMS striking voltage is set
to 1800V. Table 1 lists some important components and
Table 2 lists the component suppliers’ contact information.
Detailed Description
The MAX8759 controls a full-bridge resonant inverter to
convert an unregulated DC input into a high-frequency AC
output for powering CCFLs. The resonant operation maxi-
mizes striking capability and provides near-sinusoidal
waveforms over the entire input range to improve CCFL
lifetime. The lamp brightness is adjusted by turning the
lamp on and off with a DPWM signal. The DPWM fre-
quency can be accurately adjusted with a resistor. The
brightness of the lamp is proportional to the duty cycle of
the DPWM signal, which is controlled either with a 2-wire
SMBus-compatible interface, with an external ALS, or
with an external PWM signal. The device also includes
safety features that effectively protect against single-point
fault conditions such as lamp-out and secondary short-
circuit faults. An internal 5.35V linear regulator powers the
MOSFET drivers and most of the internal circuitry. Figure
2 is the functional diagram of the MAX8759 and Figure 3
is the detailed diagram of the SMBus and ALS input block.
Resonant Operation
The MAX8759 drives four n-channel power MOSFETs
that make up the zero-voltage-switching (ZVS) full-bridge
inverter as shown in Figure 4. Assume that NH1 and NL2
are on at the beginning of a switching cycle as shown in
Figure 4(a). The primary current flows through MOSFET
NH1, DC blocking capacitor C2, the primary side of
transformer T1, and MOSFET NL2. During this interval,
the primary current ramps up until the controller turns
off NH1. When NH1 is turned off, the primary current
forward biases the body diode of NL1, which clamps the
LX1 voltage just below ground as shown in Figure 4(b).
When the controller turns on NL1, its drain-to-source volt-
age is near zero because its forward-biased body diode
clamps the drain. Since NL2 is still on, the primary current
flows through NL1, C2, the primary side of T1, and NL2.
Once the primary current drops to the minimum current
threshold (6mV/RDS(ON)), the controller turns off NL2.
The remaining energy in T1 charges up the LX2 node
until the body diode of NH2 is forward biased. When
NH2 turns on, it does so with near-zero drain-to-source
voltage. The primary current reverses polarity as shown
in Figure 4(c), beginning a new cycle with the current
flowing in the opposite direction, with NH2 and NL1 on.
The primary current ramps up until the controller turns
off NH2. When NH2 is turned off, the primary current
forward biases the body diode of NL2, which clamps
the LX2 voltage just below ground as shown in Figure
4(d). After the LX2 node goes low, the controller loss-
lessly turns on NL2. Once the primary current drops to
the minimum current threshold, the controller turns off
NL1. The remaining energy charges up the LX1 node
until the body diode of NH1 is forward biased. Finally,
NH1 losslessly turns on, beginning a new cycle as
shown in Figure 4(a). Note that switching transitions on
all four power MOSFETs occur under ZVS conditions,
which reduces transient power losses and EMI.
Table 1. List of Important Components
Table 2. Component Suppliers
DESIGNATIONDESCRIPTION
10µF ±20%, 25V X5R ceramic capacitor
(1210)
Murata GRM32DR61E106M
TDK C3225X5R1E106M
C2, C3
2.2µF ±10%, 25V X5R ceramic capacitors
(0805)
Murata GRM21BR61E225K
TDK C2012X5R1E225K
10pF ±10%, 3kV HV ceramic capacitor
(1808)
Kemet C1808C100KHGAC
TDK C4520C0G3F100F
NH1/2, NL1/2
Dual n-channel MOSFETs, 30V, 0.095W,
6-pin SOT23
Fairchild FDC6561ANCCFL transformer, 1:110 turns ratio
TMP UI9.8L type
SUPPLIERWEBSITE
Fairchild
Semiconductorwww.fairchildsemi.com
Kemetwww.kemet.com
Muratawww.murata.com
TDKwww.components.tdk.com
TMPwww.tmp.com
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
Figure 2. MAX8759 Functional Diagram
MAX8759
LINEAR
REGULATORBIAS
4.3V
RDY
SMBus
DWPM
OSC
ALS
ADC
BRIGHTNESS
CONTROL
8-BIT
COUNTER
PWM
ADC
40kΩ
BATT
VCC
VALS
ISEC
SCL
FREQ
SDA
ALS
PWMI
PWMO
DPWM
LATCH
DPWM
COMP
VCC
COMP
UVLO
COMPARATOR
BATT
GND
MAXFW
COMP
1.21V
OPEN-LAMP
COMP
600mV
135µA
1µA
2.3V
VFB
COMP
IFB1
IFB2
1000µA100µA
RDY
ERROR
AMP
VREF
MUX
LX_ZX
ILIM
COMP400mV
PWM
COMP
BST1
GH1DH
LX1
BST2
GH2
LX2
VDD
GL1
PGND2
GL2
GATE-DRIVER
CONTROL
STATE
MACHINER
TON FF
MIN
TONQ
ZERO-CROSS
DETECTIONS
AND
DELAY BLOCK
PGND1
DELSHUTDOWN
FAULT
LATCH
230mV
VFBUV
COMP
TFLTMIN
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
A simplified CCFL inverter circuit is shown in Figure 5 (a).
The full-bridge power stage is simplified and represented
as a square-wave AC source. The resonant tank circuit
can be further simplified to Figure 5(b) by removing the
transformer. CS is the primary series capacitor, CS’ is the
series capacitance reflected to the secondary, CP is the
secondary parallel capacitor, N is the transformer turns
ratio, L is the transformer secondary leakage inductance,
and RL is an idealized resistance that models the CCFL
in normal operation.
Figure 6 shows the frequency response of the resonant
tank’s voltage gain under different load conditions. The
primary series capacitor is 1µF, the secondary parallel
capacitor is 15pF, the transformer turns ratio is 1:93,
and the secondary leakage inductance is 260mH. Notice
that there are two peaks, fS, and fP, in the frequency
response. The first peak fS is the series resonant peak
determined by the secondary leakage inductance (L) and
the series capacitor reflected to the secondary (C’S):f2LC=′π
Figure 3. MAX8759 SMBus and Ambient-Light-Sensor Input Block
ALS
STATUS
REGISTER
ALS
LOW-LIMIT
REGISTER
ALS
HIGH-LIMIT
REGISTER
ALS
CLAMP
BRIGHT
CONTROL
REGISTER
DEVICE
CONTROL
REGISTER
MUX
DIGITAL
MULTIPLIER
BUFFER
DIGITAL
POT
SMBus
INTERFACE
DPWM
SETTING
PWMI
SDA
SCL
0X040X000X010X060X05
MUX
"1"
PWMO
ALS
SMBus AND AMBIENT-LIGHT-SENSOR INPUT BLOCK
INVERTER
ON/OFF
MUX
PWM_SEL
ALS_CTL
PWM_MD
BUFFER
FAULT/
STATUS
REGISTER
0X02
OFFSETADD
MAX8759Low-Cost, SMBus, CCFL Backlight Controller
The second peak fP is the parallel resonant peak deter-
mined by the secondary leakage inductance (L), the par-
allel capacitor (CP), and the series capacitor reflected to
the secondary (C’S):fCC2LCC=′π′+
The inverter is designed to operate between these two
resonant peaks. When the lamp is off, the operating point
of the resonant tank is close to the parallel resonant
peak due to the lamp’s infinite impedance. The circuit
converter. While in parallel-loaded resonant operation,
the inverter behaves like a voltage source to generate the
necessary striking voltage. Theoretically, the output volt-
age of the resonant converter increases until the lamp is
ionized or until it reaches the IC’s secondary voltage limit.
Once the lamp is ionized, the equivalent load resistance
decreases rapidly and the operating point moves toward
the series resonant peak. While in series resonant opera-
tion, the inverter behaves like a current source.
Lamp-Current Regulation
The MAX8759 uses a lamp-current control loop to regu-
late the current delivered to the CCFL. The heart of the
Figure 4. Resonant Operation
VBATT
(a)
NH1
NL1
OFF
NH2
OFF
NL2
LX2LX1
VBATT
(b)
NH1
OFF
NL1
NH2
OFF
NL2
LX2LX1
VBATT
(c)
NH1
OFF
NL1
NH2
NL2
OFF
LX2LX1
VBATT
(d)
NH1
OFF
NL1
NH2
OFF
NL2
LX2LX1
(BODY DIODE TURNS ON FIRST)(BODY DIODE TURNS ON FIRST)
MAX8759Low-Cost, SMBus, CCFL Backlight Controller

Partno	Mfg	Dc	Qty	Available	Descript
MAX8759ETI+ \|MAX8759ETI	MAXIM	N/a	2380	avai	Low-Cost, SMBus, CCFL Backlight Controller
MAX8759ETI+T	MAXIM	N/a	10000	avai	Low-Cost, SMBus, CCFL Backlight Controller