MAX8632ETI ,Integrated DDR Power-Supply Solution for Desktops,Notebooks, and Graphic CardsELECTRICAL CHARACTERISTICS(V = +15V, V = AV = V = STBY = V = V = 5V, V = V = V = 2.5V, UVP/OVP = TP ..
MAX8632ETI+ ,Integrated DDR Power-Supply Solution for Desktops, Notebooks, and Graphic CardsApplications9SHDN 27VTTSDDR I and DDR II Memory Power SuppliesTPO 28 8 SSDesktop Computers12 34 5 6 ..
MAX8632ETI+T ,Integrated DDR Power-Supply Solution for Desktops, Notebooks, and Graphic CardsELECTRICAL CHARACTERISTICS(V = +15V, V = AV = V = STBY = V = V = 5V, V = V = V = 2.5V, UVP/OVP = TP ..
MAX863EEE ,Dual / High-Efficiency / PFM / Step-Up DC-DC ControllerApplications__________Typical Operating Circuit2- and 3-Cell Portable EquipmentOrganizersVINTransla ..
MAX863EEE ,Dual / High-Efficiency / PFM / Step-Up DC-DC ControllerFeaturesThe MAX863 dual-output DC-DC converter contains' Smallest Dual Step-Up Converter: 16-Pin Q ..
MAX863EEE+ ,Dual, High-Efficiency, PFM, Step-Up DC-DC ControllerApplications__________Typical Operating Circuit2- and 3-Cell Portable EquipmentOrganizersVINTransla ..
MB84256A-10LLP , CMOS 256K-BIT LOW POWER SRAM
MB84256A-10LPF , CMOS 256K-BIT LOW POWER SRAM
MB84VD21183EM-70PBS , Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS
MB84VD21194EM-70PBS , Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS
MB84VD22181FM-70PBS , 32M (X16) FLASH MEMORY & 4M (X16) STATIC RAM
MB84VD22182EE-90 ,32M (x 8/x16) FLASH MEMORY & 4M (x 8/x16) STATIC RAMFUJITSU SEMICONDUCTORDS05-50204-2EDATA SHEETStacked MCP (Multi-Chip Package) FLASH MEMORY & SRAMCMO ..
MAX8632ETI
Integrated DDR Power-Supply Solution for Desktops,Notebooks, and Graphic Cards
General DescriptionThe MAX8632 integrates a synchronous-buck PWM con-
troller to generate VDDQ, a sourcing and sinking LDO lin-
ear regulator to generate VTT, and a 10mA reference
output buffer to generate VTTR. The buck controller drives
two external n-channel MOSFETs to generate output volt-
ages down to 0.7V from a 2V to 28V input with output cur-
rents up to 15A. The LDO can sink or source up to 1.5A
continuous and 3A peak current. Both the LDO output
and the 10mA reference buffer output can be made to
track the REFIN voltage. These features make the
MAX8632 ideally suited for DDR memory applications in
desktops, notebooks, and graphic cards.
The PWM controller in the MAX8632utilizes Maxim’s
proprietary Quick-PWM™ architecture with programma-
ble switching frequencies of up to 600kHz. This control
scheme handles wide input/output voltage ratios with
ease and provides 100ns response to load transients
while maintaining high efficiency and a relatively con-
stant switching frequency. The MAX8632offers fully pro-
grammable UVP/OVP and skip-mode options ideal in
portable applications. Skip mode allows for improved
efficiency at lighter loads.
The VTT and VTTR outputs track to within 1% of VREFIN/ 2.
The high bandwidth of this LDO regulator allows excel-
lent transient response without the need for bulk capac-
itors, thus reducing cost and size.
The buck controller and LDO regulators are provided with
independent current limits. Adjustable lossless foldback
current limit for the buck regulator is achieved by monitor-
ing the drain-to-source voltage drop of the low-side
MOSFET. Additionally, overvoltage and undervoltage pro-
tection mechanisms are built in. Once the overcurrent
condition is removed, the regulator is allowed to enter
soft-start again. This helps minimize power dissipation
during a short-circuit condition. The MAX8632 allows flex-
ible sequencing and standby power management using
the SHDNand STBYinputs, which support all DDR
operating states.
The MAX8632is available in a small 5mm ×5mm, 28-
pin thin QFN package.
ApplicationsDDR I and DDR II Memory Power Supplies
Desktop Computers
Notebooks and Desknotes
Graphic Cards
Game Consoles
RAID
Networking
Features
Buck ControllerQuick-PWM with 100ns Load-Step ResponseUp to 95% Efficiency2V to 28V Input Voltage Range1.8V/2.5V Fixed or 0.7V to 5.5V Adjustable OutputUp to 600kHz Selectable Switching FrequencyProgrammable Current Limit with Foldback
Capability1.7ms Digital Soft-Start Independent Shutdown and Standby ControlsOvervoltage-/Undervoltage-Protection OptionPower-Good Window Comparator
LDO SectionFully Integrated VTT and VTTR CapabilityVTT Has ±3A Sourcing/Sinking CapabilityOnly 20µF Ceramic Capacitance Required for VTTVTT and VTTR Outputs Track VREFIN/ 2All-Ceramic Output-Capacitor Designs1.0V to 2.8V Input Voltage RangePower-Good Window Comparator
MAX8632
for Desktops, Notebooks, and Graphic Cards
Typical Operating Circuit appears at end of data sheet.Quick-PWM is a trademark of Maxim Integrated Products, Inc.
+Denotes lead-free packaging.
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN= +15V, VDD= AVDD= VSHDN= STBY= VBST= VILIM= 5V, VOUT= VREFIN= VVTTI= 2.5V, UVP/OVP = TP0 = FB = SKIP
= GND, PGND1 = PGND2 = LX = GND, TON = OPEN, VVTTS= VVTT, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at TA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VINto GND.............................................................-0.3V to +30V
VDD, AVDD, VTTI to GND.........................................-0.3V to +6V
SHDN, REFIN to GND..............................................-0.3V to +6V
SS, POK1, POK2, SKIP, ILIM, FB to GND................-0.3V to +6V
STBY, TON, REF, UVP/OVP to GND........-0.3V to (AVDD+ 0.3V)
OUT, VTTR to GND..................................-0.3V to (AVDD+ 0.3V)
DL to PGND1..............................................-0.3V to (VDD+ 0.3V)
DH to LX....................................................-0.3V to (VBST+ 0.3V)
LX to BST..................................................................-6V to +0.3V
LX to GND.................................................................-2V to +30V
VTT to GND...............................................-0.3V to (VVTTI+ 0.3V)
VTTS to GND............................................-0.3V to (AVDD+ 0.3V)
PGND1, PGND2, TP0 to GND...............................-0.3V to +0.3V
REF Short Circuit to GND...........................................Continuous
Continuous Power Dissipation (TA= +70°C)
28-Pin 5mm x 5mm Thin QFN (derate 35.7mW/°C
above +70°C).................................................................2.86W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
ELECTRICAL CHARACTERISTICS (continued)(VIN= +15V, VDD= AVDD= VSHDN= STBY= VBST= VILIM= 5V, VOUT= VREFIN= VVTTI= 2.5V, UVP/OVP = TP0 = FB = SKIP
= GND, PGND1 = PGND2 = LX = GND, TON = OPEN, VVTTS= VVTT, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at TA
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
ELECTRICAL CHARACTERISTICS (continued)(VIN= +15V, VDD= AVDD= VSHDN= STBY= VBST= VILIM= 5V, VOUT= VREFIN= VVTTI= 2.5V, UVP/OVP = TP0 = FB = SKIP
= GND, PGND1 = PGND2 = LX = GND, TON = OPEN, VVTTS= VVTT, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at TA
Dual Mode is a trademark of Maxim Integrated Products, Inc.
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
Note 2:When the inductor is in continuous conduction, the output voltage has a DC regulation level higher than the error-compara-
tor threshold by 50% of the ripple. In discontinuous conduction, the output voltage has a DC regulation level higher than the
trip level by approximately 1.5% due to slope compensation.
Note 3:On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = GND, VBST= 5V,
and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds.
ELECTRICAL CHARACTERISTICS (continued)(VIN= +15V, VDD= AVDD= VSHDN= STBY= VBST= VILIM= 5V, VOUT= VREFIN= VVTTI= 2.5V, UVP/OVP = TP0 = FB = SKIP
= GND, PGND1 = PGND2 = LX = GND, TON = OPEN, VVTTS= VVTT, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at TA= +25°C.) (Note 1)
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
Typical Operating Characteristics(VVIN= 12V, VOUT= 2.5V, TON = GND, SKIP= AVDD, circuit of Figure8, TA= +25°C, unless otherwise noted.)
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
LOAD TRANSIENT (BUCK)MAX8632 toc10
10µs/div
VOUT
100mV/div
VTT
50mV/div
VTTR
50mV/div
ILOAD
5A/div0A
LOAD TRANSIENT VTT (-1.5A TO +1.5A)MAX8632 toc11
10µs/div
VOUT
50mV/div
VTT
50mV/div
VTTR
50mV/div
IVTT
1A/div
LOAD TRANSIENT VTT (-3A TO +3A)MAX8632 toc12
10µs/div
VOUT
50mV/div
VTT
50mV/div
VTTR
50mV/div
IVTT
2A/div
POWER-UP WAVEFORMSMAX8632 toc13
200µs/div
OUT
2V/div
VTT
1V/div
VTTR
1V/div
VIN
10V/div0V
POWER-DOWN WAVEFORMSMAX8632 toc14
200µs/div
OUT
2V/div
VTT
1V/div
VTTR
1V/div
VIN
10V/div0V
STARTUP AND SHUTDOWN INTO
HEAVY LOAD, DISCHARGE DISABLEDMAX8632 toc15
1ms/div
VOUT
1V/div
VTT
1V/div
POK1
5V/div0V
SHDN
5V/div
Typical Operating Characteristics (continued)(VVIN= 12V, VOUT= 2.5V, TON = GND, SKIP= AVDD, circuit of Figure 8, TA= +25°C, unless otherwise noted.)
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
STANDBY RESPONSE, VTT AT NO LOADMAX8632 toc17b
2ms/div
500mV/div
500mV/div
500mV/div
5V/div
VOUT
VTT
VTTR
STBY
ypical Operating Characteristics (continued)(VVIN= 12V, VOUT= 2.5V, TON = GND, SKIP= AVDD, circuit of Figure8, TA= +25°C, unless otherwise noted.)
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic CardsFigure1. Functional Diagram
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
Detailed DescriptionThe MAX8632 combines a synchronous-buck PWM con-
troller, an LDO linear regulator, and a 10mA reference out-
put buffer. The buck controller drives two external
n-channel MOSFETs to deliver load currents up to 12A
and generate voltages down to 0.7V from a +2V to +28V
input. The LDO linear regulator can sink and source up to
1.5A continuous and 3A peak current with relatively fast
response. These features make the MAX8632 ideally
suited for DDR memory applications.
The MAX8632 buck regulator is equipped with a fixed
switching frequency of up to 600kHz using Maxim’s
proprietary constant on-time Quick-PWM architecture.
This control scheme handles wide input/output voltage
ratios with ease, and provides 100ns “instant-on”
response to load transients, while maintaining high effi-
ciency with relatively constant switching frequency.
The buck controller, LDO, and a reference output
buffer are provided with independent current limits.
Lossless foldback current limit in the buck regulator is
achieved by monitoring the drain-to-source voltage
drop of the low-side FET. The ILIM input is used to
adjust this current limit. Overvoltage protection, if
selected, is achieved by latching the low-side synchro-
nous FET on and the high-side FET off when the output
voltage is over 116% of its set output. It also features
an optional undervoltage protection by latching the
MOSFET drivers to the OFF state during an overcurrent
condition, when the output voltage is lower than 70% of
the regulated output. This helps minimize power dissi-
pation during a short-circuit condition.
The current limit in the LDO and buffered reference out-
put buffer is ±5A and ±32mA, respectively, and neither
have the over- or undervoltage protection. When the
current limit in either output is reached, the output no
longer regulates the voltage, but regulates the current
to the value of the current limit.
+5V Bias Supply (VDDand AVDD)The MAX8632 requires an external +5V bias supply in
addition to the input voltage (VIN). Keeping the bias sup-
ply external to the IC improves the efficiency and elimi-
nates the cost associated with the +5V linear regulator
that would otherwise be needed to supply the PWM cir-
cuit and the gate drivers. If stand-alone capability is
needed, then the +5V supply can be generated with an
external linear regulator such as the MAX1615. VDD,
AVDD, and IN can be connected together if the input
source is a fixed +4.5V to +5.5V supply.
VDDis the supply input for the buck regulator’s MOSFET
drivers, and AVDDsupplies the power for the rest of
the IC. The current from the AVDDand VDDpower
supply must supply the current for the IC and the gate
drive for the MOSFETs. This maximum current can be
estimated as:
where IVDD+ IAVDDare the quiescent supply currents
into VDDand AVDD, QG1and QG2are the total gate
charges of MOSFETs Q1 and Q2 (at VGS= 5V) in the
Typical Applications Circuit of Figure 8, and fSWis the
switching frequency.
Free-Running Constant-On-Time PWMThe Quick-PWM control architecture is a pseudo-fixed-
frequency, constant on-time, current-mode regulator
with voltage feed-forward (Figure1). This architecture
relies on the output filter capacitor’s ESR to act as a
current-sense resistor, so the output ripple voltage pro-
vides the PWM ramp signal. The control algorithm is
simple: the high-side switch on-time is determined
solely by a one-shot whose pulse width is inversely pro-
portional to input voltage and directly proportional to
the output voltage. Another one-shot sets a minimum
off-time of 300ns (typ). The on-time one-shot is trig-
gered if the error comparator is low, the low-side switch
current is below the valley current-limit threshold, and
the minimum off-time one-shot has timed out.
On-Time One-Shot (TON)The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to input and output voltages. The high-side
switch on-time is inversely proportional to the input volt-
age (VIN) and is proportional to the output voltage:
where K (the switching period) is set by the TON input
connection (Table1) and RDS(ON)Q2is the on-resis-
tance of the synchronous rectifier (Q2) in the Typical
Applications Circuit(Figure8). This algorithm results in
a nearly constant switching frequency despite the lack
of a fixed-frequency clock generator. The benefits of a
constant switching frequency are twofold:The frequency can be selected to avoid noise-sensi-
tive regions such as the 455kHz IF band.The inductor ripple-current operating point remains
relatively constant, resulting in an easy design
methodology and predictable output voltage ripple.
The on-time one-shot has good accuracy at the operat-
ing points specified in the Electrical Characteristics
table(approximately ±12.5% at 600kHz and 450kHz,
and ±10% at 200kHz and 300kHz). On-times at operat-
ing points far removed from the conditions specified in
the Electrical Characteristicstablecan vary over a
wider range. For example, the 600kHz setting typically
runs approximately 10% slower with inputs much
greater than 5V due to the very short on-times required.
The constant on-time translates only roughly to a con-
stant switching frequency. The on-times guaranteed in
the Electrical Characteristicstableare influenced by
resistive losses and by switching delays in the high-
side MOSFET. Resistive losses, which include the
inductor, both MOSFETs, the output capacitor’s ESR,
and any PC board copper losses in the output and
ground, tend to raise the switching frequency as the
load increases. The dead-time effect increases the
effective on-time, reducing the switching frequency as
one or both dead times are added to the effective on-
time. The dead time occurs only in PWM mode (SKIP=
VDD) and during dynamic output-voltage transitions
when the inductor current reverses at light or negative
load currents. With reversed inductor current, the induc-
tor’s EMF causes LX to go high earlier than normal,
extending the on-time by a period equal to the DH-rising
dead time. For loads above the critical conduction point,
where the dead-time effect is no longer a factor, the
actual switching frequency is:
where VDROP1is the sum of the parasitic voltage drops
in the inductor discharge path, including the synchro-
nous rectifier, the inductor, and any PC board resis-
tances; VDROP2is the sum of the resistances in the
charging path, including the high-side switch (Q1 in the
Typical Applications Circuitof Figure 8), the inductor,
and any PC board resistances, and tON is the one-shot
on-time (see the On-Time One-Shot (TON)section.
Automatic Pulse-Skipping Mode
(SKIP= GND)In skip mode (SKIP= GND), an inherent automatic
switchover to PFM takes place at light loads (Figure2).
This switchover is affected by a comparator that trun-
cates the low-side switch on-time at the inductor cur-
rent’s zero crossing. The zero-crossing comparator
differentially senses the inductor current across the
synchronous-rectifier MOSFET (Q2 in the Typical
Applications Circuitof Figure8). Once VPGND- VLX
drops below 5% of the current-limit threshold (2.5mV
for the default 50mV current-limit threshold), the com-
parator forces DL low (Figure1). This mechanism caus-
es the threshold between pulse-skipping PFM and
nonskipping PWM operation to coincide with the
boundary between continuous and discontinuous
inductor-current operation (also known as the critical
conduction point). The load-current level at which
PFM/PWM crossover occurs, ILOAD(SKIP), is equal to
half the peak-to-peak ripple current, which is a function
of the inductor value (Figure2). This threshold is rela-
tively constant, with only a minor dependence on the
input voltage (VIN):
where K is the on-time scale factor (see Table1). For
example, in the Typical Applications Circuit of Figure8
(K = 1.7µs, VOUT= 2.5V, VIN= 12V, and L = 1µH), the
pulse-skipping switchover occurs at:
The crossover point occurs at an even lower value if a
swinging (soft-saturation) inductor is used. The switching
waveforms can appear noisy and asynchronous when
light loading causes pulse-skipping operation, but this is
a normal operating condition that results in high light-
load efficiency. Trade-offs in PFM noise vs. light-load
efficiency are made by varying the inductor value.
Generally, low inductor values produce a broader effi-
ciency vs. load curve, while higher values result in higher
full-load efficiency (assuming that the coil resistance
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
MAX8632remains fixed) and less output voltage ripple. Penalties
for using higher inductor values include larger physical
size and degraded load-transient response, especially
at low input-voltage levels.
DC output accuracy specifications refer to the threshold
of the error comparator. When the inductor is in continu-
ous conduction, the MAX8632 regulates the valley of the
output ripple, so the actual DC output voltage is higher
than the trip level by 50% of the output ripple voltage. In
discontinuous conduction (SKIP= GND and ILOAD<
ILOAD(SKIP)), the output voltage has a DC regulation
level higher than the error-comparator threshold by
approximately 1.5% due to slope compensation.
Forced-PWM Mode (SKIP= AVDD)The low-noise forced-PWM mode (SKIP= AVDD) dis-
ables the zero-crossing comparator, which controls the
low-side switch on-time. This forces the low-side gate-
drive waveform to constantly be the complement of the
high-side gate-drive waveform, so the inductor current
reverses at light loads while DH maintains a duty factor
of VOUT/ VIN. Forced-PWM mode keeps the switching
frequency fairly constant. However, forced-PWM opera-
tion comes at a cost where the no-load VDDbias cur-
rent remains between 2mA and 20mA due to the
external MOSFET’s gate charge and switching frequen-
cy. Forced-PWM mode is most useful for reducing
audio frequency noise, improving load-transient
response, and providing sink-current capability for
dynamic output-voltage adjustment.
Current-Limit Buck Regulator (ILIM)
Valley Current LimitThe current-limit circuit for the buck regulator portion of
the MAX8632 employs a unique “valley” current-sensing
algorithm that senses the voltage drop across LX and
PGND1 and uses the on-resistance of the rectifying
MOSFET (Q2 in the Typical Applications Circuitof
Figure8) as the current-sensing element. If the magni-
tude of the current-sense signal is above the valley cur-
rent-limit threshold, the PWM controller is not allowed to
initiate a new cycle (Figure4). With valley current-limit
sensing, the actual peak current is greater than the val-
ley current-limit threshold by an amount equal to the
inductor current ripple. Therefore, the exact current-limit
characteristic and maximum load capability are a func-
tion of the current-sense resistance, inductor value, and
input voltage. When combined with the undervoltage-
protection circuit, this current-limit method is effective in
almost every circumstance.
In forced-PWM mode, the MAX8632 also implements a
negative current limit to prevent excessive reverse induc-
tor currents when the buck regulator output is sinking
current. The negative current-limit threshold is set to
approximately 120% of the positive current limit and
tracks the positive current limit when VILIMis adjusted.
The current-limit threshold is adjusted with an external
resistor-divider at ILIM. A 2µA to 20µA divider current is
recommended for accuracy and noise immunity.
The current-limit threshold adjustment range is from
25mV to 200mV. In the adjustable mode, the current-
limit threshold voltage (from PGND1 to LX) is precisely
1/10th the voltage seen at ILIM. The threshold defaults
to 50mV when ILIM is connected to AVDD. The logic
threshold for switchover to the 50mV default value is
approximately AVDD- 1V.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the differ-
ential current-sense signals seen between LX and GND.
POR, UVLO, and Soft-StartInternal power-on reset (POR) occurs when AVDDrises
above approximately 2V, resetting the fault latch and
the soft-start counter, powering up the reference, and
preparing the buck regulator for operation. Until AVDD
reaches 4.25V (typ), AVDDundervoltage-lockout
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
(UVLO) circuitry inhibits switching. The controller
inhibits switching by pulling DH low and holding DL low
when OVP and shutdown discharge are disabled
(OVP/UVP = REF or GND) or forcing DL high when OVP
and shutdown discharge are enabled (OVP/UVP =
AVDDor OPEN). See Table3 for a detailed truth table
for OVP/UVP and shutdown settings. When AVDDrises
above 4.25V, the controller activates the buck regulator
and initializes the internal soft-start.
The buck regulator’s internal soft-start allows a gradual
increase of the current-limit level during startup to
reduce the input surge currents. The MAX8632 divides
the soft-start period into five phases. During the first
phase, the controller limits the current limit to only 20%
of the full current limit. If the output does not reach reg-
ulation within 425µs, soft-start enters the second phase,
and the current limit is increased by another 20%. This
process repeats until the maximum current limit is
reached, after 1.7ms, or when the output reaches the
nominal regulation voltage, whichever occurs first.
Adding a capacitor in parallel with the external ILIM
resistors creates a continuously adjustable analog soft-
start function for the buck regulator’s output.
Soft-start in the LDO section can be realized by con-
necting a capacitor between the SS pin and ground.
When VTT is turned off or placed in standby mode, or
during thermal shutdown of the LDOs, the SS capacitor
is discharged. When VTT is turned on or when the ther-
mal limit is removed, an internal 4µA (typ) current
charges the SS capacitor. The resulting ramp voltage
on SS linearly increases the current-limit comparator
threshold to the VTT output, until full current limit is
attained when SS reaches approximately 1.6V. This
lowering of the current limit during startup limits the ini-
tial inrush current peaks, particularly when driving
capacitors. Choose the value of the SS capacitor
appropriately to set the soft-start time window. Leave
SS floating to disable the soft-start feature.
MAX8632
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
