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MAX8563EEE+ |MAX8563EEEMAXIMN/a771avai±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers
MAX8564AEUB+ |MAX8564AEUBMAXIMN/a300avai±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers
MAX8564EUBMAXIMN/a3avai±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers


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MAX8564AEUB+ ,±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllersapplications. ♦ ±1% Feedback RegulationThese parts feature a 0.5V reference voltage with ±1%♦ Adjus ..
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MAX8563EEE+-MAX8564AEUB+-MAX8564EUB
±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers
General Description
The MAX8563/MAX8564/MAX8564A ultra-low-output dual
and triple LDO controllers allow flexible and inexpensive
point-of-load voltage conversion in motherboards,
desknotes, notebooks, and other applications.
These parts feature a 0.5V reference voltage with ±1%
accuracy providing tight regulation of the output volt-
age. The MAX8563 has three n-channel MOSFET con-
troller outputs, and the MAX8564/MAX8564A has two
controller outputs.
Each controller output is adjustable from 0.5V to 3.3V
when VDD= 12V and between 0.5V and 1.8V when VDD
= 5V. Each output is independently enabled and asserts
a POK signal when the output reaches 94% of the set
value. Each output is protected against a soft short-circuit
condition by an undervoltage comparator that disables
the output when it drops to under 80% of the set voltage
for more than 50µs. For a catastrophic short condition, the
regulators are shut down immediately if the output drops
below 60% of the set voltage.
The MAX8563 is available in a 16-pin QSOP
package, and the MAX8564/MAX8564A are available
in a 10-pin µMAX®package.
Applications
Features
MAX8563: 3 OutputsMAX8564/MAX8564A: 2 Outputs±1% Feedback RegulationAdjustable Output Voltage Down to 0.5VCan Use Ceramic Output CapacitorsWide Supply Voltage Range Permits Operation
from 5V or 12V Rails
Individual Enable Control and POK Signal Allows
Sequencing
Overload Protection Against Soft Short-Circuit
Condition
Undervoltage Short-Circuit ProtectionDrive n-Channel MOSFETs
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
Ordering Information

19-3290; Rev 2; 6/06
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE
MAX8563EEE
-40°C to +85°C16 QSOPE16-1
MAX8564EUB
-40°C to +85°C10 µMAXU10-2
MAX8564AEUB+
-40°C to +85°C10 µMAXU10-2
OFF
OFF
OFF
DRV1
FB1
EN1
POK1
GND
N.C.
DRV3
FB3
VDD
DRV2
FB2
EN2
POK2
N.C.
POK3
EN3
MAX8563
1.8V ±5% INR2
OUT1
1.5V/1.5A
POK1
3.3V ±5% IN
OUT3
2.5V/2A*
C10C6C3
OUT2
1.05V/3A
POK2
POK3
5V OR 12VIN
1.2V ±5% IN
*2.5V OUTPUT ONLY WITH VDD = 12Vypical Operating Circuit
Pin Configurations appear at end of data sheet.

µMAX is a registered trademark of Maxim Integrated Products, Inc.
+Denotes lead-free package.Motherboards
Dual/Triple Power Supplies
Desknotes and Notebooks
Graphic Cards
Ultra-Low-Dropout
Voltage Regulators
Low-Voltage DSP, µP, and
Microcontroller PowerSupplies
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= VEN1 = VEN2 = VEN3 = 5V, VGND = 0V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND............................................................-0.3V to +14V
DRV1, DRV2, DRV3, EN1, EN2,
EN3 to GND............................................-0.3V to (VDD+ 0.3V)
FB1, FB2, FB3, POK1, POK2, POK3 to GND...........-0.3V to +6V
Continuous Power Dissipation (TA = +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C)........444.4mW
16-Pin QSOP (derate 8.3mW/°C above +70°C)........666.7mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERCONDITIONSMINTYPMAXUNITS
GENERAL

VDD Voltage Range4.513.2V
VDD Undervoltage-Lockout ThresholdRising, 200mV hysteresis (typ)3.563.764.00V
VEN_ = VDD = 12V (MAX8563)9301600VDD Quiescent CurrentVEN_ = VDD = 12V (MAX8564/MAX8564A)6601200µA
VDD Shutdown CurrentEN1 = EN2 = EN3 = GND, VDD = 12V25µA
LDOs

TA = 0°C to +85°C0.4940.50.504FB_ AccuracyTA = -40°C to +85°C0.4890.509V
TA = +25°C-100+100FB_ Input Bias CurrentTA = +85°C-8nA
MAX8563, MAX8564100DRV_ Soft-Start Charging CurrentMAX8564A10µA
TA = 0°C to +85°C4DRV_ Max Sourcing CurrentVFB_ = 0.45VTA = -40°C to +85°C37mA
TA = 0°C to +85°C3DRV_ Max Sinking CurrentVFB_ = 0.6VTA = -40°C to +85°C1.87mA
VDD = 5V, VFB_ = 0.46V4.7DRV_ Max VoltageVDD = 13.2V, VFB_ = 0.46V8.010.9V
FB_ Slow Short-Circuit ThresholdMeasured at FB_ (falling)400mV
FB_ Fast Short-Circuit ThresholdMeasured at FB_ (falling)300mV
Slow Short-Circuit Timer50µs
FB_ to DRV_ Transconductance0.1150.240.460Mho
LOGIC

EN_ Input Low Level0.7V
EN_ Input High Level1.3V
TA = +25°C-0.1+0.1EN_ Input Leakage CurrentVEN_ = 0 and VDD,
VDD = 13.2VTA = +85°C0.001µA
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
ELECTRICAL CHARACTERISTICS (continued)

(VDD= VEN1 = VEN2 = VEN3 = 5V, VGND = 0V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERCONDITIONSMINTYPMAXUNITS

POK_ Threshold FallingMeasured at FB_ (falling)425440455mV
POK_ Threshold Rising at StartupMeasured at FB_ (rising)455470485mV
POK_ Output Low LevelSinking 1mA, VDD = 4.5V, VFB_ = 0.4V0.1V
TA = +25°C0.1POK_ Output High LeakageVDD = 5.5VTA = +85°C0.001µA
Note 1:
Specifications are production tested at TA= +25°C. Maximum and minimum specifications over temperature are guaranteed by
design.
Typical Operating Characteristics

(Circuit of Figure 1, TA = +25°C.)
OUTPUT VOLTAGE vs. INPUT VOLTAGE

MAX8563 toc01
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VDD = 5VVOUT1
VOUT2
OUTPUT VOLTAGE vs. INPUT VOLTAGE

MAX8563 toc02
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VDD = 12VVOUT3
VOUT1
VOUT2
OUTPUT VOLTAGE vs. OUTPUT CURRENT

MAX8563 toc03
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
VDD = 12V
VOUT3
VOUT1
VOUT2
FEEDBACK VOLTAGE
vs. TEMPERATURE

MAX8563 toc04
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)3510-15
VDD = 5V
VDD = 12V
PSRR vs. FREQUENCY

MAX8563 toc05
FREQUENCY (Hz)
PSRR (dB)
10k1k
100100k
VOUT1 = 1.5V
VIN1 = 2V
LOAD = 1.25Ω
VDD = 12V
LOAD TRANSIENT

MAX8563 toc06
IOUT2
VDRV2
VIN2
VOUT220mV/div
AC-COUPLED
2V/div
200mV/div
AC-COUPLED
2A/div
10μs/div
VDD = 12V
FIGURE 1, C7 = 100μF 6TPE100MI
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
Typical Operating Characteristics (continued)

(Circuit of Figure 1, TA = +25°C.)
POWER-ON SEQUENCING WITH VDD

MAX8563 toc07
VDD
VPOK1
VIN1
VOUT12V/div
2V/div
2V/div
20V/div
20ms/div
POWER-ON SEQUENCING WITH VIN

MAX8563 toc08
VDD
VPOK1
VOUT1
VIN12V/div
2V/div
2V/div
20V/div
10ms/divENABLE CONFIGURED AS
SHOWN IN FIGURE 4
RD = 100kΩ, RE = 4kΩ
ENABLE-ON SEQUENCING

MAX8563 toc09
VIN1
VPOK1
VOUT1
EN1
2V/div
2V/div
2V/div
2V/div
20ms/div
SHORT-CIRCUIT PROTECTION

MAX8563 toc10
IOUT1
VDRV1
VOUT1
5A/div
2V/div
1V/div
20μs/div
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers

VDD
VDD
0.5V
POK
COMPARATOR
LDO
CONTROLLER 1
LDO
CONTROLLER 2
LDO
CONTROLLER 3
0.5V
REFUVLO
VDD
EN1
POK1
GND
EN2
POK2
EN3
POK3FB3
DRV3
DRV2
FB1
FB2
DRV1
MAX8563
MAX8564
MAX8564A
Functional Diagram
Pin Description
NAME
PINMAX8563MAX8564/
MAX8564A
FUNCTION
DRV1DRV1
Output n-MOSFET Drive. Drives the gate of an external n-channel MOSFET to regulate output 1.
DRV1 is internally pulled to ground when EN1 is logic low. Connect an external series RC circuit
for compensation. See the Stability Compensation section.
2FB1FB1
Feed b ack Inp ut for Outp ut 1. C onnect to the center of a r esi stor - d i vi d er b etw een outp ut 1 and GN D to
set the outp ut vol tag e of outp ut 1. The feed b ack r eg ul ati on vol tag e i s 0.500V . S ee the Outp ut V ol tag eetti ng secti on.EN1EN1Enable Control for Output 1. Drive logic high to enable output 1, or logic low to disable the
output. Connect to VDD for always-on operation.POK1POK1Output 1 Power-Good Signal. Open-drain output pulls low when output 1 is 12% below the
nominal regulated voltage.GNDGNDGroundPOK2Output 2 Power-Good Signal. Open-drain output pulls low when output 2 is 12% below the
nominal regulated voltage.6
N.C.—No Internal Connection
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
Pin Description (continued)
NAME
PIN
MAX8563MAX8564/
MAX8564A
FUNCTION
EN2Enable Control for Output 2. Drive logic high to enable output 2, or logic low to disable the
output. Connect to VDD for always-on operation.
DRV3—utp ut 3 n- M O S FE T D r i ve. D r i ves the g ate of an exter nal n- channel M O S FE T to r eg ul ate outp ut 3.
DRV3 is internally pulled to ground when EN3 is logic low. Connect an external series RC circuit
for compensation. See the Stability Compensation section.FB2
Feedback Input for Output 2. Connect to the center of a resistor-divider between output 2 and
GND to set the output voltage of output 2. The feedback regulation voltage is 0.500V. See the
Output Voltage Setting section.8
FB3—
Feedback Input for Output 3. Connect to the center of a resistor-divider between output 3 and
GND to set the output voltage of output 3. The feedback regulation voltage is 0.500V. See the
Output Voltage Setting section.DRV2utp ut 2 n- M O S FE T D r i ve. D r i ves the g ate of the exter nal n- channel M OS FE T to r eg ul ate outp ut 2.
DRV2 is internally pulled to ground when EN2 is logic low. Connect an external series RC circuit
for compensation. See the Stability Compensation section.9
EN3—Enable Control for Output 3. Drive logic high to enable output 3, or logic low to disable the
output. Connect to VDD for always-on operation.
—VDD+5V or +12V Supply Input. Connect to external +5V or +12V supply rail. Bypass with a 0.1µF
ceramic or larger capacitor.
POK3—Output 3 Power-Good Signal. Open-drain output pulls low when output 3 is 12% below the
nominal regulated voltage.N.C.—No Internal ConnectionPOK2—Output 2 Power-Good Signal. Open-drain output pulls low when output 2 is 12% below the
nominal regulated voltage.EN2—Enable Control for Output 2. Drive logic high to enable output 2, or logic low to disable the
output. Connect to a VDD for always-on operation.FB2—
Feedback Input for Output 2. Connect to the center of a resistor-divider between output 2 and
GND to set the output voltage of output 2. The feedback regulation voltage is 0.500V. See the
Output Voltage Setting section.DRV2—utp ut 2 n- M O S FE T D r i ve. D r i ves the g ate of the exter nal n- channel M OS FE T to r eg ul ate outp ut 2.
DRV2 is internally pulled to ground when EN2 is logic low. Connect an external series RC circuit
for compensation. See the Stability Compensation section.VDD—+5V or +12V Supply Input. Connect to an external +5V or +12V supply rail. Bypass with a 0.1µF
ceramic or larger capacitor.
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllersypical Application Circuits
MAX8563: Triple Output

OFF
OFF
OFF
DRV1
FB1
EN1
POK1
GND
N.C.
DRV3
FB3
VDD
DRV2
FB2
EN2
POK2
N.C.
POK3
EN3
MAX8563
1.8V ±5% INR2
OUT1
1.5V/1.5A
POK1
3.3V ±5% IN
OUT3
2.5V/2A*
C10C6C3
OUT2
1.05V/3A
POK2
POK3
5V OR 12VIN
1.2V ±5% IN
*2.5V OUTPUT ONLY WITH VDD = 12V
Figure 1. MAX8563 Typical Application Circuit
MAX8563/MAX8564/MAX8564A
±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllersypical Application Circuits (continued)
MAX8564/MAX8564A: Dual Output

Figure 2. MAX8564/MAX8564A Typical Application Circuit
MAX8563 External Component List
COMPONENTSQTYDESCRIPTION

C1, C3, C83
2.2µF, 10V X5R ceramic capacitors
(optional 100µF, 18mΩ, 6.3V
aluminum electrolytic, Sanyo
GTPE100MI in parallel)10.1µF, 16V X7R ceramic capacitor
C4, C7, C93
100µF, 18mΩ, 6.3V aluminum
electrolytic capacitors
Sanyo GTPE100MI
C5, C6, C1031µF, 16V X7R ceramic capacitors
Q1/Q2 (dual)1Dual n-channel MOSFETs, 30V, 18mΩ
Vishay Si4922DY1n-channel MOSFET, 30V, 50mΩ
Fairchild Semiconductor FDD6630A1 665Ω ±1% resistor1 620Ω ±5% resistor1 332Ω ±1% resistor1 390Ω ±5% resistor1 182Ω ±1% resistor1 165Ω ±1% resistor1 910Ω ±5% resistor1 1kΩ ±1% resistor1 249Ω ±1% resistor
MAX8564/MAX8564A External
Component List
COMPONENTSQTYDESCRIPTION

C1110.1µF, 16V X7R ceramic capacitor
C12, C142
100µF, 18mΩ, 6.3V aluminum
electrolytic capacitors
Sanyo GTPE100MI
C15, C172
2.2µF, 10V X5R ceramic capacitors
(optional 100µF, 18mΩ, 6.3V
aluminum electrolytic, Sanyo
GTPE100MI in parallel)
C18, C2021µF, 16V X7R ceramic capacitors
Q4/Q5 (dual)1Dual n-channel MOSFETs, 30V, 18mΩ
Vishay Si4922DY
R131 165Ω ±1% resistor
R141 182Ω ±1% resistor
R151 390Ω ±5% resistor
R161 665Ω ±1% resistor
R171 332Ω ±1% resistor
R181 620Ω ±5% resistor
OFF
OFF
DRV1
FB1
EN1
POK1
GND
VDD
DRV2
FB2
EN2
POK2
MAX8564
MAX8564A
1.8V ±5% IN
C15
C20R18
R16C14
OUT1
1.5V/1.5A
R17
POK1
R13
R14
R15C18
C11C17
C12
OUT2
1.05V/3A
POK2
5V OR 12VIN
1.2V ±5% IN
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