MAX823SEUK ,Microprocessor supervisory circuit. Reset threshold 2.93V. Active-low reset. Watchdog input. Manual reset input.FeaturesThe MAX823/MAX824/MAX825* microprocessor (µP) ' Precision Monitoring of +3V, +3.3V, and +5V ..
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MB81C81A-35 ,CMOS 256K-BIT HIGH-SPEED SRAMMay 1990 00
Edition1.0 FUJITSU
M38 1 C8 1A-25/-35
CMOS 256K-BI T HIGH-SPEED SRAM
256K Words ..
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MB8264A-10 , MOS 65536-BIT DYNAMIC RANDOM ACCESS MEMORY
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MAX823LEUK-MAX823MEUK-MAX823SEUK-MAX823TEUK-MAX824MEUK-MAX825LEUK-MAX825MEUK-MAX825SEUK
Microprocessor supervisory circuit. Reset threshold 4.63V. Active-low reset. Watchdog input. Manual reset input.
_______________General DescriptionThe MAX823/MAX824/MAX825* microprocessor (µP)
supervisory circuits combine reset output, watchdog,
and manual-reset input functions in a 5-pin SOT23-5
package. They significantly improve system reliability
and accuracy compared to separate ICs or discrete
components. The MAX823/MAX824/MAX825 are
specifically designed to ignore fast transients on VCC.
Five preprogrammed reset threshold voltages are
available, designated by the following package
suffixes: L = 4.63V, M = 4.38V, T = 3.08V, S = 2.93V,
and R = 2.63V. All three devices have an active-low
reset output, which is guaranteed to be in the correct
state for VCCdown to 1V. The MAX824/MAX825 also
have an active-high reset output. The following Selector
Guide explains the functions offered in this series of
parts.
________________________ApplicationsBattery-Powered Computers and Controllers
Embedded Controllers
Intelligent Instruments
Automotive Systems
Critical µP Monitoring
Portable/Battery-Powered Equipment
____________________________FeaturesPrecision Monitoring of +3V, +3.3V, and +5V
Power SuppliesOperating Current: 10µA (MAX823L/M)
3µA (MAX825T/S/R)Fully Specified Over Temperature140ms Min Power-On ResetGuaranteed RESET Valid to VCC= 1V Power-Supply Transient ImmunityWatchdog Timer with 1.6sec Timeout
(MAX823/MAX824)Manual-Reset Input (MAX823/MAX825)No External Components
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
__________________________________________________________Pin Configurations
_____________________Selector Guide19-0487; Rev 1; 6/97
Typical Operating Circuit appears at end of data sheet.
Marking Information appears at end of data sheet.*Patents Pending
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= +4.75V to +5.5V for MAX82_L, VCC= +4.5V to +5.5V for MAX82_M, VCC= +3.15V to +3.6V for MAX82_T, VCC= +3V
to +3.6V for MAX82_S, VCC= +2.7V to +3.6V for MAX82_R, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC........................................................................-0.3V to +6.0V
All Other Pins..............................................-0.3V to (VCC+ 0.3V)
Input Current, All Pins Except RESET and RESET..............20mA
Output Current, RESET, RESET..........................................20mA
Rate of Rise, VCC............................................................100V/µs
Continuous Power Dissipation (TA= +70°C)
SOT23-5 (derate 7.1mW/°C above +70°C)...................571mW
Operating Temperature Range
MAX82_EUK.....................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
ELECTRICAL CHARACTERISTICS (continued)(VCC= +4.75V to +5.5V for MAX82_L, VCC= +4.5V to +5.5V for MAX82_M, VCC= +3.15V to +3.6V for MAX82_T, VCC= +3V
to +3.6V for MAX82_S, VCC= +2.7V to +3.6V for MAX82_R, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
Note 1:Over-temperature limits are guaranteed by design and not production tested.
Note 2:The RESETshort-circuit current is the maximum pull-up current when RESETis driven low by a µP bidirectional reset pin.
Note 3:WDI is internally serviced within the watchdog period if WDI is left unconnected.
Note 4:The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is
designed to drive a three-stated-output device with a 10µA maximum leakage current and a maximum capacitive load of
200pF. This output device must be able to source and sink at least 200µA when active.
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
__________________________________________Typical Operating Characteristics(MAX823L, VCC= +5V, TA= +25°C, unless otherwise noted.)
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
______________________________________________________________Pin DescriptionFigure 1. Functional Diagram
MAX823/MAX824/MAX825
5-Pin Microprocessor Supervisory Circuits
_______________Detailed Description
RESET OutputA microprocessor’s (µP’s) reset input starts the µP in a
known state. The MAX823/MAX824/MAX825 µP super-
visory circuits assert a reset to prevent code-execution
errors during power-up, power-down, and brownout
conditions. RESETis guaranteed to be a logic low for
VCCdown to 1V. Once VCCexceeds the reset thresh-
old, an internal timer keeps RESETlow for the specified
reset timeout period (tRP); after this interval, RESET
returns high (Figure 2).
If a brownout condition occurs (VCCdips below the
reset threshold), RESETgoes low. Each time RESETis
asserted it stays low for the reset timeout period. Any
time VCCgoes below the reset threshold the internal
timer restarts. RESETboth sources and sinks current.
RESET on the MAX824/MAX825 is the inverse of
RESET.
Manual-Reset Input (MAX823/MAX825)Many µP-based products require manual-reset capabili-
ty, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. On the MAX823/
MAX825, a logic low on MRasserts reset. Reset remains
asserted while MRis low, and for tRP(200ms nominal)
after it returns high. MRhas an internal 52kΩpull-up
resistor, so it can be left open if not used. This input can
be driven with CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open momentary
switch from MRto GND to create a manual-reset func-
tion; external debounce circuitry is not required. If MRis
driven from long cables or the device is used in a noisy
environment, connect a 0.1µF capacitor from MRto
GND to provide additional noise immunity.
Watchdog Input (MAX823/MAX824)In the MAX823/MAX824, the watchdog circuit monitors
the µP’s activity. If the µP does not toggle the watchdog
input (WDI) within tWD(1.6sec), reset asserts. The inter-
nal 1.6sec timer is cleared by either a reset pulse or by
toggling WDI, which detects pulses as short as 50ns.
While reset is asserted, the timer remains cleared and
does not count. As soon as reset is released, the timer
starts counting (Figure 3).
Disable the watchdog function by leaving WDI uncon-
nected or by three-stating the driver connected to WDI.
The watchdog input is internally driven low during the
first 7/8 of the watchdog timeout period and high for the
last 1/8 of the watchdog timeout period. When WDI is
left unconnected, this internal driver clears the 1.6sec
timer every 1.4sec. When WDI is three-stated or uncon-
nected, the maximum allowable leakage current is
10µA and the maximum allowable load capacitance is
200pF.
__________Applications Information
Watchdog Input CurrentThe MAX823/MAX824 WDI inputs are internally driven
through a buffer and series resistor from the watchdog
counter (Figure 1). When WDI is left unconnected, the
watchdog timer is serviced within the watchdog timeout
period by a low-high-low pulse from the counter chain.
For minimum watchdog input current (minimum overall
power consumption), leave WDI low for the majority of
the watchdog timeout period, pulsing it low-high-low
once within the first 7/8 of the watchdog timeout period
to reset the watchdog timer. If WDI is externally driven
high for the majority of the timeout period, up to 160µA
can flow into WDI.
Figure 2. Reset Timing Diagram
Figure 3. MAX823/MAX824 Watchdog Timing Relationship
