MAX800LEPE ,Microprocessor Supervisory CircuitsGeneral Description ________
MAX800M ,Microprocessor Supervisory CircuitsFeatures include write protection ● Guaranteed RESET Assertion to V = +1VCCof CMOS RAM or EEPROM, s ..
MAX800MCPE ,Microprocessor Supervisory CircuitsFeaturesThe MAX691A/MAX693A/MAX800L/MAX800M micro-' 200ms Power-OK/Reset Timeout Periodprocessor (µ ..
MAX800MCPE ,Microprocessor Supervisory CircuitsFeatures include write pro-™ ™' MaxCap or SuperCap Compatibletection of CMOS RAM or EEPROM, separat ..
MAX800MCSE ,Microprocessor Supervisory CircuitsMAX691A/MAX693A/MAX800L/MAX800M19-0094; Rev 7a; 12/96Microprocessor Supervisory Circuits___________ ..
MAX800MEPE ,Microprocessor Supervisory CircuitsApplications______________Ordering InformationComputersControllersPART TEMP. RANGE PIN-PACKAGEMAX69 ..
MB7117E , Schottky TTL 2048-Bit Bipolar Programmable Read-Only Memory
MB71A38-25 , PROGRAMMABLE SCHOTTKY 16384-BIT READ ONLY MEMORY
MB8117800A-60 ,2 M X 8 BIT FAST PAGE MODE DYNAMIC RAMapplications where very low power dissipation and high bandwidth are basic requirements of the desi ..
MB81464- ,MOS 262144 Bit DRAMfeatures page mode which allows high speed
random access of up to 256 bits within the same tow.
..
MAX800LCPE-MAX800LCSE-MAX800LEPE-MAX800MCPE-MAX800MCSE-MAX800MEPE-MAX800MESE
Microprocessor Supervisory Circuits
_______________General DescriptionThe MAX691A/MAX693A/MAX800L/MAX800M micro-
processor (µP) supervisory circuits are pin-compatible
upgrades to the MAX691, MAX693, and MAX695. They
improve performance with 30µA supply current, 200ms
typ reset active delay on power-up, and 6ns chip-
enable propagation delay. Features include write pro-
tection of CMOS RAM or EEPROM, separate watchdog
outputs, backup-battery switchover, and a RESETout-
put that is valid with VCCdown to 1V. The MAX691A/
MAX800L have a 4.65V typical reset-threshold voltage,
and the MAX693A/MAX800M’s reset threshold is 4.4V
typical. The MAX800L/MAX800M guarantee power-fail
accuracies to ±2%.
________________________ApplicationsComputers
Controllers
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
____________________________Features200ms Power-OK/Reset Timeout Period1µA Standby Current, 30µA Operating CurrentOn-Board Gating of Chip-Enable Signals,
10ns Max DelayMaxCap™or SuperCap™CompatibleGuaranteed RREESSEETT
Assertion to VCC= +1VVoltage Monitor for Power-Fail or Low-Battery
WarningPower-Fail Accuracy Guaranteed to ±2%
(MAX800L/M)Available in 16-Pin Narrow SO and Plastic
DIP Packages
______________Ordering Information
Ordering Information continued on last page.Dice are specified at TA= +25°C, DC parameters only.
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
__________________Pin Configuration
__________Typical Operating Circuit19-0094; Rev 7a; 12/96
SuperCap is a registered trademark of Baknor Industries. MaxCap is a registered trademark of The Carborundum Corp.
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(MAX691A, MAX800L: VCC= +4.75V to +5.5V, MAX693A, MAX800M: VCC= +4.5V to +5.5V, VBATT = 2.8V, TA= TMINto TMAX,
unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Terminal Voltage (with respect to GND)
VCC.......................................................................-0.3V to +6V
VBATT...................................................................-0.3V to +6V
All Other Inputs.....................................-0.3V to (VOUT+ 0.3V)
Input Current
VCCPeak...........................................................................1.0A
VCCContinuous.............................................................250mA
VBATT Peak..................................................................250mA
VBATT Continuous..........................................................25mA
GND, BATT ON.............................................................100mA
All Other Outputs............................................................25mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C)..........842mW
Narrow SO (derate 8.70mW/°C above +70°C)...........696mW
Wide SO (derate 9.52mW/°C above +70°C)...............762mW
CERDIP (derate 10.00mW/°C above +70°C)..............800mW
Operating Temperature Ranges
MAX69_AC_ _/MAX800_C_ _.............................0°C to +70°C
MAX69_AE_ _/MAX800_E_ _...........................-40°C to +85°C
MAX69_AMJE................................................-55°C to +125°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)(MAX691A, MAX800L: VCC= +4.75V to +5.5V, MAX693A, MAX800M: VCC= +4.5V to +5.5V, VBATT = 2.8V, TA= TMINto TMAX,
unless otherwise noted.)
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
Note 1:Either VCCor VBATT can go to 0V, if the other is greater than 2.0V.
Note 2:The supply current drawn by the MAX691A/MAX800L/MAX800M from the battery excluding IOUTtypically goes to 10µA
when (VBATT - 1V) < VCC< VBATT. In most applications, this is a brief period as VCCfalls through this region.
Note 3:“+” = battery-discharging current, “--” = battery-charging current.
Note 4:Although presented as typical values, the number of clock cycles for the reset and watchdog timeout periods are fixed and
do not vary with process or temperature.
Note 5:RESET is an open-drain output and sinks current only.
Note 6:WDI is internally connected to a voltage divider between VOUTand GND. If unconnected, WDI is driven to 1.6V (typ),
disabling the watchdog function.
Note 7:The chip-enable resistance is tested with VCC= +4.75V for the MAX691A/MAX800L and VCC= +4.5V for the
MAX693A/MAX800M. CEIN = CEOUT = VCC/ 2.
Note 8:The chip-enable propagation delay is measured from the 50% point at CEIN to the 50% point at CEOUT.
ELECTRICAL CHARACTERISTICS (continued)(MAX691A, MAX800L: VCC= +4.75V to +5.5V, MAX693A, MAX800M: VCC= +4.5V to +5.5V, VBATT = 2.8V, TA= TMINto TMAX,
unless otherwise noted.)
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
__________________________________________Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
____________________________Typical Operating Characteristics (continued)(TA = +25°C, unless otherwise noted.)
MAX691A/MAX693A/MAX800L/MAX800M
Microprocessor Supervisory Circuits
______________________________________________________________Pin Description
_______________Detailed DescriptionR—E—S—E—T–and RESET OutputsThe MAX691A/MAX693A/MAX800L/MAX800M’s RESET
and RESET outputs ensure that the µP (with reset
inputs asserted either high or low) powers up in a
known state, and prevents code-execution errors dur-
ing power-down or brownout conditions.
The RESEToutput is active low, and typically sinks
3.2mA at 0.1V saturation voltage in its active state.
When deasserted, –RESETsources 1.6mA at typicallyOUT- 0.5V. RESET output is open drain, active high,
and typically sinks 3.2mA with a saturation voltage ofoutput is
guaranteed to be valid down to VCC= 1V,and an
external 10kΩpull-down resistor on RESETinsures
that it will be valid with VCCdown to GND (Figure 1).
As VCCgoes below 1V, the gate drive to the RESET
output switch reduces accordingly, increasing theDS(ON)and the saturation voltage. The 10kΩpull-
down resistor insures the parallel combination of switch
plus resistor is around 10kΩand the output saturation
voltage is below 0.4V while sinking 40µA. When using
a 10kΩexternal pull-down resistor, the high state for
RESEToutput with VCC= 4.75V will be 4.5V typical.
For battery voltages ‡2V connected to VBATT, RESET
and RESETremain valid for VCCfrom 0V to 5.5V.
MAX691A/MAX693A/MAX800L/MAX800MRESET and RESETare asserted when VCCfalls below
the reset threshold (4.65V for the MAX691A/MAX800L,
4.4V for the MAX693A/MAX800M) and remain asserted
for 200ms typ after VCCrises above the reset threshold
on power-up (Figure 5). The devices’ battery-
switchover comparator does not affect reset assertion.
However, both reset outputs are asserted in battery-
backup mode since VCCmust be below the reset
threshold to enter this mode.
Watchdog FunctionThe watchdog monitors µP activity via the Watchdog
Input (WDI). If the µP becomes inactive, RESETand
RESET are asserted. To use the watchdog function,
connect WDI to a bus line or µP I/O line. If WDI
remains high or low for longer than the watchdog time-
out period (1.6sec nominal), WDO, RESET, and RESET
are asserted (see RESET and RESETOutputs section,
and the Watchdog Outputdiscussion on this page).
Watchdog InputA change of state (high to low, low to high, or a mini-
mum 100ns pulse) at the WDI during the watchdog
period resets the watchdog timer. The watchdog
default timeout is 1.6sec.
To disable the watchdog function, leave WDI floating.
An internal resistor network (100kΩequivalent imped-
ance at WDI) biases WDI to approximately 1.6V.
Internal comparators detect this level and disable the
watchdog timer. When VCCis below the reset thresh-
old, the watchdog function is disabled and WDI is dis-
connected from its internal resistor network, thus
becoming high impedance.
Watchdog OutputThe Watchdog Output (WDO) remains high if there is a
transition or pulse at WDI during the watchdog timeout
period. The watchdog function is disabled and –WDOis
a logic high when VCCis below the reset threshold, bat-
tery-backup mode is enabled, or WDI is an open circuit.
In watchdog mode, if no transition occurs at WDI during
the watchdog timeout period, RESET and RESETare
asserted for the reset timeout period (200ms typical).WDOgoes low and remains low until the next transition
at WDI (Figure 2). If WDI is held high or low indefinitely,
RESET and RESETwill generate 200ms pulses every
1.6sec. WDOhas a 2 x TTL output characteristic.
Selecting an Alternative
Watchdog and Reset Timeout PeriodThe OSC SEL and OSC IN inputs control the watchdog
and reset timeout periods. Floating OSC SEL and OSC
IN or tying them both to VOUTselects the nominal 1.6sec
watchdog timeout period and 200ms reset timeout peri-
od. Connecting OSC IN to GND and floating or connect-
ing OSC SEL to VOUTselects the 100ms normal
watchdog timeout delay and 1.6sec delay immediately
after reset. The reset timeout delay remains 200ms
(Figure 2). Select alternative timeout periods by con-
necting OSC SEL to GND and connecting a capacitor
between OSC IN and GND, or by externally driving OSC
IN (Table 1 and Figure 3). OSC IN is internally connect-
ed to a ±100nA (typ) current source that charges and
discharges the timing capacitor to create the oscillator
frequency, which sets the reset and watchdog timeout
periods (see Connecting a Timing Capacitor at OSC IN
in theApplications Informationsection).
Microprocessor Supervisory CircuitsFigure 1.Adding an external pull-down resistor ensures –R—E—S—E—T–is valid with VCCdown to GND.
Figure 2.Watchdog Timeout Period and Reset Active Time
