MAX7317AEE+-MAX7317AEE+T-MAX7317ATE+-MAX7317ATE+T Fast Delivery |IC PHOENIX CO.,LIMITED

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MAX7317AEE+-MAX7317AEE+T-MAX7317ATE+-MAX7317ATE+T
10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection
Pin Configurations continued at end of data sheet.
General Description
The MAX7317 serial-interfaced peripheral provides
microprocessors with 10 I/O ports rated to 7V. Each port
can be individually configured as either an open-drain
output, or an overvoltage-protected Schmitt input.
The MAX7317 supports hot insertion. All port pins remain
high impedance in power-down (V+ = 0V) with up to 8V
asserted on them.
The MAX7317 is available in 16-pin TQFN and QSOP
packages and operates in the -40°C to +125°C range.
For a similar part with constant-current outputs and
8-bit PWM controls, refer to the MAX6966/MAX6967 data
sheet.
Applications●Portable Equipment●Cellular Phones●White Goods●Industrial Controllers●System Monitoring
Beneits and Features●Industry-Standard 4-Wire Interface Simplifies I/O
Ports Expansion Independent of Microprocessor
ArchitectureHigh-Speed, 26MHz, SPI-/QSPI™-/MICROWIRE®-
Compatible Serial Interface 2.25V to 3.6V Operation●Protection Circuitry Ensures Robust OperationI/O Port Inputs Are Overvoltage Protected to 7VI/O Port Outputs Are 7V-Rated Open Drain I/O Ports Support Hot Insertion ●Low Power Consumption and Small Package Reduce
Board Size and Power-Supply Requirements0.7μA (typ), 1.9μA (max) Standby Current 3mm x 3mm, 0.8mm High TQFN Package
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
PARTTEMP RANGEPIN-
PACKAGE
TOP
MARK
MAX7317ATE+-40°C to +125°C
16 TQFN-EP*
3mm x 3mm x
0.8mm
ACH
MAX7317AEE+-40°C to +125°C16 QSOP—
TQFN
MAX7317ATE23411109V+
DIN
SCLKP1P2P3P8P7
GND
DOUT
TOP VIEW
DINP0
DOUT
SCLK
GND
MOSI
MISO
SCLKCS
I/O PORTS
MAX7317
+3.3V
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection
Pin Conigurations
Ordering Information
Typical Application Circuit
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Voltage (with respect to GND)
V+ ............................................................................-0.3V to +4V
SCLK, DIN, CS, DOUT................................-0.3V to (V+ + 0.3V)
P_ ...........................................................................-0.3V to +8V
DC Current into P_ ............................................................24mA
DC Current into DOUT .......................................................10mA
Total GND Current ............................................................200mA
Continuous Power Dissipation (TA = +70°C)16-Pin TQFN (derate 14.7mW/°C above +70°C) ......1176mW16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW
Operating Temperature Range
(TMIN to TMAX) .............................................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(Typical Operating Circuit, V+ = 2.25V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Operating Supply VoltageV+2.253.60V
Output Load External Supply
Voltage P0–P9VEXT7V
Standby Current
(Interface Idle)ISTBYAll digital inputs at V+
or GND
TA = +25°C0.701.5TA = TMIN to +85°C1.7
TA = TMIN to TMAX1.9
Supply CurrentI+
fSCLK = 26MHz; other
digital inputs at V+ or
GND; DOUT unloaded
TA = +25°C385620TA = TMIN to +85°C680
TA = TMIN to TMAX730
Input High Voltage
(P0–P9, DIN, SCLK, CS)VIHP0–P9 output register set to 0x010.7 x V+V
Input Low Voltage
(P0–P9, DIN, SCLK, CS)VILP0–P9 output register set to 0x010.3 x V+V
Input Leakage Current
(P0–P9, DIN, SCLK, CS)IIH, IIL-0.2+0.2µA
Input Capacitance
(P0–P9, DIN, SCLK, CS(Note 2)10pF
Output Low Voltage (P0–P9)VOLP_ISINK = 0.5mA, output register set to 0x000.4V
Output Low Short-Circuit Current
(P0–P9)VOLPOUT = 5V10.820mA
Output High Voltage (DOUT)VOHDOUTISOURCE = -6mAV+ - 0.3VV
Output Low Voltage (DOUT)VOLDOUTISINK = 6mA0.3V
Power-On Reset VoltageVPOR2V
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection
Electrical Characteristics
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
Note 1: All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
(Typical Operating Circuit, V+ = 2.25V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SCLK Clock PeriodtCP38.4ns
SCLK Pulse-Width HightCH19ns
SCLK Pulse-Width LowtCL19ns
CS Fall to SCLK Rise Setup TimetCSS9.5ns
SCLK Rise to CS Rise Hold TimetCSH2.5ns
DIN Setup TimetDS9.5ns
DIN Hold TimetDH2.5ns
Output Data Propagation DelaytDO19ns
DOUT Output Rise and Fall TimestFTCLOAD = 20pF (Note 2)10ns
Minimum CS Pulse HightCSW38.4ns
I/O REGISTER
4-WIRE SERIAL INTERFACE
SCLK
DIN
DOUT
I/O PORTS
MAX7317
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection
MAX7317 Block Diagram
Timing Characteristics
(TA = +25°C, unless otherwise noted.)
PINNAMEFUNCTIONQSOPTQFN15SCLKSerial-Clock Input. On SCLK’s rising edge, data shifts into the internal shift register. On
SCLK’s falling edge, data is clocked out of DOUT. SCLK is active only while CS is low.16CSChip-Select Input. Serial data is loaded into the shift register while CS is low. The most recent
16 bits of data latch on CS’s rising edge.
3–7, 9–131–5, 7–11P0–P9
I/O Ports. P0 to P9 can be configured as open-drain, current-sink outputs rated at 20mA
maximum, or as CMOS inputs, or as open-drain outputs. Loads should be connected to a
supply voltage no higher than 7V.6GNDGround12DOUTSerial-Data Output. The data into DIN is valid at DOUT 15.5 clock cycles later. Use this pin to
daisy-chain several devices or allow data readback. Output is push-pull.13DINSerial-Data Input. Data from DIN loads into the internal 16-bit shift register on SCLK’s rising
edge.14V+Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor.PADEPExposed Pad on Package Underside. Connect to GND.
SUPPLY CURRENT (I+)
vs. TEMPERATURE
MAX7317 toc03
TEMPERATURE (°C)
STANDBY CURRENT (mA)
V+ = 3.6VV+ = 3.3V
V+ = 2.7V
V+ = 2.25V
STANDBY CURRENT
vs. TEMPERATURE
MAX7317 toc02
TEMPERATURE (°C)
STANDBY CURRENT (V+ = 3.6V
V+ = 3.3V
V+ = 2.7V
V+ = 2.25V
PORT SINK CURRENT
vs. PORT VOLTAGE
MAX7317 toc01
PORT VOLTAGE (V)
PORT SINK CURRENT (mA)4268
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection
Pin Description
Typical Operating Characteristics
Detailed Description
The MAX7317 is a general-purpose input/output (GPIO)
peripheral that provides 10 I/O ports, P0 to P9, con-
trolled through a high-speed SPI-compatible serial
interface. The 10 I/O ports can be used as inputs or
open-drain outputs in any combination. Ports withstand
7V independent of the MAX7317’s supply voltage whether
used as inputs or outputs.
Figure 1 shows the I/O port structure of the MAX7317.
Register Structure
The MAX7317 contains 10 internal registers, addressed
as 0x00–0x09, which control the peripheral (Table 2).
Two further addresses, 0x0E and 0x0F, do not store
data but return the port input status when read. Four
virtual addresses, 0x0A–0x0D, allow more than one
register to be written with the same data to simplify
software. The RAM register provides 1 byte of memory
that can be used for any purpose. The no-op address,
0x20, causes no action when written or read, and is
used as a dummy register when accessing one
MAX7317 out of multiple cascaded devices.
Initial Power-Up
On power-up, all control registers are reset (Table
2). Power-up status sets I/O ports P0 to P9 high
impedance, and puts the device into shutdown mode.
RAM Register
The RAM register provides a byte of memory that can
be used for any purpose.
GPIO Port Direction Coniguration
The 10 I/O ports P0 through P9 can be configured to
any combination of inputs and outputs. Ports with-
stand 7V independent of the MAX7317’s supply voltage,
whether used as inputs or outputs. Configure a port as
an input by setting its output register to 0x01, which
sets the port output high impedance (Table 4).
Input Port Registers
Reading an input port register returns the logic levels at
the I/O port pins. The input port registers are read only.
A write to an input port register is ignored.
Output Registers
The MAX7317 uses one 8-bit register to control each
output port (Table 4). Each port can be configured as
an input or open-drain output. Write 0x00 to the output
register to set the port as a logic-low output, or 0x01 to
set the port as a logic-high output or logic input.
The 10 registers, 0x00 through 0x09, control an I/O port
each (Table 4). Four pseudo-register addresses, 0x0A
through 0x0D, allow groups of outputs to be set to the
same value with a single command by writing the same
data to multiple output registers.
Serial Interface
The MAX7317 communicates through an SPI-
compatible 4-wire serial interface. The interface has
three inputs: clock (SCLK), chip select (CS), and data in
(DIN), and one output, data out (DOUT). CS must be
low to clock data into or out of the device, and DIN
must be stable when sampled on the rising edge of
SCLK. DOUT is stable on the rising edge of SCLK.
SCLK and DIN can be used to transmit data to other
peripherals. The MAX7317 ignores all activity on SCLK
and DIN except when CS is low.
Note that the SPI protocol expects DOUT to be high
impedance when the MAX7317 is not being accessed;
DOUT on the MAX7317 is never high impedance. Go to www.maximintegrated.com/an1879 for ways to convert
the MAX7317 to tri-state, if required.
Control and Operation Using the 4-Wire Interface
Controlling the MAX7317 requires sending a 16-bit
word. The first byte, D15 through D8, is the command,
and the second byte, D7 through D0, is the data byte
(Table 5).
READ PULSE
INPUT
PORT REGISTERQ
INPUT PORT
REGISTER DATAQQ
DATA FROM
SHIFT REGISTER
WRITE PULSE
OUTPUT
PORT REGISTER
OUTPUT PORT
REGISTER DATA
I/O PIN
GND
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection
Table 2. Initial Power-Up Register Status
Table 1. Register Address Map
REGISTERPOWER-UP CONDITIONADDRESS
CODE (hex)
REGISTER DATAD6D5D4D3D2D1D0
Port P0 output levelPort 0 high impedance0x0011111111
Port P1 output levelPort 1 high impedance0x0111111111
Port P2 output levelPort 2 high impedance0x0211111111
Port P3 output levelPort 3 high impedance0x0311111111
Port P4 output levelPort 4 high impedance0x0411111111
Port P5 output levelPort 5 high impedance0x0511111111
Port P6 output levelPort 6 high impedance0x0611111111
Port P7 output levelPort 7 high impedance0x0711111111
Port P8 output levelPort 8 high impedance0x0811111111
Port P9 output levelPort 9 high impedance0x0911111111
REGISTER
COMMAND ADDRESSCODE (hex)D15D14D13D12D11D10D9D8
Port P0 output levelR/W00000000x00
Port P1 output levelR/W00000010x01
Port P2 output levelR/W00000100x02
Port P3 output levelR/W00000110x03
Port P4 output levelR/W00001000x04
Port P5 output levelR/W00001010x05
Port P6 output levelR/W00001100x06
Port P7 output levelR/W00001110x07
Port P8 output levelR/W00010000x08
Port P9 output levelR/W00010010x09
Write ports P0 through P9 with same output level000010100x0A
Read port P0 output level1
Write ports P0 through P3 with same output level000010110x0BRead port P0 output level1
Write ports P4 through P7 with same output level000011000x0CRead port P4 output level1
Write ports P8 or P9 with same output level000011010x0DRead port P8 output level1
Read ports P7 through P0 inputs100011100x0E
Read ports P9 and P8 inputs100011110x0F
RAMR/W00100110x13
No-opR/W01000000x20
Factory reserved; do not write to this registerR/W11111010x7D
MAX731710-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection

Partno	Mfg	Dc	Qty	Available	Descript
MAX7317AEE+	MAXIM	N/a	100	avai	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection
MAX7317AEE+ \|MAX7317AEE	MAX	N/a	920	avai	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection
MAX7317AEE+T	MAXIM	N/a	13542	avai	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection
MAX7317ATE+	MAXIM	N/a	300	avai	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection
MAX7317ATE+T	MAXIM	N/a	550	avai	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection