MAX697CWE+T ,Microprocessor Supervisory CircuitsFeatures● Adjustable Low-Line Monitor and Power-Down ResetThe MAX696/MAX697 supervisory circuits re ..
MAX697EWE ,Microprocessor Supervisory CircuitsELECTRICAL CHARACTERISTICS
(Vcc = full operating range, VBATT = 2.8V, TA 2 25°C, unless otherwis ..
MAX697EWE ,Microprocessor Supervisory CircuitsFeatures
. Adjustable Low Line monitor and Power Down
Reset
. Power OK/Reset Time Delay
. ..
MAX697EWE+ ,Microprocessor Supervisory CircuitsElectrical Characteristics(V = full operating range, V = 2.8V, T = +25°C, unless otherwise noted.)C ..
MAX698 ,Low-Cost Power On Reset ICElectrical Characteristics(V = +5V, T = +25°C, unless otherwise noted.)CC APARAMETER CONDITIONS MIN ..
MAX698CPA ,Low Cost Power-On Reset and Watchdog ControllersELECTRICAL CHARACTERISTICS
(TA = 25°C, Vcc = +5V, unless otherwise noted.)
those indicated in ..
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB40166 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MAX696CWE+-MAX697CWE+-MAX697CWE+T-MAX697EWE+
Microprocessor Supervisory Circuits
General DescriptionThe MAX696/MAX697 supervisory circuits reduce the
complexity and number of components required for
power-supply monitoring and battery-control functions in microprocessor (μP) systems. These include μP reset
and backup-battery switchover, watchdog timer, CMOS RAM write protection, and power-failure warning. The
MAX696/MAX697 significantly improve system reliability
and accuracy compared to that obtained with separate ICs or discrete components.
The MAX696 and MAX697 are supplied in 16-pin pack-
ages and perform six functions:
1) A reset output during power-up, power-down, and brownout conditions. The threshold for this “lowline” reset is adjustable by an external voltagedivider.
2) A reset pulse if the optional watchdog timer has not been toggled within a specified time.
3) Individual outputs for low-line and watchdog fault con-ditions.
4) The reset time may be left at its default value of 50ms,
or may be varied with an external capacitor or clock pulses.
5) A separate 1.3V threshold detector for power-fail warn-
ing, low-battery detection, or to monitor a power supply other than VCC.
The MAX696 also has battery-backup switching for CMOS RAM, CMOS microprocessor, or other lowpower logic.
The MAX697 lacks battery-backup switching, but has
write-protection pins (CE IN and CE OUT) for CMOS RAM or EPROM. In addition, it consumes less than 250 microamperes.
Applications●Computers●Controllers●Intelligent Instruments●Critical μP Power Monitoring
Features●Adjustable Low-Line Monitor and Power-Down Reset●Power-OK/Reset Time Delay●Watchdog Timer—100ms, 1.6s, or Adjustable●Minimum Component Count●1μA Standby Current●Battery-Backup Power Switching (MAX696)●On-Board Gating of Chip-Enable Signals (MAX697)●Separate Monitor for Power-Fail or Low-Battery
Warning
Typical Operating Circuit appears at end of data sheet.
Pin Configurations continued at end of data sheet.
Ordering Information continued at end of data sheet.Devices in PDIP and SO packages are available in both leaded
and lead(Pb)-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
PARTTEMP RANGEPIN-PACKAGE
MAX696C/D0°C to +70°CDice
MAX696CPE0°C to +70°C16 PDIP
MAX696CWE0°C to +70°C16 Wide SO
MAX696EPE-40°C to +85°C16 PDIP
MAX696EJE-40°C to +85°C16 CERDIP
MAX696EWE-40°C to +85°C16 Wide SO
MAX696MJE-55°C to +125°C16 CERDIP
VOUT
VBATT
VCC
GNDLLIN
N.C.BATT ON
PFI
WDI
OSC IN
OSC SEL
PFO
LOW LINE
TOP VIEW
RESET
RESET
WDO
MAX696
MAX696/MAX697Microprocessor Supervisory Circuits
Ordering Information
Pin Conigurations
Terminal Voltage (with respect to GND) VCC.......................................................................-0.3V to +6V VBATT...................................................................-0.3V to +6V All Other Inputs (Note 1).....................-0.3V to (VOUT + 0.5V)
Input Current VCC................................................................................200mA VBATT..............................................................................50mA GND.................................................................................20mA
Output Current VOUT....................................................Short-Circuit Protected All Other Outputs.............................................................20mA
Rate-of-Rise, VBATT, VCC...............................................100V/μs
Operating Temperature Range C Suffix................................................................0°C to +70°C E Suffix.............................................................-40°C to +85°C M Suffix..........................................................-55°C to +125°CPower Dissipation (TA = +70°C) 16-Pin PDIP (derated 7mW/°C above +70°C)..............600mW 16-Pin SO (derated 7mW/°C above +70°C).................600mW 16-Pin CERDIP (derated 10mW/°C above +85°C)......600mWStorage Temperature Range..............................-65°C to +160°CLead Temperature (soldering, 10s)..................................+300°C
(VCC = full operating range, VBATT = 2.8V, TA = +25°C, unless otherwise noted.)
Note 1: The input voltage limits on PFI and WDI may be exceeded providing the input current is limited to less than 10mA.
PARAMETERCONDITIONSMINTYPMAXUNITSOperating Voltage RangeTA = full
MAX696 VCC3.05.5MAX696 VBATT2.0VCC - 0.3V
MAX697 VCC3.05.5
Supply Current (MAX697)TA = full160300µA
BATTERY-BACKUP SWITCHING (MAX696)VOUT Output Voltage
IOUT = 1mA, TA = fullVCC - 0.3VCC - 0.1V
IOUT = 50mA, TA = fullVCC - 0.5VCC - 0.25
VOUT in Battery-Backup ModeIOUT = 250µA, VCC < (VBATT - 0.2V), TA = fullVBATT - 0.1VBATT - 0.02V
Supply Current (Excludes IOUT)IOUT = 1mA1.54mAIOUT = 50mA2.57
Supply Current in Battery-Backup
Mode
VCC = 0V, VBATT = 2.8V, TA = +25°C0.61µAVCC = 0V, VBATT = 2.8V, TA = full10
Battery Standby Leakage Current5.5V > VCC > (VBATT + 0.3V)
TA = +25°C-100+20nA
TA = full-1.00+0.02µA
Battery Switchover Threshold VCC - VBATT
Power-up70mVPower-down50
Battery Switchover Hysteresis20mV
BATT ON Output VoltageISINK - 1.6mA0.4V
BATT ON Output Short-Circuit
Current
BATT ON = VOUT = 2.4V sink current7mA
BATT ON = VOUT, VCC = 0V0.52.525.0µA
RESET AND WATCHDOG TIMERLow-Line Voltage Threshold (LLIN)VCC = +5V, +3V; TA = full1.251.301.35V
Reset Timeout DelayFigure 6, OSC SEL HIGH, VCC = 5V355070ms
MAX696/MAX697Microprocessor Supervisory Circuits
Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC = full operating range, VBATT = 2.8V, TA = +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITSWatchdog Timeout Period,
External Clock
Long period40324097Clock
cyclesShort period9601025
Minimum WDI Input Pulse WidthVIL = 0.4V, VIH = 3.5V, VCC = 5V200ns
RESET and RESET Output Voltage (Note 2)
ISINK = 400µA, VCC = 2V, VBATT = 0V0.4ISINK = 1.6mA, 3V < VCC < 5.5V0.4
ISOURCE = 1µA, VCC = 5V3.5
LOW LINE and WDO Output Voltage
ISINK = 800µA, TA = full0.4V
ISOURCE = 1µA, VCC = 5V, TA = full3.5
Output Short-Circuit CurrentRESET, RESET, WDO, LOW LINE1325µA
WDI Input ThresholdVCC = 5V(Note 3)
Logic-low0.8Logic-high (MAX696)3.5
Logic-high (MAX697)3.8
WDI Input CurrentVWDI = VOUT2050µAVWDI = 0V-50-15
POWER-FAIL DETECTORPFI Input ThresholdVCC = 3V, 5V1.21.31.4V
PFI - LLIN Threshold DifferenceVCC = 3V, 5V±15±50mV
PFI Input Current±0.01±25nA
LLIN Input CurrentMAX697-25±0.01+25nAMAX696-500±0.01+25
PFO Output VoltageISINK = 1.6mA0.4VISOURCE = 1µA, VCC = 5V3.5
PFO Short-Circuit Source CurrentVPFI = 0V, VPFO = 0V1325µA
CHIP-ENABLE GATING (MAX697)CE IN ThresholdsVIL0.8VVIH, VCC = 5V3.0
CE IN Pullup Current3µA
CE OUT Output Voltage
ISINK = 1.6mA0.4ISOURCE = 800µAVCC - 0.5V
ISOURCE = 1µA, VCC = 0VVCC - 0.05V
CE Propagation DelayVCC = 5V80150ns
OSCILLATOROSC IN Input Current±2µA
OSC SEL Input Pullup Current5µA
OSC IN Frequency RangeVOSC SEL = 0V0250kHz
OSC IN Frequency with External
CapacitorVOSC SEL = 0V, COSC = 47pF4kHz
MAX696/MAX697Microprocessor Supervisory Circuits
Electrical Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX696SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
MODE43
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY CURRENT (µA)
BATTERY MODE
MAX697SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)43
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
RESET TIMEOUT DELAY
(ms)
RESET TIMEOUT DELAY AS A
FUNCTION OF SUPPLY VOLTAGE
VCC MODE
TA = +25°C
TA = +25°C
BATTERY MODE
TA = 25°C
MAX696/MAX697Microprocessor Supervisory Circuits
Typical Operating Characteristics
PINNAMEFUNCTIONMAX696MAX697—VBATTBackup-Battery Input. Connect to ground if a backup battery is not used.—VOUTThe higher of VCC or VBATT is internally switched to VOUT. Connect VOUT to VCC if VOUT and VBATT are not used.3VCC+5V Input5GND0V Ground Reference for All Signals—BATT ON
BATT ON goes High when VOUT is Internally Switched to the VBATT Input. It goes low when VOUT is internally switched to VCC. The output typically sinks 7mA and
can directly drive the base of an external pnp transistor to increase the output current above the 50mA rating of VOUT.6LOW LINELOW LINE goes Low when LLIN Falls Below 1.3V. It returns high as soon as LLIN rises above 1.3V. See Figure 5.7OSC IN
OSC IN Sets the Reset Delay Timing and Watchdog Timeout Period when OSC SEL Floats or is Driven Low. The timing can also be adjusted by connecting an external capacitor to this pin. See Figure 7. When OSC SEL is high, OSC IN selects between
fast and slow watchdog timeout periods8OSC SEL
When OSC SEL is Unconnected or Driven High, the Internal Oscillator Sets the Reset Time Delay and Watchdog Timeout Period. When OSC SEL is low, the external oscillator input, OSC IN, is enabled. OSC SEL has a 3µA internal pullup. See Table 1.9PFIPFI is the Noninverting Input to the Power-Fail Comparator. When PFI is less than 1.3V, PFO goes low. Connect PFI to GND or VOUT when not used. See Figure 1.10PFOPFO is the Output of the Power-Fail Comparator. It goes low when PFI is less than 1.3V. The comparator is turned off and PFO goes low when VCC is below VBATT. 11WDI
The Watchdog Input, WDI, is a Three-Level Input. If WDI remains either high or low
for longer than the watchdog timeout period, RESET pulses low and WDO goes low. The watchdog timer is disabled when WDI is left loating or is driven to mid-supply. The timer resets with each transition at the watchdog timer input.2N.C.No Connection. Leave this pin open.4LLINLow-Line Input. LLIN is the CMOS input to a comparator whose other input is a precision 1.3V reference. The output is LOW LINE and is also connected to the reset pulse generator. See Figure 2.14WDO
The Watchdog Output, WDO, goes Low if WDI Remains either High or Low for Longer than the Watchdog Timeout Period. WDO is set high by the next transition at WDI. If WDI is unconnected or at mid-supply, WDO remains high. WDO also goes
high when LOW LINE goes low.15RESET
RESET goes Low whenever LLIN Falls Below 1.3V or VCC Falls Below the VBATT Input Voltage. RESET remains low for 50ms after LLIN goes above 1.3V. RESET also goes low for 50ms if the watchdog timer is enabled but not serviced within its timeout period. The RESET pulse width can be adjusted as shown in Table 1. 16RESETRESET is an Active-High Output. It is the inverse of RESET.
MAX696/MAX697Microprocessor Supervisory Circuits
Pin Description
Typical Applications
MAX696A typical connection for the MAX696 is shown in Figure 1. CMOS RAM is powered from VOUT. VOUT is internally connected to VCC when power is present, or to VBATT when VCC is less than the battery voltage. VOUT can supply 50mA from VCC, but if more current is required, an external pnp transistor can be added. When
low, providing 7mA of base drive for the external transis-tor. When VCC is lower than VBATT, an internal 200Ω MOSFET connects the backup battery to VOUT. The qui-escent current in the battery-backup mode is 1μA maxi-mum when VCC is between 0V and (VBATT - 700mV).
Reset OutputA voltage detector monitors VCC and generates a RESET
output to hold the microprocessor’s RESET line low when
Figure 1. MAX696 Typical Application
PINNAMEFUNCTIONMAX696MAX6971TESTUsed During Maxim Manufacture Only. Always ground this pin.12CE OUTCE OUT goes low only when CE IN is low and LLIN is above 1.3V. See Figure 5.13CE INThe Input to the CE Gating Circuit. Connect to GND or VOUT if not used.
0.1µF0.1µF5
VOUT
VBATTCC
RESETRESET
LOW LINE
RESETLLIN
PFO
WDO
BATT ON
CMOS
RAM
A0–A15
MICROPROCESSOR
I/O
NMI
WDI
OTHER SYSTEM RESET SOURCES
SYSTEM STATUS INDICATORS
AUDIBLE
ALARM6
+5V
VCC
INPUT
PFI
GND
OSC IN
OSC SEL
NO CONNECTION
RESET
BATTERY
MAX696MAX696/MAX697Microprocessor Supervisory Circuits
Pin Description (continued)
low for 50ms after LLIN rises above 1.3V. This prevents
repeated toggling of RESET even if the VCC power drops out and recovers with each power line cycle.
The crystal oscillator normally used to generate the clock for microprocessors takes several milliseconds to start.
Since most microprocessors need several clock cycles to
reset, RESET must be held low until the microprocessor clock oscillator has started. The power-up RESET pulse lasts 50ms to allow for this oscillator startup time. An
inverted, active-high RESET output is also supplied.
Power-Fail DetectorThe MAX696 issues a nonmaskable interrupt (NMI) to the microprocessor when a power failure occurs. The power
line is monitored by two external resistors connected to the power-fail input (PFI). When the voltage at PFI falls below 1.3V, the power-fail output (PFO) drives the processor’s NMI input low. An earlier power-fail warning can be gener-ated if the unregulated DC input of the regulator is available for monitoring.
Watchdog TimerThe microprocessor drives the watchdog input (WDI) with an I/O line. When OSC IN and OSC SEL are uncon-nected, the microprocessor must toggle the WDI pin once every 1.6 seconds to verify proper software execution. If a hardware or software failure occurs so that WDI is not toggled, the MAX696 will issue a 50ms RESET pulse after 1.6 seconds. This typically restarts the microprocessor’s power-up routine. A new RESET pulse is issued every 1.6 seconds until WDI is again strobed.
The watchdog output (WDO) goes low if the watchdog timer is not serviced within its timeout period. Once WDO goes low, it remains low until a transition occurs at WDI
while RESET is high. The watchdog timer feature can be disabled by leaving WDI unconnected. OSC IN and OSC
SEL also allow other watchdog timing options, as shown in Table 1 and Figure 7.
BATT ON (MAX696)
VOUT (MAX696)
VBATT (MAX696)
VCC
CHIP-ENABLE
OUTPUT (MAX697)
LOW LINE
RESET
RESET
WATCHDOG OUTPUT
POWER-FAIL OUTPUT
WATCHDOG
TIMER
GROUND4
1.30V
POWER-FAIL
INPUT
WATCHDOG TRANSITION
DETECTOR
TIMEBASE FOR RESET
AND
WATCHDOG
RESET GENERATOR
WATCHDOG INPUT
LLIN
OSC IN
OSC SEL
(MAX697)
CHIP-ENABLE INPUT5
MAX696/MAX697Microprocessor Supervisory Circuits
MAX697The MAX697 is nearly identical to the MAX696. The MAX697
lacks the battery-backup feature, so it does not have the VBATT, VOUT, or BATT ON pins. This allows the MAX697 to consume less than 250 microamperes, and it allows the inclusion of RAM write-protection pins. See Figure 2.
Detailed Description
Battery Switchover and VOUT (MAX696)Battery Switchover and VOUT (MAX696) The battery-switchover circuit compares VCC to the VBATT input, and connects VOUT to whichever is higher. Switchover occurs when VCC is 50mV greater than VBATT as VCC falls, and when VCC is 70mV more than VBATT as VCC rises (see Figure 3). The switchover comparator has 20mV of hys-teresis to prevent repeated, rapid switching if VCC falls very slowly or remains nearly equal to the battery voltage.
When VCC is higher than VBATT, VCC is internally switched to VOUT with a low-saturation pnp transistor. VOUT has 50mA output current capability. Use an external
pnp pass transistor in parallel with the internal transistor
if the output current requirement at VOUT exceeds 50mA or if a lower VCC - VOUT voltage differential is desired.
The BATT ON output can directly drive the base of the external transistor.
It should be noted that the MAX696 need only supply
the average current drawn by the CMOS RAM if there is adequate filtering. Many RAM data sheets specify a 75mA
maximum supply current, but this peak current spike lasts only 100ns. A 0.1μF bypass capacitor at VOUT supplies the high instantaneous current, while VOUT need only supply the average load current, which is much less. A capacitance of 0.1μF or greater must be connected to the VOUT terminal to ensure stability.200Ω MOSFET connects the VBATT input to VOUT during battery backup. This MOSFET has very low input-to-output differential (dropout voltage) at the low current
levels required for battery backup of CMOS RAM or other low-power CMOS circuitry. When VCC equals VBATT, the supply current is typically 12μA. When VCC is between 0V and (VBATT - 700mV), the typical supply current is only 600nA (typ), 1μA (max).
700mV
100mV
BATTERY
INPUT
BASE DRIVE
VCC
0.1µF
TO CMOS
RAM AND
REAL-TIME
CLOCK
VCC IN
BATT ON
p-CHANNEL
MOSFET
INTERNAL
SHUTDOWN
SIGNAL WHEN
VBATT > VCC + 0.7V
LOW IQ MODE SELECT
VOUT
VCC
+5V
VBATT
MAX696/MAX697Microprocessor Supervisory Circuits
