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MAX6965AEE+-MAX6965ATE+-MAX6965ATE+T
9-Output LED Driver with Intensity Control and Hot-Insertion Protection
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
General DescriptionThe MAX6965 I2C-compatible serial interfaced periph-
eral provides microprocessors with nine additional out-
put ports. Each output is an open-drain current-sinking
output rated to 50mA at 7V. All outputs are capable of
driving LEDs, or providing logic outputs with external
resistive pullup up to 7V.
Eight-bit PWM current control is also integrated. Four of
the bits are global control and apply to all LED outputs
to provide coarse adjustment of current from fully off to
fully on with 14 intensity steps. Additionally each output
then has an individual 4-bit control, which further
divides the globally set current into 16 more steps.
Alternatively, the current control can be configured as a
single 8-bit control that sets all outputs at once.
Each output has independent blink timing with two blink
phases. LEDs can be individually set to be either on or off
during either blink phase, or to ignore the blink control.
The blink period is controlled by an external clock (up to
1kHz) on BLINK or by a register. The BLINK input can also
be used as a logic control to turn the LEDs on and off, or
as a general-purpose input (GPI).
The MAX6965 supports hot insertion. The SDA, SCL,
RST, BLINK, and the slave address input AD0 remain
high impedance in power-down (V+ = 0V) with up to 6V
asserted upon them. The output ports remain high
impedance with up to 8V asserted upon them.
The MAX6965 is controlled through a 2-wire I2C serial
interface, and can be configured to one of four I2C
addresses.
ApplicationsLCD Backlights
LED Status Indication
Keypad Backlights
RGB LED Drivers
Features400kbps, 2-Wire Serial Interface, 5.5V Tolerant2V to 3.6V OperationOverall 8-Bit PWM LED Intensity Control
Global 16-Step Intensity Control
Plus Individual 16-Step Intensity ControlsTwo-Phase LED BlinkingHigh Port Output Current—Each Port 50mA (max)RST
Input Clears Serial Interface and Restores
Power-Up Default StateSupports Hot InsertionOutputs are 7V-Rated Open DrainLow Standby Current (1.2μA (typ), 3.3μA (max))Tiny 3mm x 3mm, Thin QFN Package-40°C to +125°C Temperature RangeMAX6965
3.3V
SDA
SCL
SDA
I/O
I/O
AD0
SCL
RELAY
RELAY
GND
0.047µF
RST
BLINK
RELAY
Typical Application Circuit19-3058; Rev 3; 3/05
EVALUATION KIT
AVAILABLE
Ordering Information
PARTTEMP
RANGE
PIN-
PACKAGE
TOP
MARK
PKG
CODEMAX6965ATE-40°C to
+125°C
16 Thin QFN
3mm x 3mm
x 0.8mm
AAWT1633-4
MAX6965AEE-40°C to16 QSOP——
Pin Configurations appear at end of data sheet.P.,
li-
I2Cs.
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
V+.............................................................................-0.3V to +4V
SCL, SDA, AD0, BLINK, RST...................................-0.3V to +6V
O0–O8......................................................................-0.3V to +8V
DC Current on O0 to O8.....................................................55mA
DC Current on SDA.............................................................10mA
Maximum GND Current....................................................190mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C over +70°C)..............666mW
16-Pin QFN (derate 14.7mW/°C over +70°C)............1176mW
Operating Temperature Range (TMINto TMAX)...-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Supply VoltageV+2.03.6V
Output Load External Supply
VoltageVEXT07V
TA = +25°C1.22.3
TA = -40°C to +85°C2.6Standby Current
(Interface Idle, PWM Disabled)I+C L and S D A at V + ; other i g i tal i np uts at V + or GN D ;WM i ntensi ty contr ol d i sab l ed TA = TMIN to TMAX3.3
TA = +25°C712.1
TA = -40°C to +85°C13.3Supply Current
(Interface Idle, PWM Enabled)I+C L and S D A at V + ; other i g i tal i np uts at V + or GN D ;WM i ntensi ty contr ol enab l ed TA = TMIN to TMAX14.4
TA = +25°C4076
TA = -40°C to +85°C78
Supply Current
(Interface Running, PWM
Disabled)
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control disabledTA = TMIN to TMAX80
TA = +25°C51110
TA = -40°C to +85°C117
Supply Current
(Interface Running, PWM
Enabled)
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control enabledTA = TMIN to TMAX122
Input High Voltage
SDA, SCL, AD0, BLINK, RSTVIH0.7 xV
Input Low Voltage
SDA, SCL, AD0, BLINK, RSTVIL0.3 xV
Input Leakage Current
SDA, SCL, AD0, BLINK, RSTIIH, IILInput = GND or V+-0.2+0.2µA
Input Capacitance
SDA, SCL, AD0, BLINK, RST8pF
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
ELECTRICAL CHARACTERISTICS (continued)(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA= + 25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSTA = +25°C0.150.25
TA = -40°C to +85°C0.29V+ = 2V, ISINK = 20mA
TA = TMIN to TMAX0.31
TA = +25°C0.130.22
TA = -40°C to +85°C0.25V+ = 2.5V, ISINK = 20mA
TA = TMIN to TMAX0.27
TA = +25°C0.120.22
TA = -40°C to +85°C0.23
Output Low Voltage
O0–O8VOL
V+ = 3.3V, ISINK = 20mA
TA = TMIN to TMAX0.25
Output Low-Voltage SDAVOLSDAISINK = 6mA0.4V
PWM Clock FrequencyfPWM32kHz
TIMING CHARACTERISTICS(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSerial Clock FrequencyfSCL400kHz
Bus Free Time Between a STOP and a START
ConditiontBUF1.3µs
Hold Time, Repeated START ConditiontHD, STA0.6µs
Repeated START Condition Setup TimetSU, STA0.6µs
STOP Condition Setup TimetSU, STO0.6µs
Data Hold TimetHD, DAT(Note 2)0.9µs
Data Setup TimetSU, DAT180ns
SCL Clock Low PeriodtLOW1.3µs
SCL Clock High PeriodtHIGH0.7µs
Rise Time of Both SDA and SCL Signals, ReceivingtR(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of Both SDA and SCL Signals, ReceivingtF(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of SDA TransmittingtF.TX(Notes 3, 5)20 +
0.1Cb250ns
Pulse Width of Spike SuppressedtSP(Note 6)50ns
Capacitive Load for Each Bus LineCb(Note 3)400pF
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
PORT OUTPUT LOW VOLTAGE WITH 50mA
LOAD CURRENT vs. TEMPERATUREPORT OUTPUT LOW VOLTAGE V
(V)
MAX6965 toc04
TEMPERATURE (°C)
V+ = 3.6V
V+ = 2.7V
V+ = 2V
PORT OUTPUT LOW VOLTAGE WITH 20mA
LOAD CURRENT vs. TEMPERATUREMAX6965 toc05
TEMPERATURE (°C)
PORT OUTPUT LOW VOLTAGE V
(V)
ALL OUTPUTS LOADED
V+ = 3.6VV+ = 2.7V
V+ = 2V
PWM CLOCK FREQUENCY
vs. TEMPERATUREMAX6965 toc06
TEMPERATURE (°C)
PWM CLOCK FREQUENCY
V+ = 3.6V
V+ = 2VV+ = 2.7V
NORMALIZED TO V+ = 3.3V, TA = +25°C
STANDBY CURRENT vs. TEMPERATUREMAX6965 toc01
TEMPERATURE (°C)
STANDBY CURRENT (
V+ = 3.6V
PWM ENABLED
V+ = 2.7V
PWM ENABLED
V+ = 2V
PWM DISABLED
V+ = 2.7V
PWM DISABLED
V+ = 3.6V
PWM
DISABLED
V+ = 2V
PWM ENABLED
SUPPLY CURRENT vs. TEMPERATURE
(PWM DISABLED; fSCL = 400kHz)MAX6965 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (
V+ = 3.6V
V+ = 2.7V
V+ = 2V
SUPPLY CURRENT vs. TEMPERATURE
(PWM ENABLED; fSCL = 400kHz)MAX6965 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (
V+ = 3.6V
V+ = 2.7V
V+ = 2V
__________________________________________Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
TIMING CHARACTERISTICS (continued)(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSRST Pulse WidthtW1µs
Output Data ValidtDVFigure 105µs
Note 1:All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2:A master device must provide a hold time of at least 300ns for the SDA signal (referred to VILof the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 3:Guaranteed by design.
Note 4:Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.
Note 5:ISINK≤6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.
Note 6:Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
SCOPE SHOT OF TWO OUTPUT PORTS MAX6965 toc07
2ms/div
OUTPUT 1
2V/div
OUTPUT 2
2V/div
MASTER INTENSITY SET TO 1/15
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 15/16
SCOPE SHOT OF TWO OUTPUT PORTSMAX6965 toc08
2ms/div
OUTPUT 1
2V/div
OUTPUT 2
2V/div
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
MASTER INTENSITY SET TO 14/15
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 14/15
SINK CURRENT vs. VOLMAX6965 toc09
SINK CURRENT (mA)
(V)403530252015105
V+ = 3.3V
V+ = 3.6V
V+ = 2V
V+ = 2.7V
ONLY ONE OUTPUT LOADED
Typical Operating Characteristics (continued)(TA = +25°C, unless otherwise noted.)
PIN
QSOPQFNNAMEFUNCTION15BLINKInput Port. Configurable as blink control or general-purpose input.
216RSTReset Input. Active low clears the 2-wire interface and puts the device in same
condition as power-up reset.1AD0Address Input. Sets device slave address. Connect to either GND, V+, SCL, or
SDA to give 4 logic combinations. See Table 1.
4–7, 9–132–5, 7–11O0–O8Output Ports. O0–O8 are open-drain outputs rated at 7V, 50mA.6GNDGround. Do not sink more than 190mA into the GND pin.12SCLI2C-Compatible Serial Clock Input13SDAI2C-Compatible Serial Data I/O14V+Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitorPADExposed PadExposed pad on packaged underside. Connect to GND.
Pin Description
MAX6965
Functional OverviewThe MAX6965 is a general-purpose output (GPO)
peripheral that provides nine output ports, O0–O8, con-
trolled through an I2C-compatible serial interface. All out-
puts sink loads up to 50mA connected to external
supplies up to 7V, independent of the MAX6965’s supply
voltage. The MAX6965 is rated for a ground current of
190mA, allowing all nine outputs to sink 20mA at the
same time. Figure 1 shows the output structure of the
MAX6965. The outputs default to logic high (high imped-
ance unless external pullup resistors are used) on
power-up.
Output Control and LED BlinkingThe blink phase 0 register sets the output logic levels of
the 8 outputs O0–O7 (Table 6). This register controls
the port outputs if the blink function is disabled. A dupli-
cate register, the Blink Phase 1 register, is also used if
the blink function is enabled (Table 7). In blink mode,
the outputs can be flipped between using the blink
phase 0 register, and the blink phase 1 register using
hardware control (the BLINK input) and/or software
control (the blink flip flag in the configuration register)
(Table 4).
The 9th output, O8, is controlled through 2 bits in the
Configuration register, which provide the same static or
blink control as the other eight outputs (Table 4).
The logic level of the BLINK input may be read back
through the blink status bit in the configuration register
(Table 4). The BLINK input, therefore, may be used as
a general-purpose logic input (GPI port) if the blink
function is not required.
PWM Intensity ControlThe MAX6965 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con-
trol. PWM intensity control can be enabled on an out-
put-by-output basis, allowing the MAX6965 to provide
any mix of PWM LED drives and glitch-free logic out-
puts (Table 8). PWM can be disabled entirely, in which
case all outputs are static and the MAX6965 operating
current is lowest because the internal oscillator is
turned off.
PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 11 and 12).
The 4-bit master control provides 16 levels of overall
intensity control, which applies to all PWM-enabled out-
puts. The master control sets the maximum pulse width
from 1/15 to 15/15 of the PWM time period. The individ-
ual settings comprise a 4-bit number, further reducing
the duty cycle to be from 1/16 to 15/16 of the time win-
dow set by the master control.
For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the con-
trol software and provide 240 steps of intensity control
(Tables 8 and 11).
9-Output LED Driver with Intensity Control
and Hot-Insertion ProtectionFigure 1. Simplified Schematic of I/O Ports
DATA FROM
SHIFT REGISTER
WRITE PULSE
OUTPUT
PORT
REGISTER
I/O PIN
GND
OUTPUT PORT
REGISTER DATA
Figure 2. 2-Wire Serial Interface Timing Details
SCL
SDA tF
tBUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION START CONDITION
tSU,STO
tHD,STAtSU,STA
tHD,DAT
tSU,DAT tLOW
tHIGH
tHD,STA
User RAMThe MAX6965 includes a register byte, which is avail-
able as general-user RAM (Table 2). This byte is reset
to the value 0xFF on power-up and when the RSTinput
is taken low (Table 3).
Standby ModeWhen the serial interface is idle and the PWM intensity
control is unused, the MAX6965 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX6965, like all I2C slaves, has to monitor every
transmission.
Serial Interface
Serial AddressingThe MAX6965 operates as a slave that sends and
receives data through an I2C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX6965 and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6965 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX6965 SCL line operates
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6965
7-bit slave address plus R/Wbit, a register address
byte, one or more data bytes, and finally a STOP condi-
tion (Figure 3).
Start and Stop ConditionsBoth SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit TransferOne data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
AcknowledgeThe acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion ProtectionFigure 3. Start and Stop Conditions
SDA
SCL
START
CONDITION
STOP
CONDITION
Figure 4. Bit Transfer
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 5. Acknowledge
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGESTART
CONDITION
SDA BY
RECEIVER89
Figure 6. Slave Address
SDA
SCL
MSBLSB
ACK00A600A2R/W
MAX6965during the high period of the clock pulse. When the
master is transmitting to the MAX6965, the device gen-
erates the acknowledge bit because the MAX6965 is
the recipient. When the MAX6965 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave AddressThe MAX6965 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/Wbit. The R/Wbit is low for a write command, high
for a read command.
The second (A5), third (A4), fourth (A3), sixth (A1), and
last (A0) bits of the MAX6965 slave address are always
1, 0, 0, 0, and 0. Slave address bits A6 and A2 are
selected by the address input AD0. AD0 can be con-
nected to GND, V+, SDA, or SCL. The MAX6965 has
four possible slave addresses (Table 1), and therefore
a maximum of four MAX6965 devices can be controlled
independently from the same interface.
Message Format for Writing the MAX6965A write to the MAX6965 comprises the transmission of
the MAX6965’s slave address with the R/Wbit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX6965 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX6965 takes no further action
beyond storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6965 selected by the command byte (Figure 8).
If multiple data bytes are transmitted before a STOP con-
dition is detected, these bytes are generally stored in
subsequent MAX6965 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 register or blink phase 1 register) is given in
Figure 10.
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
Table 1. MAX6965 I2C Slave Address Map
DEVICE ADDRESSPIN AD0A6A5A4A3A2A1A0SCL1100000
SDA1100100
GND01000000100100
Table 2. Register Address Map
REGISTERADDRESS CODE
(hex)
AUTOINCREMENT
ADDRESSBlink phase 0 outputs0x010x01 (no change)
User RAM0x030x03 (no change)
Blink phase 1 outputs0x090x09 (no change)
Master, O8 intensity0x0E0x0E (no change)
Configuration0x0F0x0F (no change)
Outputs intensity O1, O00x100x11
Outputs intensity O3, O20x110x12
Outputs intensity O5, O40x120x13
Outputs intensity O7, O60x130x10
Message Format for ReadingThe MAX6965 is read using the MAX6965’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur-
ing the MAX6965’s command byte by performing a
write (Figure 7). The master can now read n consecu-
tive bytes from the MAX6965 with the first data byte
being read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2).
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion ProtectionFigure 8. Command and Single Data Byte ReceivedAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
BYTE
AUTOINCREMENT MEMORY ADDRESS
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX6965ACKNOWLEDGE FROM MAX6965
ACKNOWLEDGE FROM MAX6965
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX6965's REGISTERS
R/W
Figure 9. n Data Bytes ReceivedAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
BYTES
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX6965ACKNOWLEDGE FROM MAX6965
ACKNOWLEDGE FROM MAX6965
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX6965's REGISTERS
R/W
AUTOINCREMENT MEMORY ADDRESS
Figure 7. Command Byte ReceivedAP0SLAVE ADDRESSCOMMAND BYTE
ACKNOWLEDGE FROM MAX6965
D15D14D13D12D11D10D9D8COMMAND BYTE IS STORED ON RECEIPT OF
STOP CONDITION
ACKNOWLEDGE FROM MAX6965R/W
Figure 10. Write Timing Diagram
SLAVE ADDRESS23456789A6A5A4A3A2A1A00A0000000
COMMAND BYTEAAP
START CONDITIONACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM SLAVESTOP
CONDITION
O7–O0DATA1 VALIDDATA2 VALIDtDVtDV
SCL
SDA
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)R/W
MSBLSBDATA1MSBLSBDATA2
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
Operation with Multiple MastersIf the MAX6965is operated on a 2-wire interface with
multiple masters, a master reading the MAX6965should
use a repeated start between the write, which sets the
MAX6965’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX6965’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX6965’s address pointer, then master
1’s delayed read can be from an unexpected location.
Command Address AutoincrementingThe command address stored in the MAX6965 circu-
lates around grouped register functions after each data
byte is written or read (Table 2).
Device ResetThe reset input RSTis an active-low input. When taken
low, RSTclears any transaction to or from the MAX6965
on the serial interface and configures the internal regis-
ters to the same state as a power-up reset (Table 3).
The MAX6965 then waits for a START condition on the
serial interface.
Detailed Description
Initial Power-UpOn power-up, and whenever the RSTinput is pulled
low, all control registers are reset and the MAX6965
enters standby mode (Table 3). Power-up status makes
all outputs logic high (high impedance if external pullup
resistors are not fitted) and disables both the PWM
oscillator and blink functionality. The RSTinput can be
used as a hardware shutdown input, which effectively
turns off any LED (or other) loads and puts the device
into its lowest power condition.
Configuration RegisterThe configuration register is used to configure the PWM
intensity mode and blink behavior, operate the O8 out-
put, and read back the BLINK input logic level (Table 4).
Blink ModeIn blink mode, the outputs can be flipped between
using either the blink phase 0 register or the blink
phase 1 register. Flip control is both hardware (the
BLINK input) and software control (the blink flip flag B
in the configuration register) (Table 4).
The blink function can be used for LED effects by pro-
gramming different display patterns in the two sets of
output port registers, and using the software or hard-
ware controls to flip between the patterns.
If the blink phase 1 register is written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro-
grammed into the blink phase 0 register. This tech-
nique can be further extended by driving the BLINK
input with a PWM signal to modulate the LED current to
provide fading effects.
The blink mode is enabled by setting the blink enable
flag E in the configuration register (Table 4). When blink
mode is enabled, the state of the blink flip flag and
BLINK input are EXOR’ed to set the phase, and the out-
puts are set by either the blink phase 0 registers or the
blink phase 1 registers (Figure 11, Table 5).
The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the state of the blink flip flag is
ignored, and the blink phase 0 registers alone control
the outputs.
The logic status of BLINK is made available as the read-
only blink status flag blink in the configuration register
(Table 4). This flag allows BLINK to be used as an extra
general-purpose input (GPI) in applications not using the
blink function. When BLINK is going to be used as a GPI,
blink mode should be disabled by clearing the blink
enable flag E in the configuration register (Table 4).
Blink Phase RegisterWhen the blink function is disabled, the blink phase
0 register sets the logic levels of the eight outputs
(O0 through O7) (Table 6). A duplicate register called
the blink phase 1 register is also used if the blink func-
tion is enabled (Table 7). A logic high sets the appro-
priate output high impedance, while a logic low makes
the port go low.
Reading a blink phase register reads the value stored
in the register, not the actual port condition. The port
output itself may or may not be at a valid logic level,
depending on the external load connected.
The 9th output, O8, is controlled through 2 bits in the
configuration register, which provide the same static or
blink control as the other eight output ports.
MAX6965
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
Table 3. Power-Up Configuration
REGISTER DATAREGISTER FUNCTIONPOWER-UP CONDITION
ADDRESS
CODE
(HEX)D7D6D5D4D3D2D1D0Blink phase 0 outputsHigh-impedance outputs0x0111111111
User RAM0xFF0x0311111111
Blink phase 1 outputsHigh-impedance outputs0x0911111111
Master, O8 intensityPWM oscillator is disabled;
O8 is static logic output0x0E00001111
Configuration
O8 is high-impedance output;
blink is disabled;
global intensity is enabled
0x0F00110100
Outputs intensity O1, O0O1, O0 are static logic outputs0x1011111111
Outputs Intensity O3, O2O3, O2 are static logic outputs0x1111111111
Outputs intensity O5, O4O5, O4 are static logic outputs0x1211111111
Outputs intensity O7, O6O7, O6 are static logic outputs0x1311111111
Table 4. Configuration Register
REGISTER DATAREGISTER
ADDRESS
CODE
(HEX)D7D6D5D4D3D2D1D0
CONFIGURATION
R/W
BLINK
STATUSOUTPUT
GLOBAL
INTENSITY
BLINK FLIP
BLINK
ENABLEWrite device configuration0XX
Read-back device configuration10
BLINKO1O00
GBEDisable blink—XXXXXXX
0Enable blink—XXXXXXX
1XXXXXX
01Flip blink register (see text)—XXXXXX
11Disable global intensity control—intensity is
set by registers 0x10–0x13 for ports O0
through O7 when configured as outputs,
and by D3–D0 of register 0x0E for output O8XXXXX
0XX
Enable global intensity control—intensity
for all ports configured as outputs is set by
D3–D0 of register 0x0E
0x0F
XXXXX
1XX
X = Don’t care.
