MAX6954AAX+ ,4-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanFeatures®The MAX6954 is a compact display driver that inter- ● High-Speed 26MHz SPI/QSPI/MICROWIRE ..
MAX6955AAX ,2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanFeatures2The MAX6955 is a compact display driver that interfaces 400kbps 2-Wire Interface Compatib ..
MAX6955AAX+ ,2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanFeaturesThe MAX6955 is a compact display driver that interfaces• Simplifies Driving 5 x 7 Matrix LE ..
MAX6955AAX+ ,2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanApplicationsFunctional DiagramSet-Top Boxes Bar Graph DisplaysPanel Meters Audio/Video EquipmentGPI ..
MAX6955AAX+T ,2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanElectrical Characteristics(Typical Operating Circuit, V+ = 2.7V to 5.5V, T = T to T , unless otherw ..
MAX6956AAI+ ,2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port LED Display Driver and I/O ExpanderApplicationsTOP VIEWSet-Top Boxes Bar Graph DisplaysISET 1 28 V+Panel Meters Industrial Controllers ..
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB40166 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MAX6954AAX+
4-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan
●Set-Top Boxes●Panel Meters●White Goods●Bar Graph Displays●Audio/Video Equipment
General DescriptionThe MAX6954 is a compact display driver that inter-
faces microprocessors to a mix of 7-segment, 14-seg-
ment, and 16-segment LED displays through an SPI-/
QSPI™-compatible 4-wire serial interface. The serial
interface may be cascaded through multiple devices.
The MAX6954 drives up to 16 digits 7-segment, 8 dig-
its 14-segment, 8 digits 16-segment, or 128 discrete
LEDs, while functioning from a supply voltage as low as
2.7V. The driver includes five I/O expander (or GPIO)
lines, some or all of which may be configured as
a key-switch reader, which automatically scans and
debounces a matrix of up to 32 switches.
Included on chip are full 14- and 16-segment ASCII
104-character fonts, a hexadecimal font for 7-segment
displays, multiplex scan circuitry, anode and cathode driv-
ers, and static RAM that stores each digit. The maximum
segment current for the display digits is set using a single
external resistor. Digit intensity can be independently
adjusted using the 16-step internal digital brightness con-
trol. The MAX6954 includes a low-power shutdown mode,
a scan-limit register that allows the user to display from 1
to 16 digits, segment blinking (synchronized across mul-
tiple drivers, if desired), and a test mode, which forces all
LEDs on. The LED drivers are slew-rate limited to reduce
EMI.
For a 2-wire interfaced version, refer to the MAX6955
data sheet. An evaluation kit (EV kit) for the MAX6955 is
available.
Applications
Features●High-Speed 26MHz SPI/QSPI/MICROWIRE®-
Compatible Serial Interface ●2.7V to 5.5V Operation●Drives Up to 16 Digits 7-Segment, 8 Digits
14-Segment, 8 Digits 16-Segment, 128 Discrete
LEDs, or a Combination of Digit Types●Drives Common-Cathode Monocolor and Bicolor LED
Displays●Built-In ASCII 104-Character Font for 14-Segment
and 16-Segment Digits and Hexadecimal Font for
7-Segment Digits●Automatic Blinking Control for each Segment●10µA (typ) Low-Power Shutdown (Data Retained)●16-Step Digit-by-Digit Digital Brightness Control ●Display Blanked on Power-Up●Slew-Rate Limited Segment Drivers for Lower EMI●Five GPIO Port Pins Can Be Configured as Key-
Switch Reader to Scan and Debounce Up to 32
Switches with n-Key Rollover●IRQ Output when a Key Input Is Debounced●36-Pin SSOP and 40-Pin DIP and TQFN Packages●Automotive Temperature Range Standard
+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad.
PARTTEMP RANGEPIN-PACKAGEMAX6954AAX-40°C to +125°C36 SSOP
MAX6954APL-40°C to +125°C40 PDIP
MAX6954ATL+-40°C to +125°C40 TQFN-EP*
ISET
OSC
OSC_OUT
BLINK
CLK
DIN
DOUT
4-WIRE SERIAL INTERFACE
RAM
BLINK
CONTROL
CONFIGURATION
REGISTER
CHARACTER
GENERATOR
ROM
CURRENT
SOURCE
DIVIDER/
COUNTER
NETWORK
DIGIT
MULTIPLEXER
PWM
BRIGHTNESS
CONTROL
GPIO
AND KEY-SCAN
CONTROL
LED
DRIVERS
O0 TO O23
P0 TO P4
MAX6954
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Pin Configurations and Typical Operating Circuits appear
at end of data sheet.
Functional DiagramQSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
Ordering Information
(Voltage with respect to GND.)
V+ ........................................................................-0.3V to +6VAll Other Pins...........................................-0.3V to (V+ + 0.3V)
CurrentO0–O7 Sink Current .....................................................935mAO0–O18 Source Current.................................................55mADIN, CLK, CS, OSC, DOUT, BLINK, OSC_OUT, ISET ..20mAP0, P1, P2, P3, P4 .........................................................40mA
GND .....................................................................................1A
Continuous Power Dissipation (TA = +70°C)36-Pin SSOP (derate at 11.8mW/°C above +70°C) ....941mW40-Pin PDIP (derate at 16.7mW/°C above +70°C) ...1333mW40-Pin TQFN (derate at 37mW/°C above +70°C) .....2963mW
Operating Temperature Range
(TMIN to TMAX) .............................................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(Typical Operating Circuits, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Supply VoltageV+2.75.5V
Shutdown Supply CurrentISHDN
Shutdown mode, all
digital inputs at V+
or GND
TA = +25°C1035µA
TA = TMIN to TMAX40
Operating Supply CurrentI+
All segments on, all
digits scanned,
intensity set to full,
internal oscillator,
DOUT open circuit,
no display or
OSC_OUT load
connected
TA = +25°C2230mA
TA = TMIN to TMAX35
Master Clock FrequencyfOSC
OSC = RC oscillator, RSET = 56kW,
CSET = 22pF, V+ = 3.3V4MHz
OSC driven externally18
Dead Clock Protection FrequencyfOSC95kHz
OSC Internal/External Detection
ThresholdVOSC1.7V
OSC High TimetCH50ns
OSC Low TimetCL50ns
Slow Segment Blink PeriodfSLOWBLINKOSC = RC oscillator, RSET = 56kW,
CSET = 22pF, V+ = 3.3V1s
Fast Segment Blink PeriodfFASTBLINKOSC = RC oscillator, RSET = 56kW,
CSET = 22pF, V+ = 3.3V0.5s
Fast or Slow Segment Blink Duty
Cycle49.550.5%
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
DC Electrical CharacteristicsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
(Typical Operating Circuits, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSegment Drive Source CurrentISEGVLED = 2.2V,
V+ = 3.3VTA = +25°C-34.5-40-46.5mA
Segment Current Slew Rate DISEG/DtTA = +25°C, V+ = 3.3V11mA/µs
Segment Drive Current Matching DISEGTA = +25°C, V+ = 3.3V510%
LOGIC INPUTS AND OUTPUTSInput Leakage Current
DIN, CLK, CS, OSC, P0, P1, P2,
P3, P4
IIH, IIL-1+1µA
4-Wire Logic-High Input Voltage
DIN, CLK, CSVIHSPI1.8V
4-Wire Logic-Low Input Voltage
DIN, CLK, CSVILSPI0.6V
Port Logic-High Input Voltage
P0, P1, P2, P3, P4VIHP0.7 xV
Port Logic-Low Input Voltage
P0, P1, P2, P3, P4VILP0.3 xV
Port Hysteresis Voltage P0, P1,
P2, P3, P4 DVIP0.03 xV
Port Input Pullup Current from V+IIPUP0 to P3 configured as keyscan input,
V+ = 3.3V75µA
Port Output Low VoltageVOLPISINK = 8mA0.30.5V
Blink Output Low VoltageVOLBKISINK = 0.6mA0.10.3V
DOUT Output High VoltageVOHDOISOURCE = 1.6mAV+ -
0.2V
DOUT Output Low VoltageVOLDOISINK = 1.6mA0.2V
OSC_OUT Output High VoltageVOHOSCISOURCE = 1.6mAV+ -
0.4V
OSC_OUT Output Low VoltageVOLOSCISINK = 1.6mA0.4V
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
DC Electrical Characteristics (continued)
(V+ = 3.3V, LED forward voltage = 2.4V, typical application circuit, TA = +25°C, unless otherwise noted.)
Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design.
(Typical Operating Circuits, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCLK Clock PeriodtCP38.4ns
CLK Pulse Width HightCH16ns
CLK Pulse Width LowtCL16ns
CS Fall to CLK Rise Setup TimetCSS9.5ns
CLK Rise to CS Rise Hold TimetCSH0ns
DIN Setup TimetDS9.5ns
DIN Hold TimetDH0ns
Output Data Propagation DelaytDOV+ = 3.0V to 5.5V19nsV+ = 2.7V25
DOUT Output Rise and Fall TimestFTCLOAD = 10pF, V+ = 3.0V to 5.5V10ns
Minimum CS Pulse HightCSW19.5ns
100ns/div
OSC: 500mV/div
OSC_OUT: 2V/div
MAX6954 toc03
OSC
OSC_OUT
INTERNAL OSCILLATOR WAVEFORM
AT OSC AND OSC_OUT PINSRSET = 56kΩ
CSET = 22pF
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGEMAX6954 toc02
SUPPLY VOLTAGE (V)
OSCILLATOR FREQUENCY (MHz)
RSET = 56kΩ
CSET = 22pF
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
MAX6954 toc01
TEMPERATURE (°C)
OSCILLATOR FREQUENCY (MHz)
RSET = 56kΩ
CSET = 22pF
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Typical Operating Characteristics
Timing Characteristics
(V+ = 3.3V, LED forward voltage = 2.4V, typical application circuit, TA = +25°C, unless otherwise noted.)
PORT INPUT PULLUP CURRENT
vs. TEMPERATUREMAX6954 toc08
KEY-SCAN SOURCE CURRENT (mA)
VCC = 3.3V
VCC = 2.5V
VCC = 5.5V
OUTPUT = HIGH
VPORT = 1.4V
GPIO SINK CURRENT
vs. TEMPERATUREMAX6954 toc07
TEMPERATURE (°C)
GPIO SINK CURRENT (mA)
VCC = 3.3V
VCC = 2.5V
VCC = 5.5V
OUTPUT = LOW
VPORT = 0.6V
400µs/div
KEY_A: 1V/div
MAX6954 toc09
KEY_A
IRQ
KEYSCAN OPERATION
(KEY_A AND IRQ)1V/div
200µs/div
MAX6954 toc06
O18
WAVEFORM AT PINS O0 AND O18,
MAXIMUM INTENSITY
SEGMENT SOURCE CURRENT
vs. SUPPLY VOLTAGEMAX6954 toc05
SUPPLY VOLTAGE (V)
CURRENT NORMALIZED TO 40mA
VLED = 1.8V
DEAD CLOCK OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX6954 toc04
SUPPLY VOLTAGE (V)
OSCILLATOR FREQUENCY (kHz)
RSET = 56kΩ
OSC = GND
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Typical Operating Characteristics (continued)
Detailed DescriptionThe MAX6954 is a serially interfaced display driver that
can drive up to 16 digits 7-segment, 8 digits 14-segment,
8 digits 16-segment, 128 discrete LEDs, or a combination
of these display types. Table 1 shows the drive capability
of the MAX6954 for monocolor and bicolor displays.
The MAX6954 includes 104-character ASCII font maps
for 14-segment and 16-segment displays, as well as
the hexadecimal font map for 7-segment displays. The
characters follow the standard ASCII font, with the addi-
tion of the following common symbols: £, €, ¥, °, µ, ±, ↑, and ↓. Seven bits represent the 104-character font
map; an 8th bit is used to select whether the decimal
trolled directly or use the hexadecimal font. Direct seg-
ment control allows the MAX6954 to be used to drive
bar graphs and discrete LED indicators.
Tables 2, 3, and 4 list the connection schemes for 16-,
14-, and 7-segment digits, respectively. The letters in
Tables 2, 3, and 4 correspond to the segment labels
shown in Figure 1. (For applications that require mixed
display types, see Tables 37–40.)
Serial InterfaceThe MAX6954 communicates through an SPI-compati-
ble 4-wire serial interface. The interface has three
inputs: clock (CLK), chip select (CS), and data in (DIN),
PIN
NAMEFUNCTIONSSOPPDIPTQFN-EP1, 2,
34, 35,
1, 2,
38, 39, 40
36, 37,
33, 34, 35P0–P4
General-Purpose I/O Ports (GPIOs). GPIO can be configured as logic inputs or
open-drain outputs. Enabling key scanning configures some or all ports P0–P3 as
key-switch matrix inputs with internal pullup and port P4 as IRQ output.338CSChip-Select Input. Serial data is loaded into the shift register while CS is low. The
most recent 16 bits of data latch on CS’s rising edge.439DOUTSerial-Data Output. The data into DIN is valid at DOUT 15.5 clock cycles later. Use
this pin to daisy-chain several devices or allow data readback. Output is push-pull.540CLKSerial-Clock Input. On CLK’s rising edge, data shifts into the internal shift register. On
CLK’s falling edge, data is clocked out of DOUT. CLK is active only while CS is low.61DINSerial-Data Input. Data from DIN loads into the internal 16-bit shift register on
CLK’s rising edge.
7–15,
7–15,
2–10,
21–30O0–O18
Digit/Segment Drivers. When acting as digit drivers, outputs O0 to O7 sink current
from the display common cathodes. When acting as segment drivers, O0 to O18
source current to the display anodes. O0 to O18 are high impedance when not
being used as digit or segment drivers.
16, 1817, 18, 2012, 13, 15GNDGround1914ISETSegment Current Setting. Connect ISET to GND through series resistor RSET to set
the peak current.
19, 2121, 23, 2416, 18, 19V+Positive Supply Voltage. Bypass V+ to GND with a 47µF bulk capacitor and a 0.1µF
ceramic capacitor.2217OSCMultiplex Clock Input. To use internal oscillator, connect capacitor CSET from OSC
to GND. To use external clock, drive OSC with a 1MHz to 8MHz CMOS clock.3631BLINKBlink Clock Output. Output is open drain.3732OSC_OUTClock Output. OSC_OUT is a buffered clock output to allow easy blink
synchronization of multiple MAX6954s. Output is push-pull.16, 2511, 20N.C.Not Connected Internally——EPExposed Pad (TQFN package only). Internally connected to GND. Connect to a
large ground plane to maximize thermal performance.
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Pin Description
clock data into or out of the device, and DIN must be
stable when sampled on the rising edge of CLK. DOUT is
stable on the rising edge of CLK. Note that while the SPI
protocol expects DOUT to be high impedance when the
MAX6954 is not being accessed, DOUT on the MAX6954
is never high impedance.
CLK and DIN may be used to transmit data to other
peripherals. The MAX6954 ignores all activity on CLK and
DIN except when CS is low.
Control and Operation Using
the 4-Wire InterfaceControlling the MAX6954 requires sending a 16-bit
word. The first byte, D15 through D8, is the command,
and the second byte, D7 through D0, is the data byte
(Table 5).
Connecting Multiple MAX6954s
to the 4-Wire BusMultiple MAX6954s may be daisy-chained by connect-
ing the DOUT of one device to the DIN of the next, and
driving CLK and CS lines in parallel (Figure 2). Data at
DIN propagates through the internal shift registers and
appears at DOUT 15.5 clock cycles later, clocked out
on the falling edge of CLK. When sending commands
to daisy-chained MAX6954s, all devices are accessed
at the same time. An access requires (16 x n) clock
cycles, where n is the number of MAX6954s connected
user can send the no-op command (0x00) to the others.
Figure 3 is the MAX6954 timing diagram.
The MAX6954 is written to using the following sequence:
1) Take CLK low.
2) Take CS low. This enables the internal 16-bit shift
register.
3) Clock 16 bits of data into DIN, D15 irst to D0 last,
observing the setup and hold times. Bit D15 is low,
indicating a write command.
4) Take CS high (while CLK is still high after clocking in
the last data bit).
5) Take CLK low.
6) Figure 4 shows a write operation when 16 bits are
transmitted.
If fewer or greater than 16 bits are clocked into the
MAX6954 between taking CS low and taking CS high
again, the MAX6954 stores the last 16 bits received,
including the previous transmission(s). The general case
is when n bits (where n > 16) are transmitted to the
MAX6954. The last bits are comprising bits {n-15} to {n},
are retained, and are parallel loaded into the 16-bit latch
as bits D15 to D0, respectively (Figure 5).
Table 1. MAX6954 Drive CapabilityFigure 1. Segment Labeling for 7-Segment Display, 14-Segment Display, and 16-Segment Display
DISPLAY TYPE
7 SEGMENT
(16-CHARACTER
HEXADECIMAL FONT)
14 SEGMENT/
16 SEGMENT
(104-CHARACTER ASCII FONT MAP)
DISCRETE LEDs
(DIRECT CONTROL)Monocolor168128
Bicolor8464
1dp2dpbcg2jk
dp dp1b1c2b2cbcg2jk
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Reading Device RegistersAny register data within the MAX6954 may be read by
sending a logic-high to bit D15. The sequence is:
2) Take CS low. This enables the internal 16-bit shift
register.
3) Clock 16 bits of data into DIN, D15 irst to D0 last.
D15 is high, indicating a read command and bits
Table 5. Serial-Data Format (16 Bits)*Each cathode driver output (CC0-CC7) connects to two digit common cathode pins.
Table 4. Connection Scheme for Sixteen 7-Segment Digits
Table 3. Connection Scheme for Eight 14-Segment Digits
Table 2. Connection Scheme for Eight 16-Segment Digits
D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0R/WADDRESSMSBDATALSB
DIGIT*O0O1O2O3O4O5O6O7O8O9O10O11O12O13O14O15O16O17O180, 0aCC0—1a—1b1c1d1dp1e1f1g2a2b2c2d2e2f2g2dp
1, 1a—CC11a—1b1c1d1dp1e1f1g2a2b2c2d2e2f2g2dp
2, 2a1a—CC2—1b1c1d1dp1e1f1g2a2b2c2d2e2f2g2dp
3, 3a1a——CC31b1c1d1dp1e1f1g2a2b2c2d2e2f2g2dp
4, 4a1a—1b1cCC4—1d1dp1e1f1g2a2b2c2d2e2f2g2dp
5, 5a1a—1b1c—CC51d1dp1e1f1g2a2b2c2d2e2f2g2dp
6, 6a1a—1b1c1d1dpCC6—1e1f1g2a2b2c2d2e2f2g2dp
7, 7a1a—1b1c1d1dp—CC71e1f1g2a2b2c2d2e2f2g2dp
DIGITO0O1O2O3O4O5O6O7O8O9O10O11O12O13O14O15O16O17O18CCO—a—bcd—efg1g2hijklmdp—CC1a—bcd—efg1g2hijklmdpa—CC2—bcd—efg1g2hijklmdpa——CC3bcd—efg1g2hijklmdpa—bcCC4—d—efg1g2hijklmdpa—bc—CC5d—efg1g2hijklmdpa—bcd—CC6—efg1g2hijklmdpa—bcd——CC7efg1g2hijklmdp
DIGITO0O1O2O3O4O5O6O7O8O9O10O11O12O13O14O15O16O17O18CCO—a1a2bcd1d2efg1g2hijklmdp—CC1a1a2bcd1d2efg1g2hijklmdpa1a2CC2—bcd1d2efg1g2hijklmdpa1a2—CC3bcd1d2efg1g2hijklmdpa1a2bcCC4—d1d2efg1g2hijklmdpa1a2bc—CC5d1d2efg1g2hijklmdpa1a2bcd1d2CC6—efg1g2hijklmdpa1a2bcd1d2—CC7efg1g2hijklmdp
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
to read. Bits D7 to D0 contain dummy data, which is
discarded.
4) Take CS high (while CLK is still high after clocking
in the last data bit), positions D7 through D0 in the
shift register are now loaded with the register data
addressed by bits D15 through D8.
5) Take CLK low.
6) Issue another read or write command (which can
be a no-op), and examine the bit stream at DOUT;
the second 8 bits are the contents of the register
addressed by bits D14 through D8 in step 3.
Digit Type RegistersThe MAX6954 uses 32 digit registers to store the char-
acters that the user wishes to display. These digit regis-
ters are implemented with two planes, P0 and P1. Each
digit is represented by 2 bytes of memory, 1 byte in
plane P0 and the other in plane P1. The digit registers
are mapped so that a digit’s data can be updated in
plane P0, plane P1, or both planes at the same time
(Table 6).
If the blink function is disabled through the Blink Enable
Bit E (Table 19) in the configuration register, then the
digit register data in plane P0 is used to multiplex the
display. The digit register data in P1 is not used. If the
blink function is enabled, then the digit register data in
both plane P0 and plane P1 are alternately used to mul-
tiplex the display. Blinking is achieved by multiplexing
the LED display using data plane P0 and plane P1 on
alternate phases of the blink clock (Table 20).
The data in the digit registers does not control the digit
segments directly for 14- and 16-segment displays.
Instead, the register data is used to address a charac-
ter generator that stores the data for the 14- and 16-
segment fonts (Tables 7 and 8). The lower 7 bits of the
digit data (D6 to D0) select the character from the font.
Figure 3. Timing Diagram
Figure 2. MAX6954 Daisy-Chain Connection
tCSStCLtCHtCP
tCSH
tCSW
tDS
tDH
D15
CLK
DIN
D14D1D0
D15
tDO
DOUT
MAX6954
DOUT
MICROCONTROLLER
CLK
DIN
MAX6954MAX6954CLK
DIN
DOUT
CLK
DIN
DOUT
CLK
DIN
DOUT
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
The most significant bit of the register data (D7) con-
trols the DP segment of the digits; it is set to 1 to light , and to zero to leave DP unlit (Table 9).
For 7-segment displays, the digit plane data register
can be used to address a character generator, which
contains the data of a 16-character font containing the
hexadecimal font. The decode mode register can be
used to disable the character generator and allow the
segments to be controlled directly. Table 10 shows the
one-to-one pairing of each data bit to the appropriate
segment line in the digit plane data registers. The hexa-
decimal font is decoded according to Table 11.
The digit-type register configures the display driver for
various combinations of 14-segment digits, 16-segment
digits, and/or pairs, or 7-segment digits. The function of
this register is to select the appropriate font for each
digit and route the output of the font to the appropriate
MAX6954 driver output pins. The MAX6954 has four
digit drive slots. A slot can be filled with various combi-
nations of monocolor and bicolor 16-segment displays,
14-segment displays, or two 7-segment displays. Each
pair of bits in the register corresponds to one of the four
digit drive slots, as shown in Table 12. Each bit also cor-
responds to one of the eight common-cathode digit
drive outputs, CC0 to CC7. When using bicolor digits,
the anode connections for the two digits within a slot
are always the same. This means that a slot correctly
drives two monocolor or one bicolor 14- or 16-segment
digit. The digit type register can be written, but cannot be
read. Examples of configuration settings required for
some display digit combinations are shown in Table 13.
7-Segment Decode-Mode RegisterIn 7-segment mode, the hexadecimal font can be dis-
abled (Table 14). The decode-mode register selects
between hexadecimal code or direct control for each
of eight possible pairs of 7-segment digits. Each bit in
the register corresponds to one pair of digits. The digit
pairs are {digit 0, digit 0a} through {digit 7, digit 7a}.
Disabling decode mode allows direct control of the 16
LEDs of a dual 7-segment display. Direct control mode
can also be used to drive a matrix of 128 discrete
LEDs.
Figure 5. Transmission of More than 16 Bits to the MAX6954
Figure 4. Transmission of 16 Bits to the MAX6954
CLK
DINBIT
BIT
N-9N-8N-7N-6N-5N-4N-3N-2
DOUTN-15
N-15N-14N-13N-12N-11N-10N-1
N-31N-30N-29N-28N-27N-26N-25N-24N-23N-22N-21N-20N-19N-18N-17N-16
CLK
DIND15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0
DOUTD15 = 0
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
logic-high selects hexadecimal decoding, while a logic-low bypasses the decoder. When direct control is
selected, the data bits D7 to D0 correspond to the seg-
ment lines of the MAX6954. Write x0010000 to blank all
segments in hexadecimal decode mode.
Display Blink ModeThe display blinking facility, when enabled, makes the
driver flip automatically between displaying the digit reg-
ister data in planes P0 and P1. If the digit register data
for any digit is different in the two planes, then that digit
appears to flip between two characters. To make a char-
acter appear to blink on or off, write the character to one
plane, and use the blank character (0x20) for the other
plane. Once blinking has been configured, it continues
automatically without further intervention.
Blink SpeedThe blink speed is determined by the frequency of the
multiplex clock, OSC, and by the setting of the Blink Rate
Selection Bit B (Table 18) in the configuration register.
The Blink Rate Selection Bit B sets either fast or slow
blink speed for the whole display.
Initial Power-UpOn initial power-up, all control registers are reset, the
display is blanked, intensities are set to minimum, and
shutdown is enabled (Table 15).
Coniguration RegisterThe configuration register is used to enter and exit shut-
down, select the blink rate, globally enable and disable
the blink function, globally clear the digit data, select
between global or digit-by-digit control of intensity, and
reset the blink timing (Tables 16–19 and 21–24).
The configuration register contains 7 bits: ●S bit selects shutdown or normal operation (read/write).●B bit selects the blink rate (read/write).●E bit globally enables or disables the blink function
(read/write).●T bit resets the blink timing (data is not stored—tran-
sient bit).●R bit globally clears the digit data for both planes P0
and P1 for ALL digits (data is not stored—transient
bit).●I bit selects between global or digit-by-digit control
of intensity (read/write).●P bit returns the current phase of the blink timing
Character Generator Font MappingThe font is composed of 104 characters in ROM. The
lower 7 bits of the 8-bit digit register represent the char-
acter selection. The most significant bit, shown as x in the
ROM map of Tables 7 and 8, is 1 to light the DP segment
and zero to leave the DP segment unlit.
The character map follows the standard ASCII font for
96 characters in the x0101000 through x1111111
range. The first 16 characters of the 16-segment ROM
map cover 7-segment displays. These 16 characters
are numeric 0 to 9 and characters A to F (i.e., the hexa-
decimal set).
Multiplex Clock and Blink TimingThe OSC pin can be fitted with capacitor CSET to GND
to use the internal RC multiplex oscillator, or driven by an
external clock to set the multiplex clock frequency and
blink rate. The multiplex clock frequency determines the
frequency that the complete display is updated. With OSC
at 4MHz, each display digit is enabled for 200µs.
The internal RC oscillator uses an external resistor, RSET,
and an external capacitor, CSET, to set the oscillator fre-
quency. The suggested values of RSET (56kW) and CSET
(22pF) set the oscillator at 4MHz, which makes the blink
frequency 0.5Hz or 1Hz.
The external clock is not required to have a 50:50 duty
cycle, but the minimum time between transitions must
be 50ns or greater and the maximum time between
transitions must be 750ns.
The on-chip oscillator may be accurate enough for appli-
cations using a single device. If an exact blink rate is
required, use an external clock ranging between 1MHz
and 8MHz to drive OSC. The OSC inputs of multiple
MAX6954s can be tied together to a common external
clock to make the devices blink at the same rate. The
relative blink phasing of multiple MAX6954s can be syn-
chronized by setting the T bit in the control register for all
the devices in quick succession. If the serial interfaces of
multiple MAX6954s are daisy-chained by connecting the
DOUT of one device to the DIN of the next, then synchro-
nization is achieved automatically by updating the config-
uration register for all devices simultaneously. Figure 6 is
the multiplex timing diagram.
OSC_OUT OutputThe OSC_OUT output is a buffered copy of either the
internal oscillator clock or the clock driven into the OSC
pin if the external clock has been selected. The feature
is useful if the internal oscillator is used, and the user
wishes to synchronize other MAX6954s to the same
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Scan-Limit RegisterThe scan-limit register sets how many 14-segment digits
or 16-segment digits or pairs of 7-segment digits are
displayed, from 1 to 8. A bicolor digit is connected as two
monocolor digits. The scan register also limits the number
of keys that can be scanned.
Since the number of scanned digits affects the display
brightness, the scan-limit register should not be used to
blank portions of the display (such as leading-zero sup-
pression). Table 25 shows the scan-limit register format.
Intensity RegistersDigital control of display brightness is provided and can
be managed in one of two ways: globally or individually.
Global control adjusts all digits together. Individual control
adjusts the digits separately.
The default method is global brightness control, which
is selected by clearing the global intensity bit (I data bit
D6) in the configuration register. This brightness setting
applies to all display digits. The pulse-width modulator is
then set by the lower nibble of the global intensity reg-
ister, address 0x02. The modulator scales the average
segment current in 16 steps from a maximum of 15/16
down to 1/16 of the peak current. The minimum interdigit
blanking time is set to 1/16 of a cycle. When using bicolor
digits, 256 color/brightness combinations are available.
Individual brightness control is selected by setting the
global intensity bit (I data bit D6) in the configuration reg-
ister. The pulse-width modulator is now no longer set by
the lower nibble of the global intensity register, address
0x02, and the data is ignored. Individual digital control of
display brightness is now provided by a separate pulse-
width modulator setting for each digit. Each digit is con-
trolled by a nibble of one of the four intensity registers:
intensity10, intensity32, intensity54, and intensity76 for
all display types, plus intensity10a, intensity32a, intensi-
ty54a, and intensity76a for the extra eight digits possible
when 7-segment displays are used. The data from the
relevant register is used for each digit as it is multiplexed.
The modulator scales the average segment current in 16
steps in exactly the same way as global intensity adjust-
ment.
Table 26 shows the global intensity register format, Table
27 shows individual segment intensity registers, Table 28
is the even individual segment intensity format, and Table
29 is the odd individual segment intensity format.
GPIO and Key ScanningThe MAX6954 feature five general-purpose input/output
(GPIO) ports: P0 to P4. These ports can be individual-
ly enabled as logic inputs or open-drain logic outputs.
The GPIO ports are not debounced when configured as
inputs. The ports can be read and the outputs set using
the 4-wire interface.
Some or all of the five ports can be configured to per-
form key scanning of up to 32 keys. Ports P0 to P4
are renamed Key_A, Key_B, Key_C, Key_D, and IRQ,
respectively, when used for key scanning. The full
key-scanning configuration is shown in Figure 7. Table 30
is the GPIO data register.
One diode is required per key switch. These diodes can
be common-anode dual diodes in SOT23 packages, such
as the BAW56. Sixteen diodes would be required for the
maximum 32-key configuration.
The MAX6954 can only scan the maximum 32 keys if the
scan-limit register is set to scan the maximum eight digits.
If the MAX6954 is driving fewer digits, then a maximum of
(4 x n) switches can be scanned, where n is the number
of digits set in the scan-limit register. For example, if the
MAX6954 is driving four 14-segment digits cathode driv-
ers O0 to O3 are used. Only 16 keys can be scanned in
this configuration; the switches shown connected to O4
through O7 are not read.
If the user wishes to scan fewer than 32 keys, then
fewer scan lines can be configured for key scanning. The
unused Key_x ports are released back to their original
GPIO functionality. If key scanning is enabled, regardless
of the number of keys being scanned, P4 is always con-
figured as IRQ (Table 31).
The key-scanning circuit utilizes the LEDs’ common-cath-
ode driver outputs as the key-scan drivers. O0 to 07
go low for nominally 200µs (with OSC = 4MHz) in turn
as the displays are multiplexed. By varying the oscilla-
tor frequency, the debounce time changes, though key
scanning still functions. Key_x inputs have internal pullup
resistors that allow the key condition to be tested. The
Key_x input is low during the appropriate digit multiplex
period when the key is pressed. The timing diagram of
Figure 8 shows the normal situation where all eight LED
cathode drivers are used.
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
*Do NOT write to register.
REGISTERADDRESS (COMMAND BYTE)HEX CODED15D14D13D12D11D10D9D8No-OpR/W00000000x00
Decode Mode R/W00000010x01
Global Intensity R/W00000100x02
Scan Limit R/W00000110x03
ConfigurationR/W00001000x04
GPIO Data R/W00001010x05
Port Configuration R/W00001100x06
Display TestR/W00001110x07
Write KEY_A Mask
Read KEY_A DebounceR/W00010000x08
Write KEY_B Mask
Read KEY_B DebounceR/W00010010x09
Write KEY_C Mask
Read KEY_C DebounceR/W00010100x0A
Write KEY_D Mask
Read KEY_D DebounceR/W00010110x0B
Write Digit Type
Read KEY_A Pressed R/W00011000x0C
Read KEY_B Pressed*100011010x0D
Read KEY_C Pressed*100011100x0E
Read KEY_D Pressed*100011110x0F
Intensity 10 R/W00100000x10
Intensity 32 R/W00100010x11
Intensity 54R/W00100100x12
Intensity 76 R/W00100110x13
Intensity 10a (7 Segment Only)R/W00101000x14
Intensity 32a (7 Segment Only)R/W00101010x15
Intensity 54a (7 Segment Only)R/W00101100x16
Intensity 76a (7 Segment Only)R/W00101110x17
Digit 0 Plane P0 R/W01000000x20
Digit 1 Plane P0 R/W01000010x21
Digit 2 Plane P0 R/W01000100x22
Digit 3 Plane P0 R/W01000110x23
Digit 4 Plane P0 R/W01001000x24
Digit 5 Plane P0 R/W01001010x25
Digit 6 Plane P0 R/W01001100x26
Digit 7 Plane P0 R/W01001110x27
Digit 0a Plane P0 (7 Segment Only)R/W01010000x28
Digit 1a Plane P0 (7 Segment Only)R/W01010010x29
Digit 2a Plane P0 (7 Segment Only)R/W01010100x2A
Digit 3a Plane P0 (7 Segment Only)R/W01010110x2B
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 6. Register Address Map
Table 6. Register Address Map (continued)
REGISTERADDRESS (COMMAND BYTE)HEX CODE
D15D14D13D12D11D10D9D8Digit 4a Plane P0 (7 Segment Only) R/W01011000x2C
Digit 5a Plane P0 (7 Segment Only)R/W01011010x2D
Digit 6a Plane P0 (7 Segment Only)R/W01011100x2E
Digit 7a Plane P0 (7 Segment Only) R/W01011110x2F
Digit 0 Plane P1 R/W10000000x40
Digit 1 Plane P1 R/W10000010x41
Digit 2 Plane P1 R/W10000100x42
Digit 3 Plane P1 R/W10000110x43
Digit 4 Plane P1 R/W10001000x44
Digit 5 Plane P1 R/W10001010x45
Digit 6 Plane P1 R/W10001100x46
Digit 7 Plane P1 R/W10001110x47
Digit 0a Plane P1 (7 Segment Only)R/W10010000x48
Digit 1a Plane P1 (7 Segment Only)R/W10010010x49
Digit 2a Plane P1 (7 Segment Only)R/W10010100x4A
Digit 3a Plane P1 (7 Segment Only)R/W10010110x4B
Digit 4a Plane P1 (7 Segment Only)R/W10011000x4C
Digit 5a Plane P1 (7 Segment Only)R/W10011010x4D
Digit 6a Plane P1 (7 Segment Only)R/W10011100x4E
Digit 7a Plane P1 (7 Segment Only)R/W10011110x4F
Write Digit 0 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11000000x60
Write Digit 1 Planes P0 and P1 with Same
Data, Reads as 0x00 R/W11000010x61
Write Digit 2 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11000100x62
Write Digit 3 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11000110x63
Write Digit 4 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11001000x64
Write Digit 5 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11001010x65
Write Digit 6 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11001100x66
Write Digit 7 Planes P0 and P1 with Same
Data, Reads as 0x00R/W11001110x67
Write Digit 0a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11010000x68
Write Digit 1a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11010010x69
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
The timing in Figure 8 loops over time, with 32 keys
experiencing a full key-scanning debounce over typi-
cally 25.6ms. Four keys are sampled every 1.6ms, or
every multiplex cycle. If at least one key that was not
previously pressed is found to have been pressed dur-
ing both sampling periods, then that key press is
debounced, and an interrupt is issued. The key-scan
circuit detects any combination of keys being pressed
during each debounce cycle (n-key rollover).
Port Coniguration RegisterThe port configuration register selects how the five port
pins are used. The port configuration register format is
described in Table 32.
Key Mask RegistersThe Key_A Mask, Key_B Mask, Key_C Mask, and
Key_D Mask write-only registers (Table 33) configure
the key-scanning circuit to cause an interrupt only when
selected (masked) keys have been debounced. Each bit
in the register corresponds to one key switch. The bit is
clear to disable interrupt for the switch, and set to enable
interrupt. Keys are always scanned (if enabled through
the port configuration register), regardless of the setting
of these interrupt bits, and the key status is stored in the
appropriate Key_x pressed register.
Key Debounced RegistersThe Key_A debounced, Key_B debounced, Key_C
debounced, and Key_D debounced read-only registers
(Table 34) show which keys have been detected as
Each bit in the register corresponds to one key switch. The
bit is set if the switch has been correctly debounced since
the register was read last. Reading a debounced register
clears that register (after the data has been read) so that
future keys pressed can be identified. If the debounced
registers are not read, the key-scan data accumulates.
However, as there is no FIFO in the MAX6954, the user
is not able to determine key order, or whether a key has
been pressed more than once, unless the debounced key
status registers are read after each interrupt, and before
the next key-scan cycle.
Reading any of the four debounced registers clears the
IRQ output. If a key is pressed and held down, the key is
reported as debounced (and IRQ issued) only once.
The key must be detected as released by the key-scan-
ning circuit, before it debounces again. If the
debounced registers are being read in response to the
IRQ being asserted, then the user should generally read
all four registers to ensure that all the keys that were
detected by the key-scanning circuit are discovered.
Key Pressed RegistersThe Key_A pressed, Key_B pressed, Key_C pressed and
Key_D pressed read-only registers (Table 35)show which
keys have been detected as pressed by the key-scanning
circuit during the last test.
Each bit in the register corresponds to one key switch.
The bit is set if the switch has been detected as
pressed by the key-scanning circuit during the last test.
Note: Unused register bits read as zero.
Table 6. Register Address Map (continued)
REGISTERADDRESS (COMMAND BYTE)HEX CODE
D15D14D13D12D11D10D9D8Write Digit 2a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11010100x6A
Write Digit 3a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11010110x6B
Write Digit 4a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11011000x6C
Write Digit 5a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11011010x6D
Write Digit 6a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11011100x6E
Write Digit 7a Planes P0 and P1 with Same
Data (7 Segment Only), Reads as 0x00R/W11011110x6F
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
DIGIT 1
ONE COMPLETE 1.6ms MULTIPLEX CYCLE AROUND 8 DIGITS
DIGIT 0's 200µs MULTIPLEX TIMESLOT
DIGIT 0
200µs
DIGIT 2DIGIT 3DIGIT 4DIGIT 5DIGIT 6DIGIT 7
START OF
NEXT CYCLE
LOW
2/16TH
1/16TH
(MIN ON)
HIGH-Z
HIGH-Z
LOW
3/16THHIGH-Z
LOW
4/16THHIGH-Z
LOW
5/16THHIGH-Z
LOW
6/16THHIGH-Z
LOW
7/16THHIGH-Z
LOW
8/16THHIGH-Z
LOW
9/16THHIGH-Z
LOW
10/16THHIGH-Z
LOW
11/16THHIGH-Z
LOW
12/16THHIGH-Z
LOW
13/16THHIGH-Z
LOW
14/16THHIGH-Z
LOW
15/16THHIGH-Z
LOW
15/16THHIGH-Z
(MAX ON)
HIGH-Z
HIGH-Z
CURRENT SOURCE ENABLEDMINIMUM 12.5µs INTERDIGIT BLANKING INTERVAL
HIGH-Z
ANODE (LIT)
DIGIT 0 CATHODE
DRIVER INTENSITY
SETTINGS
ANODE (UNLIT)
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Figure 7. Key-Scanning Configuration
LED OUTPUT O0
LED OUTPUT O1
LED OUTPUT O2
LED OUTPUT O3
LED OUTPUT O4
LED OUTPUT O5
LED OUTPUT O6
LED OUTPUT O7
12.5µs TO 187.5µs DIGIT PERIOD
1.6ms MULTIPLEX CYCLE 11.6ms MULTIPLEX CYCLE 21.6ms MULTIPLEX CYCLE 8
THE FIRST HALF OF A 25.6ms KEY-SCAN CYCLE
1.6ms MULTIPLEX CYCLE 8
THE SECOND HALF OF A 25.6ms KEY-SCAN CYCLE
1.6ms MULTIPLEX CYCLE 1
START OF NEXT KEY-SCAN CYCLE
FIRST TEST OF KEY SWITCHESSECOND TEST OF KEY SWITCHESINTERRUPT ASSERTED IF REQUIRED
DEBOUNCE REGISTER UPDATEDADE
SW A0
SW A1
SW A2
SW A3
SW A4
SW A5
SW A6
SW A7
VCC
LED OUTPUT O0
LED OUTPUT O1
LED OUTPUT O2
LED OUTPUT O3
LED OUTPUT O4
LED OUTPUT O5
LED OUTPUT O6
LED OUTPUT O7MICROCONTROLLER INTERRUPT
SW B0
SW B1
SW B2
SW B3
SW B4
SW B5
SW B6
SW B7
SW C0
SW C1
SW C2
SW C3
SW C4
SW C5
SW C6
SW C7
SW D0
SW D1
SW D2
SW D3
SW D4
SW D5
SW D6
SW D7
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
The bit is cleared if the switch has not been detected as
pressed by the key-scanning circuit during the last test.
Reading a pressed register does not clear that register or
clear the IRQ output.
Display Test RegisterThe display test register (Table 36) operates in two
modes: normal and display test. Display test mode turns
all LEDs on (including DPs) by overriding, but not altering,
all controls and digit registers (including the shutdown
register), except for the digit-type register and the GPIO
configuration register. The duty cycle, while in display
test mode, is 7/16 (see the Choosing Supply Voltage to
Minimize Power Dissipation section).
Selecting External Components RSET and CSET
to Set Oscillator Frequency and Peak Segment
CurrentThe RC oscillator uses an external resistor, RSET, and
an external capacitor, CSET, to set the frequency, fOSC.
The allowed range of fOSC is 1MHz to 8MHz. RSET also
sets the peak segment current. The recommended val-
ues of RSET and CSET set the oscillator to 4MHz, which
makes the blink frequencies selectable between 0.5Hz
and 1Hz. The recommended value of RSET also sets the
peak current to 40mA, which makes the segment current
adjustable from 2.5mA to 37.5mA in 2.5mA steps.
ISEG = KL / RSET mA
fOSC = KF / (RSET x CSET) MHz
where:
KL = 2240
KF = 5376
RSET = external resistor in kW
CSET = external capacitor in pF
CSTRAY = stray capacitance from OSC pin to GND in
pF, typically 2pF
The recommended value of RSET is 56kW and the rec-
ommended value of CSET is 22pF.
The recommended value or RSET is the minimum
allowed value, since it sets the display driver to the
maximum allowed peak segment current. RSET can be
set to a higher value to set the segment current to a
lower peak value where desired. The user must also
ensure that the peak current specifications of the LEDs
connected to the driver are not exceeded.
The effective value of RSET includes not only the actual
external capacitor used, but also the stray capacitance
from OSC to GND. This capacitance is usually in the
Applications Information
Driving Bicolor LEDsBicolor digits group a red and a green die together for
each display element, so that the element can be lit red
or green (or orange), depending on which die (or both)
is lit. The MAX6954 allows each segment’s current to
be set individually from the 1/16th (minimum current
and LED intensity) to 15/16th (maximum current and
LED intensity), as well as off (zero current). Thus, a
bicolor (red-green) segment pair can be set to 256
color/intensity combinations.
Choosing Supply Voltage to Minimize
Power DissipationThe MAX6954 drives a peak current of 40mA into LEDs
with a 2.2V forward-voltage drop when operated from a
supply voltage of at least 3.0V. The minimum voltage
drop across the internal LED drivers is therefore (3.0V
- 2.2V) = 0.8V. If a higher supply voltage is used, the dri-
ver absorbs a higher voltage, and the driver’s power
dissipation increases accordingly. However, if the LEDs
used have a higher forward voltage drop than 2.2V, the
supply voltage must be raised accordingly to ensure
that the driver always has at least 0.8V of headroom.
The voltage drop across the drivers with a nominal 5V
supply (5.0V - 2.2V) = 2.8V is nearly 3 times the drop
across the drivers with a nominal 3.3V supply (3.3V
- 2.2V) = 1.1V. In most systems, consumption is an
important design criterion, and the MAX6954 should
be operated from the system’s 3.3V nominal supply. In
other designs, the lowest supply voltage may be 5V.
The issue now is to ensure the dissipation limit for the
MAX6954 is not exceeded. This can be achieved by
inserting a series resistor in the supply to the MAX6954,
ensuring that the supply decoupling capacitors are still
on the MAX6954 side of the resistor. For example, con-
sider the requirement that the minimum supply volt-
age to a MAX6954 must be 3.0V, and the input supply
range is 5V ±5%. Maximum supply current is 35mA +
(40mA x 17) = 715mA. Minimum input supply voltage is
4.75V. Maximum series resistor value is (4.75V -
3.0V)/0.715A = 2.44W. We choose 2.2W ±5%. Worst-
case resistor dissipation is at maximum toleranced
resistance, i.e., (0.715A) 2 x (2.2W x 1.05) = 1.18W.
The maximum MAX6954 supply voltage is at maximum
input supply voltage and minimum toleranced resis-
tance, i.e., 5.25V - (0.715A x 2.2W x 0.95) = 3.76V.
Low-Voltage OperationThe MAX6954 works over the 2.7V to 5.5V supply
range. The minimum useful supply voltage is deter-
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
peak current ISEG, plus the 0.8V headroom required by
the driver output stages. The MAX6954 correctly regu-
lates ISEG with a supply voltage above this minimum
voltage. If the supply drops below this minimum volt-
age, the driver output stages may brown out, and be
unable to regulate the current correctly. As the supply
voltage drops further, the LED segment drive current
becomes effectively limited by the output driver’s on-
resistance, and the LED drive current drops. The char-
acteristics of each individual LED in a display digit are
well matched, so the result is that the display intensity
dims uniformly as supply voltage drops out of regulation
and beyond.
Computing Power DissipationThe upper limit for power dissipation (PD) for the MAX6954
is determined from the following equation:
PD = (V+ x 35mA) + (V+ - VLED) (DUTY x ISEG x N)
where:
V+ = supply voltage
DUTY = duty cycle set by intensity register
N = number of segments driven (worst case is 17)
VLED = LED forward voltage at ISEG
ISEG = segment current set by RSET
PD = Power dissipation, in mW if currents are in mA
Dissipation example:
ISEG = 30mA, N = 17, DUTY = 15/16,
VLED = 2.4V at 30mA, V+ = 3.6V
PD = 3.6V (35mA) + (3.6V - 2.4V)(15/16 x 30mA x 17) = 0.700W
Thus, for a 36-pin SSOP package (TJA = 1 / 0.0118 =
+85°C/W from Operating Ratings), the maximum allowed
ambient temperature TA is given by:
TJ(MAX) = TA + (PD x TJA) = +150°C= TA + (0.700 x +85°C/W)
So TA = +90.5°C. Thus, the part can be operated safely at
a maximum package temperature of +85°C.
Power SuppliesThe MAX6954 operates from a single 2.7V to 5.5V
power supply. Bypass the power supply to GND with a
0.1µF capacitor as close to the device as possible. Add 47µF capacitor if the MAX6954 is not close to the
board’s input bulk decoupling capacitor.
Terminating the Serial InterfaceThe MAX6954 uses fixed voltage thresholds of 0.6V
and 1.8V for the 4-wire interface inputs. These fixed
thresholds allow the MAX6954 to be controlled by a
host operating from a lower supply voltage than the
MAX6954; for example, 2.5V. The fixed thresholds also
reduce the logic input noise margin when operating the
MAX6954 from a higher supply voltage, such as 5V. At
higher supply voltages, it may be necessary to fit termi-
nation components to the CLK, DIN, and CS inputs
to avoid signal reflections that the MAX6954 could
respond to as multiple transitions. Suitable termination components can be either a 33pF capacitor or 4.7kΩ
resistor fitted from each of the CLK, DIN, and CS inputs
to GND.
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 8. 14-Segment Display Font MapTable 7. 16-Segment Display Font Mapx000x010x011x100x101x110x111x001
MSB
LSBx000x010x011x100x101x110x111x001
MSB
LSB
MAX69544-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
