MAX6952EPL+ ,4-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display DriverApplicationsMessage Boards Audio/VideoOrdering InformationEquipmentMedical EquipmentPART TEMP RANGE ..
MAX6953EPL+ ,2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display DriverApplicationsOrdering InformationMessage BoardsPART TEMP RANGE PIN-PACKAGEMedical EquipmentMAX6953EA ..
MAX6954AAX ,4-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanFeaturesThe MAX6954 is a compact display driver that inter-
MAX6952EPL+
4-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display Driver
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
General DescriptionThe MAX6952 is a compact cathode-row display driver
that interfaces microprocessors to 5 ✕7 dot-matrix LED
displays through an SPI™-compatible serial interface.
The MAX6952 drives up to four digits (140 LEDs).
Included on chip are an ASCII 104-character font, mul-
tiplex scan circuitry, column and row drivers, and static
RAM that stores each digit, as well as font data for 24
user-definable characters. The segment current for the
LEDs is set by an internal digit-by-digit digital bright-
ness control.
The device includes a low-power shutdown mode, seg-
ment blinking (synchronized across multiple drivers, if
desired), and a test mode that forces all LEDs on. The
LED drivers are slew rate limited to reduce EMI.
For a 2-wire interfaced version, refer to the MAX6953
data sheet. An EV kit is available for the MAX6952.
FeaturesHigh-Speed 26MHz with SPI-/QSPI-™/
MICROWIRE™-Compatible Serial Interface2.7V to 5.5V OperationDrives Four Monocolor or Two Bicolor Cathode-
Row 5 ✕7 Matrix DisplaysBuilt-In ASCII 104-Character Font 24 User-Definable Characters AvailableAutomatic Blinking Control for Each Segment36µA Low-Power Shutdown (Data Retained)16-Step Digital Brightness ControlDisplay Blanked on Power-UpSlew-Rate-Limited Segment Drivers for Lower EMI36-Pin SSOP and 40-Pin DIP Packages
Ordering Information
Typical Application Circuit19-2437; Rev 1; 10/02
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Pin Configurations appear at end of data sheet.Message Boards
Medical Equipment
Industrial Displays
Audio/Video
Equipment
Gaming Machines
Applications
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(Typical operating circuit, V+ = 3.0V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND) .............................................................................-0.3V to +6V
All Other Pins................................................-0.3V to (V+ + 0.3V)
O0–O13 Sink Current.......................................................500mA
O14–O23 Source Current..................................................50mA
Continuous Power Dissipation (TA= +70°C)
36-Pin SSOP (derate 11.8mW/°C above +70°C).....941.2mW
40-Pin PDIP (derate 16.7mW/°C above +70°C)........1333mW
Operating Temperature Range (TMIN, TMAX)......-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
DC ELECTRICAL CHARACTERISTICS (continued)(Typical operating circuit, V+ = 3.0V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
Note 2:Guaranteed by design.
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
Typical Operating Characteristics(Typical application circuit, V+ = 3.3V, LED forward voltage = 2.4V, scan limit set to 4 digits, TA= +25°C, unless otherwise noted.)
The MAX6952 is a serially interfaced display driver that
can drive four digits of 5 ✕7 cathode-row dot-matrix
displays. The MAX6952 can drive either four monocolor
digits (Table 1) or two bicolor digits (Table 2). The
MAX6952 includes a 128-character font map compris-
ing 104 predefined characters and 24 user-definable
characters. The predefined characters follow the Arial
font, with the addition of the following common sym-
bols: £, €, ¥, °, µ, ±, ↑, and ↓. The 24 user-definable
characters are uploaded by the user into on-chip RAM
through the serial interface and are lost when the
device is powered down. Figure 1 is the MAX6952
functional diagram.
The MAX6952 communicates through an SPI-compati-
ble 4-wire serial interface. The interface has three
inputs, clock (CLK), chip select (CS), and data in (DIN),
and one output, data out (DOUT). CSmust be low to
clock data into or out of the device, and DIN must be
stable when sampled on the rising edge of CLK. DOUT
is stable on the rising edge of CLK. Note that while the
SPI protocol expects DOUT to be high impedance
when the MAX6952 is not being accessed, DOUT on
the MAX6952 is never high impedance.
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
Pin Description
MAX6952CLK and DIN may be used to transmit data to other
peripherals. The MAX6952 ignores all activity on CLK
and DIN except when CSis low.
Control and Operation Using the 4-Wire InterfaceControlling the MAX6952 requires sending a 16-bit
word. The first byte, D15 through D8, is the command
byte (Table 3), and the second byte, D7 through D0, is
the data byte.
Connecting Multiple MAX6952s to the 4-Wire BusMultiple MAX6952s may be daisy-chained by connect-
ing the DOUT of one device to the DIN of the next, and
driving CLK and CSlines in parallel (Figure 6). Data at
DIN propagates through the internal shift registers and
appears at DOUT 15.5 clock cycles later, clocked out
on the falling edge of CLK. When sending commands
to daisy-chained MAX6952s, all devices are accessed
at the same time. An access requires (16 x n) clock
cycles, where n is the number of MAX6952s connected
together. To update just one device in a daisy-chain,
the user can send the no-op command (0x00) to the
others.
Writing Device Registers The MAX6952 contains a 16-bit shift register into which
DIN data are clocked on the rising edge of SCLK, when
CS is low.WhenCSis high, transitions on SCLK have
no effect. When CSgoes high, the 16 bits in the shift
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
Table 2. Connection Scheme for Two Bicolor Digits
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driverregister are parallel loaded into a 16-bit latch. The 16
bits in the latch are then decoded and executed.
The MAX6952 is written to using the following
sequence:Take CLK low.Take CSlow. This enables the internal 16-bit shift
register.Clock 16 bits of data into DIN, D15 first to D0 last,
observing the setup and hold times. Bit D15 is low,
indicating a write command.Take CShigh (while CLK is still high after clocking
in the last data bit).Take CLK low.
Figure 3shows a write operation when 16 bits are
transmitted.
If fewer or greater than 16 bits are clocked into the
MAX6952 between taking CSlow and taking CShigh
again, the MAX6952 stores the last 16 bits received,
including the previous transmission(s). The general
case is when n bits (where n > 16) are transmitted to
the MAX6952. The last bits comprising bits {n-15} to {n}
are retained and are parallel loaded into the 16-bit latch
as bits D15 to D0, respectively (Figure 4).
Reading Device RegistersAny register data within the MAX6952 may be read by
sending a logic high to bit D15. The sequence is:Take CLK low.Take CSlow. This enables the internal 16-bit shift
register.Clock 16 bits of data into DIN, D15 first to D0 last,
observing the setup and hold times. Bit D15 is high,
indicating a read command and bits D14 through
D8 contain the address of the register to read. Bits
D7 to D0 contain dummy data, which is discarded.Take CShigh. Positions D7 through D0 in the shift
register are now loaded with the data in the register
addressed by bits D15 through D8. Bits Take CLK low.Issue another read or write command (which can
be a no-op), and examine the bit stream at DOUT;
the second 8 bits are the contents of the register
addressed by bits D14 through D8 in step 3.
Digit RegistersThe MAX6952 uses eight digit registers to store the char-
acters that the user wishes to display on the four 5 ✕7
LED digits. These digit registers are implemented with
two planes of 4 bytes, called P0 and P1. Each LED digit
is represented by 2 bytes of memory, 1 byte in plane P0
and the other in plane P1. The digit registers are mapped
so that a digit’s data can be updated in plane P0, or
plane P1, or both planes at the same time (Table 4).
If the blink function is disabled through the Blink Enable
Bit E (Table 9) in the configuration register, then the
digit register data in plane P0 is used to multiplex the
display. The digit register data in P1 is not used. If the
blink function is enabled, then the digit register data in
both plane P0 and plane P1 are alternately used to mul-
tiplex the display. Blinking is achieved by multiplexing
the LED display using data planes P0 and P1 on alter-
nate phases of the blink clock (Table 10).
The data in the digit registers does not control the digit
segments directly. Instead, the register data is used to
address a character generator, which stores the data of
a 128-character font (Table 14). The lower 7 bits of the
digit data (D6 to D0) select the character from the font.
The most-significant bit of the register data (D7) selects
whether the font data is used directly (D7 = 0) or
whether the font data is inverted (D7 = 1). The inversion
feature can be used to enhance the appearance of
bicolor displays by displaying, for example, a red char-
acter on a green background.
Display Blink ModeThe display blinking facility, when enabled, makes the
driver flip automatically between displaying the digit
register data in planes P0 and P1. If the digit register
data for any digit is different in the two planes, then that
digit appears to flip between two characters. To make a
character appear to blink on or off, write the character
to one plane, and use the blank character (0x20) for the
other plane. Once blinking has been configured, it con-
tinues automatically without further intervention.
Blink SpeedThe blink speed is determined by frequency of the mul-
tiplex clock, OSC, and by setting the Blink Rate
Selection Bit B (Table 8) in the configuration register.
The Blink Rate Selection Bit B sets either fast or slow
blink speed for the whole display.
Initial Power-UpOn initial power-up, all control registers are reset, the
display is blanked, intensities are set to minimum, and
shutdown is enabled (Table 5).
Configuration RegisterThe configuration register is used to enter and exit
shutdown, select the blink rate, globally enable and
disable the blink function, globally clear the digit data,
and reset the blink timing (Table 6).
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display DriverFigure 2. Timing Diagram
Figure 3. 16-Bit Write Transmission to the MAX6952
Figure 4. Transmission of More than 16 Bits to the MAX6952
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
Table 4. Register Address Map
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display Driver
Shutdown Mode (S Data Bit D0) FormatThe S bit in the configuration register selects shutdown
or normal operation (Table 7). The display driver can be
programmed while in shutdown mode, and shutdown
mode is overridden when in display test mode. For nor-
mal operation, the S bit should be set to 1.
Blink Rate Selection (B Data Bit D2) FormatThe B bit in the configuration register selects the blink
rate. This is the speed that the segments alternate
between plane P0 and plane P1 refresh data. The blink
rate is determined by the frequency of the multiplex clock
OSC, in addition to the setting of the B bit (Table 8).
Global Blink Enable/Disable
(E Data Bit D3) FormatThe E bit globally enables or disables the blink feature
of the device (Table 9). When blink is globally enabled,
then the digit data in both planes P0 and P1 are used
to control the display (Table 10).
Table 6. Configuration Register Format
MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ✕7 Matrix LED Display DriverFigure 6. MAX6952 Daisy-Chain Connection
When blink is globally disabled, then only the digit data
in plane P0 is used to control the display. The digit data
in plane P1 is ignored.
Global Blink Timing Synchronization
(T Data Bit D4) FormatBy setting the T bit in multiple MAX6952s at the same
time (or in quick succession), the blink timing can be
synchronized across all the devices (Table 11). Note
that the display multiplexing sequence is also reset,
which might give rise to a one-time display flicker when
the register is written.
Global Clear Digit Data (R Data Bit D5) FormatWhen global digit data clear is set, the digit data for both
planes P0 and P1 for all digits is cleared (Table 12).
Blink Phase Readback (P Data Bit D7) FormatWhen the configuration register is read, the P bit
reflects the state of the blink output pin at that time
(Table 13).
Character Generator Font MappingThe font is a 5 ✕7 matrix comprising 104 characters in
ROM, and 24 user-definable characters. The selection
from the total of 128 characters is represented by the
lower 7 bits of the 8-bit digit registers. The most-signifi-
cant bit, shown as x in the ROM map below, is zero to
light LEDs as shown by the black segments in Table
14, and 1 to display the inverse.
The character map follows the Arial font for 96 charac-
ters in the x0101000 through x1111111 range. The first
