MAX6650EUB+ ,Fan-Speed Regulators and Monitors with SMBus/I²C-Compatible InterfaceFeatures♦ Closed/Open-Loop Fan-Speed Control for The MAX6650/MAX6651 fan controllers use an25V/12V ..
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MAX6651EEE+ ,Fan-Speed Regulators and Monitors with SMBus/I²C-Compatible InterfaceGeneral Description ________
MAX6651EEE-T ,Fan-Speed Regulators and Monitors with SMBus/I²C-Compatible InterfaceELECTRICAL CHARACTERISTICS(V = 3.0V to 5.5V, T = -40°C to +85°C, unless otherwise noted. Typical va ..
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MAX6650EUB+-MAX6650EUB+T-MAX6651EEE+-MAX6651EEE-T
Fan-Speed Regulators and Monitors with SMBus/I²C-Compatible Interface
General DescriptionThe MAX6650/MAX6651 fan controllers use an
SMBus/I2C-compatible interface to regulate and moni-
tor the speed of 5VDC/12VDC brushless fans with built-
in tachometers. They automatically force the fan’s
tachometer frequency (fan speed) to match a prepro-
grammed value in the Fan-Speed Register by using an
external MOSFET or bipolar transistor to linearly regu-
late the voltage across the fan. The MAX6650 regulates
the speed of a single fan by monitoring its tachometer
output. The MAX6651 also regulates the speed of a sin-
gle fan, but it contains additional tachometer inputs to
monitor up to four fans and control them as a single unit
when they are used in parallel.
The MAX6650/MAX6651 provide general-purpose
input/output (GPIO) pins that serve as digital inputs,
digital outputs, or various hardware interfaces. Capable
of sinking 10mA, these open-drain inputs/outputs can
drive an LED. To add additional hardware control, con-
figure GPIO1 to fully turn on the fan in case of software
failure. To generate an interrupt when a fault condition
is detected, configure GPIO0 to behave as an active-
low alert output. Synchronize multiple devices by set-
ting GPIO2 (MAX6651 only) as an internal clock output
or an external clock input.
The MAX6650 is available in a space-saving 10-pin
µMAX®package, and the MAX6651 is available in a
small 16-pin QSOP package.
________________________ApplicationsRAIDDesktop Computers
ServersNetworking
WorkstationsTelecommunications
____________________________FeaturesClosed/Open-Loop Fan-Speed Control for
5V/12V Fans 2-Wire SMBus/I2C-Compatible InterfaceMonitors Tachometer Output
Single Tachometer (MAX6650)
Up to Four Tachometers (MAX6651) Programmable Alert OutputGPIOsHardware Full-On OverrideSynchronize Multiple FansFour Selectable Slave Addresses3V to 5.5V Supply VoltageSmall Packages
10-Pin µMAX (MAX6650)
16-Pin QSOP (MAX6651)
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651EVALUATION KIT AVAILABLE
Ordering InformationµMAX is a registered trademark of Maxim Integrated Products, Inc.
+Denotes a lead(Pb)-free/RoHS-compliant package.
MAX6650
VCC
SCL
10kΩ
SDA
GPIO0OUT
ADD
GND
TACH0
VCC
3V TO 5.5V
VFAN
5V OR 12V
CCOMP
10µF
SMBus/I2C
INTERFACE
GPIO1
LED
FAN
FULL ON
ALERT
Typical Operating Circuit
Pin Configurations appear at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE
MAX6650EUB-40°C to +85°C10 µMAX
MAX6650EUB+-40°C to +85°C10 µMAX
MAX6651EEE-40°C to +85°C16 QSOP
MAX6651EEE+-40°C to +85°C16 QSOP
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND..............................................................-0.3V to +6V
FB, TACH_ ..........................................................-0.3V to +13.2V
All Other Pins..............................................-0.3V to (VCC+ 0.3V)
Output Voltages..........................................-0.3V to (VCC+ 0.3V)
Maximum Current
Into VCC, GND, VOUT...................................................100mA
Into All Other Pins..........................................................50mA
Continuous Power Dissipation (TA= +70°C)
µMAX (derate 5.6mW/°C above +70°C).....................444mW
QSOP (derate 8.3mW/°C above +70°C).....................667mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow)
Lead(Pb)-free..............................................................+260°C
Containing lead(Pb)....................................................+240°C
Input Low Voltage
Input HysteresisVHYS200mV
Tachometer ThresholdVTACH_VFB+ 1.0VFB+3V12V fan, 0 < VFB< 9V
PARAMETERSYMBOLMINTYPMAXUNITSOutput Source CurrentISOURCE50mA
Output Sink CurrentISINK10mA
Output Voltage RangeVOUT0.3VCC- 0.3V
VFB+ 0.5VFB+1.5
Tachometer Input ImpedanceRTACH_70100150kΩ
Supply VoltageVCC3.05.5V
Supply CurrentICC10mA
DAC Differential Nonlinearity5LSB
Useful DAC Resolution8bits
Feedback Input ImpedanceRFB70100150kΩ
Output Sink CurrentIGPIO_10mA
CONDITIONSGuaranteed monotonicity on FB (Note 1)
VOUT= VCC- 1.8V
Measured at FB (Note 1)
VOUT= 0.5V
IOUT= ±100µA
5V fan, 0 < VFB< 4.5V
0 < VFB < 9V
0 < VTACH< 9V
VGPIO_= 0.4V
Full-on mode, IOUT= 00.8VIL(GPIO_)
Input High VoltageV2VCC ≤3.6VVIH(GPIO_)3VCC > 3.6V
Pullup ResistorRGPIO_100kΩ
TACHOMETER INPUTS (TACH_)
FEEDBACK (FB)
GENERAL-PURPOSE INPUTS/OUTPUTS (GPIO_) (Note 2)
POWER SUPPLY (VCC)
OUTPUT (OUT)
9.510.5Selects slave address 3Eh (Table 1)RADDADD External Pulldown Resistorto GND
Selects slave address 36h (Table 1) (Note 3)µA-10ILADDADD Input Leakage
ELECTRICAL CHARACTERISTICS (continued)(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)
TIMING CHARACTERISTICS (VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651Selects slave address 96h (Table 1)
Selects slave address 90h (Table 1)
CONDITIONSVCC- 0.05VIH(ADD)ADD Input High Voltage0.1VIL(ADD)ADD Input Low Voltage
UNITSMINTYPMAXSYMBOLPARAMETER
ADDRESS SELECT (ADD)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS500Minimum pulse durationGlitch Rejection
kHz254fCLKClock Frequency
kHz0400fSCLSCL Clock Frequency1.3tBUFBus Free Time Between Stop
and Start Condition
Hold-Time Start ConditiontHD:STA0.6µs1.3tLOWLow Period of the SCL Clock
High Period of the SCL ClocktHIGH0.6µs0900(Note 5)tHD:DATData Hold Time
Data Setup TimetSU:DAT100ns20 + 0.1CB(pF)300(Note 6)tRRise-Time SDA/SCL Signal
(Receiving)
Fall-Time SDA/SCL Signal
(Receiving)tF(Note 6) 20 + 0.1CB(pF)300ns20 + 0.1CB(pF)250ISINK < 6mA (Note 6) tFFall-Time SDA Signal
(Transmitting)-10+10VCC= 5VfCLKClock Frequency Uncertainty
TACHOMETERS
GPIO2 (Note 2)
SMBus/I2C INTERFACE (Figures 3, 4)VADD= 0.5V (Note 4)
SMBus/I2C INTERFACE(SDA, SCL)-80-40IADDADD Pulldown Current
VSDA= 0.6VmA6ISDAData Output Sink Current
VCC≤3.6VV20.8VILInput Low Voltage
0 < VIN< VCCµA±1Input Leakage Current
VCC> 3.6V3VIHInput High Voltage200VHYSInput Hysteresis
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX6650/51-01
SUPPLY VOLTAGE (V)
FREQUENCY (kHz)
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
MAX6650/51-02
TEMPERATURE (°C)
FREQUENCY (kHz)
VCC = 5.5V
VCC = 3.0V
FEEDBACK VOLTAGE
vs. TEMPERATURE
MAX6650/51-03
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
VCC = 5.5V,
VFAN = 5.5V, VFAN = 12.0V
VFAN = 12.0V, VFAN = 5.5V
VCC = 3.0V
FEEDBACK VOLTAGE vs. SUPPLY
VOLTAGE (DAC SET TO 35)
MAX6650/51-04
SUPPLY VOLTAGE (V)
FEEDBACK VOLTAGE (V)
VFAN = 5.5V
VFAN = 12.0V
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX6650/51-05
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
SUPPLY CURRENT vs. TEMPERATURE
MAX6650/51-06
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
VCC = 5.5V
VCC = 3V
TIMING CHARACTERISTICS (continued)(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)
Note 1:For proper measurement of VFB, connect OUT and FB as shown in the Typical Operating Circuit.
Note 2:GPIO2, GPIO3, and GPIO4 only in the MAX6651.
Note 3:Guaranteed by design and not 100% production tested.
Note 4:For RADDcomponent test purposes only.
Note 5:Note that the transition must internally provide at least a hold time to bridge the undefined region (300ns max) of SCL’s
falling edge.
Note 6:CBis the total capacitance of one bus line in pF. Tested with CB= 400pF. Rise and fall times are measured between 0.3 x
VCCand 0.7 x VCC.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS050
tSPIKE
tSU:STOSetup Time for Stop Condition
Pulse Width of Spike Suppressed
PIN
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
Detailed DescriptionThe MAX6650/MAX6651 use an SMBus/I2C-Compatible
interface to regulate and monitor the speed of
5VDC/12VDC brush-less fans with built-in open-collec-
tor/drain tachometers. Regulating fan speed propor-
tionally with temperature saves power, increases fan
life, and reduces acoustic noise. Since fan speed is
proportional to the voltage across the fan, the
MAX6650/MAX6651 control the speed by regulating the
voltage on the low side of the fan with an external MOS-
FET or bipolar transistor.
The MAX6650/MAX6651 each contain two internal con-
trol loops. The first loop controls the voltage across the
fan. The internal digital-to-analog converter (DAC) sets
the reference voltage for an internal amplifier (Figure 1),
which then drives the gate of an external N-channel
MOSFET (or the base of a bipolar transistor) to regulate
the voltage on the low side of the fan. As the reference
voltage provided by the DAC changes, the feedback
amplifier automatically adjusts the feedback voltage,
which changes the voltage across the fan.
The second control loop consists of the internal digital
logic that controls the fan’s speed. The MAX6650/
MAX6651 control fan speed by forcing the tachometer
frequency to equal a reference frequency set by the
Fan-Speed Register, the prescaler, and the internal
oscillator (see the Fan-Speed Registersection). When
the tachometer frequency is too high, the value of the
DAC’s input register is increased by the regulator.
Once the DAC voltage increases, the analog control
loop forces the feedback voltage to rise, which reduces
the voltage across the fan. Since fan speed is propor-
tional to the voltage across the fan, the fan slows down.
2-Wire SMBus/I2C-Compatible
Digital InterfaceFrom a software perspective, the MAX6650/MAX6651
appear as a set of byte-wide registers that contain
speed control, tachometer count, alarm conditions, or
configuration bits. These devices use a standard
SMBus/I2C-compatible 2-wire serial interface to access
the internal registers.
Pin Description
MAX6650/MAX6651
FUNCTIONNAMEPIN
MAX6650MAX6651Tachometer Input. Used to close the loop around the tachometer.TACH0112, 3, 16TACH2, TACH3,
TACH1Tachometer Inputs. Used to monitor tachometers only.
GroundGND425SDA2-Wire Serial-Data Input/Output (open drain)
2-Wire Serial Clock InputSCL648ADDSlave Address Select Input (Table 1)
General-Purpose Input/Output (open drain). Configurable to act either as an out-
put or as an input (FULL ONor general purpose).
General-Purpose Input/Output (open drain). Configurable to act as a general
input/output line or an active-low ALERToutput.
General-Purpose Input/Output (open drain). Configurable to act as a general
input/output line, an internal clock output, or an external clock input.
Output. Drives the external MOSFET or bipolar transistor.
+3.0V to +5.5V Power Supply
Feedback Input. Closes the loop around the external MOSFET or bipolar tran-
sistor.FB
VCC
OUT
GPIO2
GPIO0
GPIO19610—814107, 12GPIO4, GPIO3General-Purpose Input/Output (open drain)
HEX
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651The MAX6650/MAX6651 employ three standard SMBus
protocols: write byte, read byte, and receive byte
(Figure 2). The shorter protocol (receive) allows quicker
transfers, provided that the correct data register was
previously selected by a write or read byte instruction.
Use caution with the shorter protocol in multimaster
systems, since a second master could overwrite the
command byte without informing the first master.
Slave AddressesThe device address can be set to one of four different
values. Accomplish this by pin-strapping ADD so that
more than one MAX6650/MAX6651 can reside on the
same bus without address conflicts (Table 1).
SMBus/I2C
INTERFACE
SMBus/I2C
INTERFACE
VCC
3V TO 5.5VVCC
SCL
SDA
ADD
GND
FAN SPEED
CONFIGURE
ALARM ENABLE
ALARM STATUS
TACH COUNT
COUNT TIME
GPIO DEF
GPIO STATUS
DAC
ADDRESS
DECODE
TACHOMETER
COUNT
CONTROL
LOGIC
8-BIT
DAC
10kΩ
VREF
GPIO
BLOCKS
(FIGURE 5)
GPIO0
OUT
TACH0
GPIO1
10kΩ
90kΩ
90kΩ
10kΩ
MAX6650
MAX6651
ALERT
FULL ON
FAN
VFAN = 5V OR 12V
VOFFSET
Figure 1. Block Diagram
Table 1. Slave Address Decoding (ADD)
BINARYVCC1001 011
No connection (high-Z)0011 011
10kΩresistor to GND0011 111
ADDRESSADD1001 000GND
Slave AddressCommand byte: Selects
which register you are
writing to.
Data byte: Data goes into
the register set by the
command byte (to set
thresholds, configuration
masks, and sampling rate).
Figure 2a. SMBus Protocol: Write Byte Format
Slave AddressCommand byte: Selects
which register you are
reading from.
Slave Address.
Repeated due to
change in data-flow
direction
Data byte: Reads from
the register set by the
command byte.
Figure 2b. SMBus Protocol: Read Byte Format
Data byte: Reads data
from the register com-
manded by the last
read-byte or write-byte
transmission; also
used for SMBus alert
response return address.
Figure 2c. SMBus Protocol: Receive Byte Format
S = Start conditionShaded = Slave transmissionWR = Write = 0
P = Stop conditionACK = Acknowledged = 0RD = Read =1= Not acknowledged = 1
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
COMMANDS8 bits
ACKDATA8 bits
ACKADDRESS7 bits
ACK
COMMANDS8 bits
ACKADDRESS7 bits
ACKPA
DATA8 bits
ADDRESS7 bits
ACKPA
DATA8 bits
ADDRESS7 bits
ACKSlave Address
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651SMBCLKCDEFGHIJK
SMBDATA
tSU:STAtHD:STA
tLOWtHIGH
tSU:DATtHD:DATtSU:STOtBUF
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW M
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO MASTER
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION
SMBCLK
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVECDEFGHIJ
SMBDATA
tSU:STAtHD:STA
tLOWtHIGH
tSU:DATtSU:STOtBUF
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = ACKNOWLEDGE CLOCK PULSE
J = STOP CONDITION
K = NEW START CONDITION
Figure 3. SMBus Write Timing Diagram
Figure 4. SMBus Read Timing Diagram
Command-Byte FunctionsThe 8-bit Command-Byte Register (Table 2) is the mas-
ter index that points to the various other registers within
MAX6650/MAX6651. The register’s power-on reset
(POR) state is 0000 0000, so that a receive-byte trans-
mission (a protocol that lacks the command byte)
occurring immediately after POR returns the current
speed setting.
Fan-Speed Register In closed-loop mode, the MAX6650/MAX6651 use the
Fan-Speed Register to set the period of the tachometer
signal that controls the fan speed. The Fan-Speed
Register is ignored in all other modes of operation. The
MAX6650/MAX6651 regulate the fan speed by forcing
the tachometer period (tTACH) equal to the scaled reg-
ister value. One revolution of the fan generates two
tachometer pulses, so the required Fan-Speed Register
value (KTACH)may be calculated as:
tTACH= 1 / (2 x Fan Speed)
KTACH= [tTACHx KSCALEx (fCLK/ 128)] - 1
where the fan speed is in rotations per second (RPS),
tTACHis the period of the tachometer signal, fCLKis the
internal oscillator frequency (254kHz ±10%), and
KSCALEis the prescaler value (see Configuration-Byte
Register). Since the fan speed is inversely proportional
to the tachometer period, the Fan-Speed Register value
(KTACH) does not linearly control the fan speed (Table
3). Select the prescaler value so the fan’s full speed is
achieved with a register value of approximately 64
(0100 0000) to optimize speed range and resolution.
The MAX6651 may be controlled by an external oscilla-
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651tor that overrides the internal oscillator (see General-
Purpose Input/Output). When using an external oscillator
(fOSC), calculate the Fan-Speed Register value with fCLK
equal to fOSC. Codes above F8h (1111 1000) are
allowed, but will not significantly decrease the frequency.
Configuration-Byte RegisterThe Configuration-Byte Register (Table 4) adjusts the
prescaler, changes the tachometer threshold voltage,
and sets the mode of operation. The three least-signifi-
cant bits configure the prescaler division used to scale
the tachometer period. Select the prescaler value so the
fan’s full speed is achieved with a register value of
approximately 64 (0100 0000) to optimize speed range
and resolution (see the Fan Speed Register section). The
fourth bit selects the fan operating voltage.
The fifth and sixth bits configure the operating mode.
The MAX6650/MAX6651 have four modes of operation:
full-on, full-off (shutdown), closed-loop, and open-loop.
In closed-loop operation, the external microcontroller
(µC) sets the desired speed by writing an 8-bit word to
the Fan-Speed Register (see the Fan-Speed Register
section). The MAX6650/MAX6651 monitor the fan’s
Table 2. Command-Byte AssignmentsCOUNT
SPEED0000 0000CONFIG0000 0010
READGPIO DEF0000 0100
0001 0110x
WRITE02hTachometer count time
FFh
0Ah
00h
POR (DEFAULT)
STATECOMMANDGPIO definition
REGISTERConfiguration
Fan speed
FUNCTIONDAC0000 0110xx00hDAC
ALARM ENABLE0000 1000xx00hAlarm enable
ALARM0000 1010x—00hAlarm status
TACH00000 1100x—00hTachometer 0 count
TACH10000 1110x—00hTachometer 1 count
TACH20001 0000x—00hTachometer 2 count
TACH30001 0010x—00hTachometer 3 count
GPIO STAT0001 0100x—1FhGPIO status
Table 3. Fan Speed 0000 00001.00000 00011.0
0000 00101.5
KSCALE (ms)
tTACH
KSCALEKTACH*
FAN SPEED (RPS)240—————
0001 1110163.9*32128
0001 1111164.01.031124
0010 0000174.2
20,000
30,000—————
30,000
0100 0000338.22.115.361.1—————
1111 1000125317.8415.9
KSCALE
FAN SPEED (RPM)
30,000
29,000
15,000
3830
16114161416*The minimum allowed tachometer period is 1ms.
across the fan until the desired speed is reached. Open-
loop operation allows the µC to regulate fan speed direct-
ly. The µC reads the fan speed from the Tach-
ometer-Count Register. Based on the tachometer
count, the µC decides if the fan speed requires adjust-
ment, and changes the voltage across the fan by writ-
ing an 8-bit word to the DAC Register. Full-on mode
applies the maximum voltage across the fan, forcing it
to spin at full speed. Configuring GPIO1 (see the
General-Purpose Input/Output section) as an active-low
input provides additional hardware control that fully
General-Purpose Input/OutputThe GPIO pins connect to the drain of the internal N-
channel MOSFET and pullup resistor (Figure 5). When
the N-channel MOSFET is off (Table 5), the pullup resis-
tor provides a logic-level high output. However, with the
MOSFET off, the GPIO may serve as an input pin and
its state is read from the GPIO Status Register (Table
6). The MAX6650/MAX6651 power up with the MOSFET
off, so input signals may be safely connected to the
GPIO pins. When using the GPIO pin as a general-pur-
pose output, change the output by writing to the GPIO
Definition Register.
GPIO0 may be configured as an ALERToutput that will
go low whenever a fault-condition is detected (see the
Alarm-Enable and Status Registers section). GPIO1
may be configured as a FULL ONinput to allow hard-
ware control to fully turn on the fan in case of software
or µC failure. GPIO2 (MAX6651 only) may be config-
ured as an internal clock output or as an external clock
input to allow synchronization of multiple devices.
Alarm-Enable and Status RegistersThe alarms are enabled only when the appropriate bits of
the Alarm-Enable Register are set (Table 7). The maxi-
mum and minimum output level alarms function only
when the device is configured to operate in the closed-
loop mode (see the Configuration-Byte Registersection).
The Alarm Status Register allows the system to deter-
mine which alarm caused the alert output (Table 8).
The set-alarm and alert outputs clear after reading the
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
Table 4. Configuration Byte RegisterFigure 5. General-Purpose Input/Output Structure
MAX6650
MAX6651
100kΩ
GPIO
STATUS
REGISTER
VCC
3.0V TO 5.5V
VCC
CBYPASS
GPIO_
GND
GPIO
DEFINITION
REGISTER
BITNAMEPOR (DEFAULT)
STATEFUNCTION5 to 4
7 (MSB) to 6—0Always 0
Operating Mode:
00 = Software full-on (default)
01 = Software off (shutdown)
10 = Closed-loop operation
11 = Open-loop operationMODE5/12V1
Fan/Tachometer Voltage:
0 = 5V
1 = 12V (default)
2 to 0 (LSB)SCALE010
Prescaler Division:
000 = Divide by 1
001 = Divide by 2
010 = Divide by 4 (default)
011 = Divide by 8
100 = Divide by 16
Alarm Status Register if the condition that caused the
alarm is removed.
TachometerThe Tachometer Count Registers record the number of
pulses on the corresponding tachometer input during the
period defined by the Tachometer Count-Time Register.
The MAX6651 contains three additional tachometer
inputs, which may be used to monitor additional fans. For
accurate control of multiple fans, use identical fans.
The Tachometer Count-Time Register sets the integration
time over which the MAX6650/MAX6651 count tachome-
ter pulses. The devices can count up to 255 (FFh) pulses
during the selected count time. If more than 255 pulses
occur, the IC sets the overflow alarm and the Tachometer
Count Register reports the maximum value of 255. Set
the time register so the count register will not overflow
under worst-case conditions (maximum fan speed) while
maximizing resolution. Calculate the maximum measur-
able fan speed and minimum resolution with the following
equations:
Max Fan Speed (in RPS) = 255 / (2 x tCOUNT)
Min Resolution (in RPS) = 1 / (2 x tCOUNT)
where tCOUNTis the tachometer count time; 1kHz is the
maximum allowable tachometer input frequency for the
MAX6650/MAX6651.
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
Table 5. GPIO Definition Register
Table 6. GPIO Status Register
BIT
POR
(DEFAULT)
STATE
MAX6650
PIN
MAX6651
PIN STATE FUNCTION GPIO4 outputs a logic-low level. 7 1 N/A
(must be 1) GPIO4 1 GPIO4 outputs a logic-high level or serves as an input. GPIO3 outputs a logic-low level. 6 1 N/A
(must be 1) GPIO3 1 GPIO3 outputs a logic-high level or serves as an input.
00 GPIO2 serves as an external clock input.
01 GPIO2 serves as an internal clock output.
10 GPIO2 outputs a logic-low level. 5:4 11 N/A
(must be 11) GPIO2
11 GPIO2 outputs a logic-high level or serves as an input.
00 GPIO1 outputs a logic-high level or serves as an input.
01 GPIO1 serves as a FULL ON input.
10 GPIO1 outputs a logic-low level. 3:2 11 GPIO1 GPIO1
11 GPIO1 outputs a logic-high level or serves as an input.
00 GPIO0 outputs a logic-high level or serves as an input.
01 GPIO0 serves as an ALERT output.
10 GPIO0 outputs a logic-low level. 1:0 11 GPIO0 GPIO0
11 GPIO0 outputs a logic-high level or serves as an input.
BIT NAME
POR
(DEFAULT
STATE) 7 (MSB) to 5Always 0 0 GPIO4 (MAX6651 only)1GPIO3 (MAX6651 only)1GPIO2 (MAX6651 only)1
1GPIO11
0 (LSB)GPIO01
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651
Table 8. Alarm Status Register Bit Assignments 7 (MSB) to 5
GPIO1
BITGPIO2 (MAX6651 only)
NAMEMIN
0 (LSB)
POR
(DEFAULT)
STATEMAX0
Always 0
Minimum Output Level Alarm
GPIO1 Alarm. Set when GPIO1 is low.
GPIO2 Alarm. Set when GPIO2 is low (MAX6651 only).
FUNCTIONMaximum Output Level Alarm
Tachometer Overflow Alarm2TACH0
The first 6 bits of the Tachometer Count-Time Register
are always zero, and the last 2 bits set the count time
(Table 9). The count time may be determined from the
following equation:
tCOUNT= 0.25s x 2KCOUNT
where KCOUNTis the numerical value of the two 2LSBs.
The 0.25 factor has a ±10% uncertainty.
Upon power-up, the Tachometer Count Registers reset
to 00h and the Tachometer Count-Time Register sets a
1s integration time.
Digital-to-Analog ConverterWhen using the open-loop mode of operation, the DAC
Register sets the voltage on the low side of the fan. An
internal operational amplifier compares the feedback
voltage (VFB) with the reference voltage set by the 8-bit
DAC, and adjusts the output voltage (VOUT) until the
two input voltages are equal. The voltage at the FB pin
may be determined by the following equation:
VFB= (10 x VREFx KDAC) / 256
and the voltage across the fan is:
where KDACis the numerical value of the DAC Register
and VREF= 1.5V. The minimum feedback voltage is
limited by the voltage drop across the external MOS-
FET (RONx IFAN), and the maximum voltage is limited
by the fan’s supplyvoltage (VFAN). For linear opera-kVFANDACREF– 901256+
Table 9. Tachometer Count-Time Register(Assumes two pulses per revolution)
1 = Alarm condition
REGISTER
VALUE
(KCOUNT)
COUNT
TIME
(s)
MAXIMUM
FAN SPEED
(RPS)
MINIMUM
RESOLUTION
(Hz/COUNT)0000 00000.2551222560.50000 0001
0000 00101.01280.5
0.25642.00000 0011
Table 7. Alarm-Enable Register Bit Masks7 (MSB) to 5
GPIO1
BITGPIO2 (MAX6651 only)
NAMEMIN
0 (LSB)
POR
(DEFAULT)
STATEMAX0TACH0
Always 0
Minimum Output Level Alarm Enable/Disable
GPIO1 Alarm Enable/Disable
GPIO2 Alarm Enable/Disable (MAX6651 only)
FUNCTIONMaximum Output Level Alarm Enable/Disable
Tachometer Overflow Alarm Enable/Disable
1 = Enabled
tion, use DAC values between 08h and B0h(see
Typical Operating Characteristics). When using the
closed-loop mode of operation, the contents of the
DAC Register are ignored. When writing to the DAC,
wait at least 500µs before attempting to read back.
Power-on Reset (POR)The MAX6650/MAX6651 have volatile memory. To pre-
vent ambiguous power-supply conditions from corrupt-
ing the data in the memory and causing erratic
behavior, a POR voltage detector monitors VCCand
clears the memory if VCCfalls below 1.6V. When power
is first applied and VCCrises above 1.6V, the logic
blocks begin operating (though reads and writes at
VCClevels below 3V are not recommended).
Power-up defaults include the following:
• All alarms are disabled.
• Prescale divider is set to 4.
• Fan speed is set in full-on mode.
See Table 2 for the default states of all registers.
Applications Information
MOSFET and Bipolar Transistor
SelectionThe MAX6650/MAX6651 drive an external N-channel
MOSFET that requires five important parameters for
proper selection: gate-to-source conduction threshold,
maximum gate-to-source voltage, drain-to-source
breakdown voltage, current rating, and drain-to-source
on-resistance (RDS(ON)). Gate-to-source conduction
threshold must be compatible with available VCC. The
maximum gate-to-source voltage and the drain-to-
source breakdown voltage rating should both be at
least a few volts higher than the fan supply voltage
(VFAN). Choose a MOSFET with a maximum continuous
drain current rating higher than the maximum fan cur-
rent. RDS(ON)should be as low as practical to maxi-
mize the feedback voltage range. Maximum power
dissipation in the power transistor can be approximat-
ed by P = (VFAN XIFAN(MAX)) / 4. Bipolar power transis-
tors are practical for driving small and midsize fans
(Figure 6). Very-high-current fans may require output
transistor base current greater than the MAX6650’s
50mA drive capability. Bipolar Darlington transistors
will work but have poor saturation characteristics and
could lose up to 2V to 3V of drive voltage.
Resistor SelectionThe tachometer input voltages (VTACH_) and feedback
voltage (VFB) cannot exceed 13.2V (see Absolute
Maximum Ratings). When using a fan powered by a
13.2V or greater supply (VFAN), protect these inputs
from overvoltage conditions with series resistors. The
resistance required to protect these pins may be calcu-
lated from the following equation:
RPROTECT= [(VFAN(MAX)- 13.2V) x RIN] / 13.2V
where VFAN(MAX)is the worst-case maximum supply
Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface
MAX6650/MAX6651MAX6650
VCC
SCL
10kΩ
SDA
GPIO0OUT
ADD
GND
TACH0
VCC
3V TO 5.5V
VFAN
5V OR 12V
CCOMP
10µF
SMBus/I2C
INTERFACE
GPIO1
FAN
FULL ON
ALERT
Figure 6. Fan Control with a Bipolar Transistor
