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MAX6316LUK26DY+T-MAX6316LUK29AX+T-MAX6316LUK29CY-MAX6316LUK29CY+T-MAX6316LUK46BX+T-MAX6316LUK46CY-MAX6316LUK46CY+T-MAX6320PUK29CY+T-MAX6320PUK29DY+
5-Pin µP Supervisory Circuits with Watchdog and Manual Reset
___________________________________________________________________Selector Guide
________________General DescriptionThe MAX6316–MAX6322 family of microprocessor (µP)
supervisory circuits monitors power supplies and
microprocessor activity in digital systems. It offers sev-
eral combinations of push/pull, open-drain, and bidirec-
tional (such as Motorola 68HC11) reset outputs, along
with watchdog and manual reset features. The Selector
Guidebelow lists the specific functions available from
each device. These devices are specifically designed
to ignore fast negative transients on VCC. Resets are
guaranteed valid for VCCdown to 1V.
These devices are available in 26 factory-trimmed reset
threshold voltages (from 2.5V to 5V, in 100mV incre-
ments), featuring four minimum power-on reset timeout
periods (from 1ms to 1.12s), and four watchdog timeout
periods (from 6.3ms to 25.6s). Thirteen standard ver-
sions are available with an order increment requirement
of 2500 pieces (see Standard Versionstable); contact
the factory for availability of other versions, which have
an order increment requirement of 10,000 pieces.
The MAX6316–MAX6322 are offered in a miniature
5-pin SOT23 package.
________________________ApplicationsPortable Computers
Computers
Controllers
Intelligent Instruments
Portable/Battery-Powered Equipment
Embedded Control Systems
____________________________FeaturesSmall 5-Pin SOT23 PackageAvailable in 26 Reset Threshold Voltages
2.5V to 5V, in 100mV IncrementsFour Reset Timeout Periods
1ms, 20ms, 140ms, or 1.12s (min)Four Watchdog Timeout Periods
6.3ms, 102ms, 1.6s, or 25.6s (typ) Four Reset Output Stages
Active-High, Push/Pull
Active-Low, Push/Pull
Active-Low, Open-Drain
Active-Low, BidirectionalGuaranteed Reset Valid to VCC= 1VImmune to Short Negative VCCTransientsLow CostNo External Components
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset19-0496; Rev 5; 9/02
_______________Ordering InformationThe MAX6318/MAX6319/MAX6321/MAX6322 feature two types of reset output on each device.
ELECTRICAL CHARACTERISTICS(VCC
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
VCC......................................................................-0.3V to +6V
RESET(MAX6320/MAX6321/MAX6322 only)...... -0.3V to +6V
All Other Pins.........................................-0.3V to (VCC+ 0.3V)
Input/Output Current, All Pins.............................................20mA
Continuous Power Dissipation (TA= +70°C)
SOT23-5 (derate 7.1mW/°C above +70°C)...............571mW
Operating Temperature Range............................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range..............................-65°C to +160°C
Lead Temperature (soldering, 10s).................................+300°C
Note 2:A factory-trimmed voltage divider programs the nominal reset threshold (VTH). Factory-trimmed reset thresholds are
available in 100mV increments from 2.5V to 5V (see Table 1 at end of data sheet).
Note 3:Guaranteed by design.
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
Note 4:This is the minimum time RESETmust be held low by an external pulldown source to set the active pullup flip-flop.
Note 5:Measured from RESETVOLto (0.8 x VCC), RLOAD= ∞.
Note 6:WDI is internally serviced within the watchdog period if WDI is left unconnected.
Note 7:The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is
designed for a three-stated-output device with a 10µA maximum leakage current and capable of driving a maximum capaci-
tive load of 200pF. The three-state device must be able to source and sink at least 200µA when active.
ELECTRICAL CHARACTERISTICS (continued)(VCC= 2.5V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
__________________________________________Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
______________________________________________________________Pin Description
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
_______________Detailed DescriptionA microprocessor’s (µP) reset input starts or restarts the
µP in a known state. The reset output of the MAX6316–
MAX6322 µP supervisory circuits interfaces with the
reset input of the µP, preventing code-execution errors
during power-up, power-down, and brownout condi-
tions (see the Typical Operating Circuit). The MAX6316/
MAX6317/MAX6318/MAX6320/MAX6321 are also capa-
ble of asserting a reset should the µP become stuck in
an infinite loop.
Reset OutputThe MAX6316L/MAX6318LH/MAX6319LH feature an
active-low reset output, while the MAX6317H/
MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP
feature an active-high reset output. RESETis guaran-
teed to be a logic low and RESET is guaranteed to be a
logic high for VCCdown to 1V.
The MAX6316–MAX6322 assert reset when VCCis below
the reset threshold (VRST), when MRis pulled low
(MAX6316_/MAX6317H/MAX6319_H/MAX6320P/
MAX6322HP only), or if the WDI pin is not serviced within
the watchdog timeout period (tWD). Reset remains assert-
ed for the specified reset active timeout period (tRP) after
VCCrises above the reset threshold, after MRtransitions
low to high, or after the watchdog timer asserts the reset
(MAX6316_/MAX6317H/MAX6318_H/MAX6320P/
MAX6321HP). After the reset active timeout period (tRP)
expires, the reset output deasserts, and the watchdog
timer restarts from zero (Figure 2).
Figure 1. Functional Diagram
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
Bidirectional RREESSEETT Output
The MAX6316M/MAX6318MH/MAX6319MH are designed
to interface with µPs that have bidirectional reset pins,
such as the Motorola 68HC11. Like an open-drain output,
these devices allow the µP or other devices to pull the
bidirectional reset (RESET) low and assert a reset condi-
tion. However, unlike a standard open-drain output, it
includes the commonly specified 4.7kΩpullup resistor
with a P-channel active pullup in parallel.
This configuration allows the MAX6316M/MAX6318MH/
MAX6319MH to solve a problem associated with µPs
that have bidirectional reset pins in systems where sev-
eral devices connect to RESET(Figure 3). These µPs
can often determine if a reset was asserted by an exter-
nal device (i.e., the supervisor IC) or by the µP itself
(due to a watchdog fault, clock error, or other source),
and then jump to a vector appropriate for the source of
the reset. However, if the µP does assert reset, it does
not retain the information, but must determine the
cause after the reset has occurred.
The following procedure describes how this is done in
the Motorola 68HC11. In all cases of reset, the µP pullsRESETlow for about four external-clock cycles. It then
releases RESET, waits for two external-clock cycles,
then checks RESET’s state. If RESETis still low, the µP
concludes that the source of the reset was external
and, when RESETeventually reaches the high state, it
jumps to the normal reset vector. In this case, stored-
state information is erased and processing begins from
scratch. If, on the other hand, RESETis high after a
delay of two external-clock cycles, the processor
knows that it caused the reset itself and can jump to a
different vector and use stored-state information to
determine what caused the reset.
A problem occurs with faster µPs; two external-clock
cycles are only 500ns at 4MHz. When there are several
devices on the reset line, and only a passive pullup resis-
tor is used, the input capacitance and stray capacitance
can prevent RESETfrom reaching the logic high state (0.8VCC) in the time allowed. If this happens, all resets will
be interpreted as external. The µP output stage is guaran-
teed to sink 1.6mA, so the rise time can not be reduced
considerably by decreasing the 4.7kΩinternal pullup
resistance. See Bidirectional Pullup Characteristics in the
Typical Operating Characteristics.
The MAX6316M/MAX6318MH/MAX6319MH overcome
this problem with an active pullup FET in parallel with the
4.7kΩresistor (Figures 4 and 5). The pullup transistor
holds RESEThigh until the µP reset I/O or the supervisory
circuit itself forces the line low. Once RESETgoes below
VPTH, a comparator sets the transition edge flip-flop, indi-
cating that the next transition for RESETwill be low to
high. When RESETis released, the 4.7kΩresistor pullsRESETup toward VCC. Once RESETrises above VPTH
but is below (0.85 x VCC), the active P-channel pullup
turns on. Once RESETrises above (0.85 x VCC) or the
2µs one-shot times out, the active pullup turns off. The
parallel combination of the 4.7kΩpullup and the