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MAX6314US25D1MAXIMN/a5282avai68HC11/Bidirectional-Compatible µP Reset Circuit
MAX6314US31D3+TN/AN/a2500avai68HC11/Bidirectional-Compatible µP Reset Circuit
MAX6314US31D4+T |MAX6314US31D4TMAXIMN/a2500avai68HC11/Bidirectional-Compatible µP Reset Circuit


MAX6314US25D1 ,68HC11/Bidirectional-Compatible µP Reset CircuitFeaturesThe MAX6314 low-power CMOS microprocessor (µP)♦ Small SOT143 Packagesupervisory circuit is ..
MAX6314US26D1-T ,68H11/bidirectional-compatible microprocessor reset circuit. Reset threshold(nom) 2.63V. Reset timeout period(min) 1ms.ApplicationsComputersControllersIntelligent InstrumentsCritical µP and µC Power MonitoringTypical O ..
MAX6314US26D4-T ,68H11/bidirectional-compatible microprocessor reset circuit. Reset threshold(nom) 2.63V. Reset timeout period(min) 1120ms.MAX6314*19-1090; Rev 1; 1/9968HC11/Bidirectional-Compatible µP Reset Circuit
MAX6314US28D4-T ,68HC11/Bidirectional-Compatible レP Reset CircuitApplicationsComputersControllersIntelligent InstrumentsCritical µP and µC Power MonitoringTypical O ..
MAX6314US29D1-T ,68HC11/Bidirectional-Compatible レP Reset CircuitFeaturesThe MAX6314 low-power CMOS microprocessor (µP)' Small SOT143 Packagesupervisory circuit is ..
MAX6314US30D4-T ,68HC11/Bidirectional-Compatible レP Reset CircuitMAX6314*19-1090; Rev 1; 1/9968HC11/Bidirectional-Compatible µP Reset Circuit
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MAX6314US25D1-MAX6314US31D3+T-MAX6314US31D4+T
68HC11/Bidirectional-Compatible µP Reset Circuit
General Description
The MAX6314 low-power CMOS microprocessor (µP)
supervisory circuit is designed to monitor power
supplies in µP and digital systems. The MAX6314’s
RESEToutput is bidirectional, allowing it to be directly
connected to µPs with bidirectional reset inputs, such
as the 68HC11. It provides excellent circuit reliability
and low cost by eliminating external components and
adjustments. The MAX6314 also provides a debounced
manual reset input.
This device performs a single function: it asserts a reset
signal whenever the VCCsupply voltage falls below a
preset threshold or whenever manual reset is asserted.
Reset remains asserted for an internally programmed
interval (reset timeout period) after VCChas risen above
the reset threshold or manual reset is deasserted.
The MAX6314 comes with factory-trimmed reset
threshold voltages in 100mV increments from 2.5V
to 5V. Preset timeout periods of 1ms, 20ms, 140ms,
and 1120ms (minimum) are also available. The device
comes in a SOT143 package.
For a µP supervisor with an open-drain reset pin, see
the MAX6315 data sheet.
________________________Applications

Computers
Controllers
Intelligent Instruments
Critical µP and µC Power Monitoring
Portable/Battery-Powered Equipment
Features
Small SOT143 PackageRESETOutput Simplifies Interface to
Bidirectional Reset I/Os
Precision Factory-Set VCCReset Thresholds:
100mV Increments from 2.5V to 5V
±1.8% Reset Threshold Accuracy at TA= +25°C±2.5% Reset Threshold Accuracy Over Temp.Four Reset Timeout Periods Available:
1ms, 20ms, 140ms, or 1120ms (minimum)
Immune to Short VCCTransients5µA Supply CurrentPin-Compatible with MAX811
MAX6314
68HC11/Bidirectional-Compatible
µP Reset Circuit

VCCRESET
GND
MAX6314
SOT143

TOP VIEW
Pin Configuration

MAX6314
VCC
VCC
GND
RESET
RESET
LASER-
TRIMMED
RESISTORS
VCC
4.7kΩ
68HC11**
**OR OTHER μC/μP WITH BIDIRECTIONAL RESET I/O PIN.
RESET
CIRCUITRYypical Operating Circuit
19-1090; Rev 2; 12/05
Ordering Information continued at end of data sheet.

Ordering Information
PART†NOMINAL
VTH (V)
MIN tRP
(ms)
TOP
MARK††

MAX6314US50D1-T5.001AA_ _
MAX6314US49D1-T4.901AB_ _
MAX6314US48D1-T4.801AC_ _
MAX6314US47D1-T4.701AD_ _
MAX6314US46D1-T4.631AE_ _
MAX6314US45D1-T4.501AF_ _
†The MAX6314 is available in a SOT143 package, -40°C to
+85°C temperature range.
††The first two letters in the package top mark identify the part,
while the remaining two letters are the lot tracking code.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
MAX6314
68HC11/Bidirectional-Compatible
µP Reset Circuit
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VCC= +2.5V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:
The MAX6314 monitors VCCthrough an internal, factory-trimmed voltage divider that programs the nominal reset threshold.
Factory-trimmed reset thresholds are available in 100mV increments from 2.5V to 5V (see Ordering and Marking Information).
Note 2:
This is the minimum time RESETmust be held low by an external pull-down source to set the active pull-up flip-flop.
Note 3:
Measured from RESETVOLto (0.8 x VCC), RLOAD= ∞.
VCC........................................................................-0.3V to +6.0V
All Other Pins..............................................-0.3V to (VCC+ 0.3V)
Input Current (VCC).............................................................20mA
Output Current (RESET)......................................................20mA
Rate of Rise (VCC)...........................................................100V/µs
Continuous Power Dissipation (TA= +70°C)
SOT143 (derate 4mW/°C above +70°C).......................320mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C= +25°C
VCC= 5.5V, no load= 0°C to +70°C
VTH> 4.0V
VCC= falling at 1mV/µs
MAX6314US_ _D1-T
VCC> 4.25V, ISINK= 3.2mA
CONDITIONS

VOLRESETOutput Voltage3263100MRPullup Resistance
VTH- 1.8%VTHVTH+ 1.8%VTHReset Threshold (Note 1)512ICC1.05.5VCCOperating Voltage Range
VCCSupply Current500MRto Reset Delay100MRGlitch Rejection1MRMinimum Input Pulse
0.8VILInput Threshold
ppm/°C60∆VTH/°CReset Threshold Tempco35VCCto Reset Delay1.42
tRPReset Timeout Period
UNITSMINTYPMAXSYMBOLPARAMETER

VIL
VIH
VIH
VCC= 3.6V, no load= -40°C to +85°C
VTH< 4.0V
MAX6314US_ _D3-T
MAX6314US_ _D2-T
MAX6314US_ _D4-T
VCC> 1.2V, ISINK= 0.5mA
VCC> 2.5V, ISINK= 1.2mA
VCC> 1.0V, ISINK= 80µA
VTH- 2.5%VTH+ 2.5%
0.3 x VCC
0.7 x VCC
0.3400tSTransition Flip-Flop Setup Time (Note 2)
VCC= 5V
VCC= 5V20RESETActive Pullup Current0.40.9Active Pullup Enable Threshold
VCC= 3V
3334.24.75.2RESETPullup Resistance
VCC= 5V666RESETOutput Rise Time
(Note 3)
CLOAD= 120pF
CLOAD= 250pF
CLOAD= 200pF
CLOAD= 400pF
MANUAL RESET INPUT

RESETINTERNAL PULLUP
MAX6314
68HC11/Bidirectional-Compatible
µP Reset Circuit
__________________________________________Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
4.7kΩ PULL-UP
2V/div
MAX6314 PULL-UP
2V/div
INPUT
5V/div
200ns/div
PULLUP CHARACTERISTICS

MAX6314-01
100pF
4.7kΩ
+5V
74HC05
74HC05VCC
GNDMR
100pF
+5V
RESET
MAX6314
SUPPLY CURRENT vs. TEMPERATURE

MAX6314-02
TEMPERATURE (°C)
SUPPLY CURRENT (
VCC = 5V
VCC = 3V
VCC = 1V135
SUPPLY CURRENT
vs. SUPPLY VOLTAGE

MAX6314-03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
TA = -40°C
TA = +25°C
TA = +85°C
POWER-DOWN RESET DELAY
vs. TEMPERATURE
MAX6314-04
TEMPERATURE (°C)
POWER-DOWN RESET DELAY (
VCC FALLING AT 1mV/μs
VTH = 4.63V
VTH = 3.00V
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE (VCC RISING)
MAX6314-05
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT PERIOD
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE (VCC FALLING)
MAX6314-06
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
MAXIMUM TRANSIENT DURATION
vs. RESET COMPARATOR OVERDRIVE
MAX6314-07
RESET COMP. OVERDRIVE, VTH - VCC (mV)
MAXIMUM TRANSIENT DURATION (
TA = +25°C
RESET OCCURS
ABOVE CURVE
VTH = 4.63V
VTH = 3.00V
RESET PULLUP TIME
vs. TEMPERATURE
MAX6314-08
TEMPERATURE (°C)
RESET PULL-UP-TIME (ns)
CL = 390pF
CL = 100pF
Figure 1. Functional Diagram
MAX6314
68HC11/Bidirectional-Compatible
µP Reset Circuit
______________________________________________________________Pin Description

Supply Voltage and Reset Threshold Monitor InputVCC4
Manual Reset Input. A logic low on MRasserts reset. Reset remains asserted as long as MRis low, and for
the reset timeout period (tRP) after the reset conditions are terminated. Connect to VCCif not used.MR3
PIN

Active-Low Complementary Output. In addition to the normal n-channel pulldown, RESEThas a p-channel
pullup transistor in parallel with a 4.7kΩresistor to facilitate connection to µPs with bidirectional resets. See
the Reset Output section.
RESET2
GroundGND1
FUNCTIONNAME

VCC
MAX6314
LASER-
TRIMMED
RESISTORS
VREFVCC
63kΩRESET
GENERATOR
2μs ONE-SHOT
TRANSITION
FLIP-FLOP
VCC
4.7kΩ
RESET
ACTIVE PULLUP
ENABLE COMPARATOR
0.5V
GND
MAX6314
68HC11/Bidirectional-Compatible
µP Reset Circuit
Detailed Description

The MAX6314 has a reset output consisting of a 4.7kΩ
pull-up resistor in parallel with a P-channel transistor
and an N-channel pull down (Figure 1), allowing this IC
to directly interface with microprocessors (µPs) that
have bidirectional reset pins (see the Reset Output
section).
Reset Output

A µP’s reset input starts the µP in a known state. The
MAX6314 asserts reset to prevent code-execution
errors during power-up, power-down, or brownout
conditions. RESETis guaranteed to be a logic low for
VCC> 1V (see the Electrical Characteristics table).
Once VCCexceeds the reset threshold, the internal
timer keeps reset asserted for the reset timeout period
(tRP); after this interval RESETgoes high. If a brownout
condition occurs (monitored voltage dips below its pro-
grammed reset threshold), RESETgoes low. Any time
VCCdips below the reset threshold, the internal timer
resets to zero and RESETgoes low. The internal timer
starts when VCCreturns above the reset threshold, and
RESETremains low for the reset timeout period.
The MAX6314’s RESEToutput is designed to interface
with µPs that have bidirectional reset pins, such as the
Motorola 68HC11. Like an open-drain output, the
MAX6314 allows the µP or other devices to pull RESET
low and assert a reset condition. However, unlike a
standard open-drain output, it includes the commonly
specified 4.7kΩpullup resistor with a P-channel active
pullup in parallel.
This configuration allows the MAX6314 to solve a prob-
lem associated with µPs that have bidirectional reset
pins in systems where several devices connect to
RESET. These µPs can often determine if a reset was
asserted by an external device (i.e., the supervisor IC)
or by the µP itself (due to a watchdog fault, clock error,
or other source), and then jump to a vector appropriate
for the source of the reset. However, if the µP does
assert reset, it does not retain the information, but must
determine the cause after the reset has occurred.
The following procedure describes how this is done
with the Motorola 68HC11. In all cases of reset, the µP
pulls RESETlow for about four E-clock cycles. It then
releases RESET, waits for two E-clock cycles, then
checks RESET’s state. If RESETis still low, the µP con-
cludes that the source of the reset was external and,
when RESETeventually reaches the high state, jumps
to the normal reset vector. In this case, stored state
information is erased and processing begins from
scratch. If, on the other hand, RESETis high after the
two E-clock cycle delay, the processor knows that it
caused the reset itself and can jump to a different vec-
tor and use stored state information to determine what
caused the reset.
The problem occurs with faster µPs; two E-clock cycles
is only 500ns at 4MHz. When there are several devices
on the reset line, the input capacitance and stray
capacitance can prevent RESETfrom reaching the
logic-high state (0.8 x VCC) in the allowed time if only a
passive pullup resistor is used. In this case, all resets
will be interpreted as external. The µP is guaranteed to
sink only 1.6mA, so the rise time cannot be much
reduced by decreasing the recommended 4.7kΩ
pullup resistance.
The MAX6314 solves this problem by including a pullup
transistor in parallel with the recommended 4.7kΩresis-
tor (Figure 1). The pullup resistor holds the output high
until RESETis forced low by the µP reset I/O, or by the
MAX6314 itself. Once RESETgoes below 0.5V, a com-
parator sets the transition edge flip-flop, indicating that
the next transition for RESETwill be low to high. As
soon as RESETis released, the 4.7kΩresistor pulls
RESETup toward VCC. When RESETrises above 0.5V,
the active p-channel pullup turns on for the 2µs
duration of the one-shot. The parallel combination of the
4.7kΩpullup and the p-channel transistor on-
resistance quickly charges stray capacitance on the
reset line, allowing RESETto transition low to high with-
in the required two E-clock period, even with several
devices on the reset line (Figure 2). Once the one-shot
times out, the p-channel transistor turns off. This
process occurs regardless of whether the reset was
caused by VCCdipping below the reset threshold, MR
being asserted, or the µP or other device asserting
RESET. Because the MAX6314 includes the standard
4.7kΩpullup resistor, no external pullup resistor is
required. To minimize current consumption, the internal
pullup resistor is disconnected whenever the MAX6314
asserts RESET.
Manual Reset Input

Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts reset. Reset remains asserted while MRis low,
and for the reset active timeout period after MRreturns
high. To minimize current consumption, the internal
4.7kΩpullup resistor on RESETis disconnected
whenever RESETis asserted.
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