MAX5981AETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated Power MOSFETfeatures an LED driver that is auto-matically activated during sleep mode. During sleep PIN- SLEEP ..
MAX5981BETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated Power MOSFETELECTRICAL CHARACTERISTICS(V = (V - V ) = 48V, R = 24.9kω, R = 615ω, and R = 60.4kω. RTN, WAD, PG, ..
MAX5982AETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated 70W High-Power MOSFETFeaturesS Sleep Mode and Ultra-Low-Power Sleep The MAX5982A/MAX5982B/MAX5982C provide a com-(MAX598 ..
MAX5982BETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated 70W High-Power MOSFETApplicationsThe devices detect the presence of a wall adapter power IEEE 802.3af/at Powered Devices ..
MAX5984AETI+ ,Single-Port, 40W, IEEE 802.3af/at PSE Controller with Integrated MOSFETApplications)PoE Repeaters PSE OUTPUTSwitches/RoutersAGNDIndustrial Automation EquipmentV-54V EEOUT ..
MAX6001EUR ,Low-Cost, Low-Power, Low-Dropout, SOT23-3 Voltage ReferencesMAX6001–MAX600513-1395; Rev 1; 4/99Low -Cost, Low -Pow er, Low -Dropout, SOT23-3 Voltage References
MAZ8200G ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaParameter Symbol Rating UnitRepetitive peak forward current I 20 ..
MAZ8200-H ,Silicon planar typeFeatures•Extremely low noise voltage caused from the diode (2.4V to 39V,1/3 to 1/10 of our conventi ..
MAZ8200-L ,Silicon planar typeelectrical characteristicsZ Zwithin part numbersReverse current I V ··············· Specified value ..
MAZ8200-M ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8220-H ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8220-L ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAX5981AETE+-MAX5981BETE+
IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated Power MOSFET
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
General Description
The MAX5981 provides a com plete interface for a pow-
ered device (PD) to comply with the IEEE® 802.3af/at
standard in a power-over-ethernet (PoE) system. The
MAX5981 provides the PD with a detection signature,
classifica tion signature, and an integrated isolation
power switch with inrush current control. During the
inrush period, the MAX5981 limits the current to less
than 180mA before switching to the higher cur rent limit
(720mA to 880mA) when the isolation power MOSFET is
fully enhanced. The device features an input UVLO with
wide hysteresis and long deglitch time to compensate for
twisted-pair cable resistive drop and to assure glitch-free
transition during power-on/-off condi tions. The MAX5981
can with stand up to 100V at the input.
The MAX5981 supports a 2-Event classification method
as specified in the IEEE 802.3at standard and provides a
signal to indicate when probed by a Type 2 power sourc-
ing equipment (PSE). The device detects the presence
of a wall adapter power source connection and allows
a smooth switch over from the PoE power source to the
wall power adapter.
The MAX5981 also provides a power-good (PG) signal,
two-step current limit and fold back, overtemperature
protection, and di/dt limit. A sleep mode feature in
the MAX5981 provides low power consumption while
supporting Maintain Power Signature (MPS). An ultra-
low-power sleep mode feature in the MAX5981 further
reduces power consump tion while still supporting MPS.
The MAX5981 also features an LED driver that is auto-
matically activated during sleep mode. During sleep
mode, the LED driver sources a peri odic current (ILED) at
250Hz (MAX5981A) or 15.625kHz (MAX5981B).
The MAX5981 is available in a 16-pin, 5mm x 5mm TQFN
power package. The device is rated over the -40°C to
+85°C extended temperature range.
FeaturesSleep Mode and Ultra-Low PowerIEEE 802.3af/at Compliant2-Event Classification or an External Wall Adapter
Indicator OutputSimplified Wall Adapter InterfacePoE Classification 0–5100V Input Absolute Maximum RatingInrush Current Limit of 180mA MaximumCurrent Limit During Normal Operation Between
720mA and 880mACurrent Limit and FoldbackLegacy UVLO at 36VLED Driver with Programmable LED CurrentOvertemperature ProtectionThermally Enhanced, 5mm x 5mm, 16-Pin TQFN
Applications
IEEE 802.3af/at Powered Devices
IP Phones, Wireless Access Nodes, IP Security
Cameras
WiMAXK Base Stations
19-5732; Rev 2; 8/11
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Ordering Information
WiMAX is a trademark of WiMAX Forum.
IEEE is a registered service mark of the Institute of Electrical
PARTTEMP RANGEPIN-
PACKAGE
SLEEP
MODE
MAX5981AETE+-40NC to +85NC16 TQFN-EP*Yes
MAX5981BETE+-40NC to +85NC16 TQFN-EP*Yes
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
VDD to VSS ..........................................................-0.3V to +100V
DET, RTN, WAD, PG, 2EC to VSS .......................-0.3V to +100V
CLS, SL, WK, ULP, LED to VSS ...............................-0.3V to +6V
Maximum Current on CLS (100ms maximum) .................100mA
Continuous Power Dissipation (TA = +70NC) (Note 1)TQFN (derate 28.6mW/NC above +70NC)Multilayer Board .....................................................2285.7mW
Package Thermal Resistance (Note 2)BJA ...............................................................................35NC/WBJC .............................................................................2.7NC/W
Operating Temperature Range ..........................-40NC to +85NC
Maximum Junction Temperature .....................................+150NC
Storage Temperature Range ............................-65NC to +150NC
Lead Temperature (soldering, 10s) .............................. +300NC
Soldering Temperature ................................................. +260NC
ELECTRICAL CHARACTERISTICS
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
ABSOLUTE MAXIMUM RATINGS
Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 specifications.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DETECTION MODE
Input Offset CurrentIOFFSETVIN = 1.4V to 10.1V (Note 4)10FA
Effective Differential Input
ResistancedRVIN = 1.4V up to 10.1V with 1V step,
VDD = RTN = WAD = PG = 2EC (Note 5)23.9525.0025.50kI
CLASSIFICATION MODE
Classification Disable
ThresholdVTH,CLSVIN rising (Note 6)22.022.823.6V
Classification Stability Time0.2ms
Classification CurrentICLASS
VIN = 12.5V to
20.5V, VDD =
RTN = WAD =
PG = 2EC
Class 0, RCLS = 619I03.96
Class 1, RCLS = 117I9.1211.88
Class 2, RCLS = 66.5I17.219.8
Class 3, RCLS = 43.7I26.329.7
Class 4, RCLS = 30.9I36.443.6
Class 5, RCLS = 21.3I52.763.3
TYPE 2 (802.3at) CLASSIFICATION MODE
Mark Event ThresholdVTHMVIN falling10.110.711.6V
Hysteresis on Mark Event
Threshold0.84V
Mark Event CurrentIMARKVIN falling to enter mark event, 5.2V P VIN
P 10.1V0.250.85mA
Reset Event ThresholdVTHRVIN falling2.845.2V
POWER MODE
VIN Supply Voltage Range60V
VIN Supply CurrentIQ0.270.55mA
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
ELECTRICAL CHARACTERISTICS (continued)
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
VIN Turn-On VoltageVONVIN rising34.335.436.6V
VIN Turn-Off VoltageVOFFVIN falling30V
VIN Turn-On/-Off HysteresisVHYST_
UVLO(Note 7)4.2V
VIN Deglitch TimetOFF_DLYVIN falling from 40V to 20V (Note 8)30120Fs
Inrush to Operating Mode
DelaytDELAYtDELAY = minimum PG current pulse width
after entering into power mode 8796105ms
Isolation Power MOSFET
On-ResistanceRON_ISOIRTN = 600mA
TJ = +25NC0.50.7TJ = +85NC0.651
TJ = +125NC0.8
RTN Leakage CurrentIRTN_LKGVRTN = 12.5V to 30V10FA
CURRENT LIMIT
Inrush Current LimitIINRUSHDuring initial turn-on period,
VRTN = 1.5V90135180mA
Current Limit During Normal
OperationILIMAfter inrush completed,
VRTN = 1V720800880mA
Foldback Threshold VRTN (Note 9)1316.5V
LOGIC
WAD Detection ThresholdVWAD-REFVWAD rising, VIN = 14V to 48V (referenced
to RTN)8910V
WAD Detection Threshold
Hysteresis
VWAD falling, VRTN = 0V, VSS
unconnected0.725V
WAD Input CurrentIWAD-LKGVWAD = 10V (referenced to RTN)3.5FA
2EC Sink CurrentV2EC = 3.5V (referenced to RTN), VSS
disconnected11.52.25mA
2EC Off-Leakage CurrentV2EC = 48V 1FA
PG Sink CurrentVRTN = 1.5V, VPG = 0.8V, during inrush
period125230375FA
PG Off-Leakage CurrentVPG = 60V1FA
SLEEP MODE
WK and ULP Logic Threshold VTHVWK falling and VULP rising and falling 1.53V
SL Logic Threshold Falling0.750.80.85V
SL CurrentRSL = 0I140FA
LED Current AmplitudeILED
RSL = 60.4kI, VLED = 3.5V1010.511.5RSL = 30.2kI, VLED = 3.75V19.520.922.5
RSL = 30.2kI, VLED = 4V19
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
ELECTRICAL CHARACTERISTICS (continued)
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
Note 3: All devices are 100% production tested at TA = +25NC. Limits over temperature are guaranteed by design.
Note 4: The input offset current is illustrated in Figure 1.
Note 5: Effective differential input resistance is defined as the differential resistance between VDD and VSS. See Figure 1.
Note 6: Classification current is turned off whenever the device is in power mode.
Note 7: UVLO hysteresis is guaranteed by design, not production tested.
Note 8: A 20V glitch on input voltage, which takes VDD below VON shorter than or equal to tOFF_DLY does not cause the
MAX5981A/MAX5981B to exit power-on mode.
Note 9: In power mode, current-limit foldback is used to reduce the power dissipation in the isolation MOSFET during an overload
condition across VDD and RTN.
Figure 1. Effective Differential Input Resistance/Offset Current
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LED Current Programmable
Range1020mA
LED Current with Grounded SLVSL = 0V20.524.528.5mA
LED Current FrequencyfILEDNormal and ULP sleep
mode
MAX5981A250Hz
MAX5981B15.625kHz
LED Current Duty CycleDILEDNormal and ULP sleep mode25%
VDD Current AmplitudeIVDDNormal sleep mode, VLED = 3.5V101112mA
Internal Current Duty CycleDIVDDNormal and ULP sleep modes75%
Internal Current Enable TimetMPSULP sleep mode 768492ms
Internal Current Disable TimetMPDOULP sleep mode 205228250ms
THERMAL SHUTDOWN
Thermal-Shutdown ThresholdTSDTJ rising+140NC
Thermal-Shutdown HysteresisTJ falling28NC
IIN
IINi + 1
IINi
IOFFSET
dRiVINiVINi + 1
IOFFSET = IINi - VINi
dRi
dRi = (VINi + 1 - VINi) = 1V (IINi + 1 - IINi) (IINi + 1 - IINi)
VIN
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
Typical Operating Characteristics
(VIN = (VDD - VSS) = 54V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected; all
voltages are referenced to VSS.)
DETECTION CURRENT
vs. INPUT VOLTAGE
MAX5981 toc01
VIN (V)
IIN
(mA)642
IIN = IVDD + IDET
RDET = 25.4kI
RTN = 2EC = PG = WAD = VDD
-40°C P TA P +85NC
SIGNATURE RESISTANCE
vs. INPUT VOLTAGE
SIGNATURE
(k642
MAX5981 toc02
VIN (V)
IIN = IVDD + IDET
RDET = 24.9kI
RTN = 2EC = PG = WAD = VDD
TA = -40NC
TA = +85NC
TA = +25NC
INPUT OFFSET CURRENT
vs. INPUT VOLTAGE
INPUT OFFSET CURRENT (64210
MAX5981 toc03
VIN (V)
TA = +85NC
TA = -40NC
TA = +25NC
CLASSIFICATION CURRENT vs.
INPUT VOLTAGE
MAX5981 toc04
VIN (V)
IIN
(mA)201510530
CLASS 5
CLASS 4
CLASS 3
CLASS 2
CLASS 1
CLASS 0
CLASSIFICATION SETTLING TIME
MAX5981 toc05
VIN
10V/div
IIN
200mA/div
VCLS
1V/div
100Fs/div
RCLS = 30.9I
2EC SINK CURRENT vs. 2EC VOLTAGE
I2EC
(mA)40302010
MAX5981 toc06
VSS FLOATING
V2EC REFERENCED TO RTN
VWAD = 14V
TA = -40NC
TA = +85NC
TA = +25NC
PG SINK CURRENT vs. PG VOLTAGE
IPG40302010
MAX5981 toc07
TA = -40NC
TA = +85NC
TA = +25NC
INRUSH CURRENT LIMIT
vs. RTN VOLTAGE
MAX5981 toc08
INRUSH CURRENT LIMIT (mA)40302010
15060
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
Typical Operating Characteristics (continued)
(VIN = (VDD - VSS) = 54V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected; all
voltages are referenced to VSS.)
INRUSH CONTROL WAVEFORM WITH
TYPE 2 CLASSIFICATION
MAX5981 toc10
VRTN
50V/div
IRTN
100mA/div
VDD
50V/div
VPG
10V/div
V2EC
40V/div
20ms/div
USING TYPICAL APPLICATION CIRCUIT
2EC PULLED UP TO VDD WITH 10kI
INRUSH CONTROL WAVEFORM WITH
TYPE 2 CLASSIFICATION
MAX5981 toc11
VPG
10V/div0V
VRTN
50V/div
IRTN
200mA/div
VDD
50V/div
20ms/div
V2EC
40V/div
USING TYPICAL APPLICATION CIRCUIT
2EC PULLED UP TO VDD WITH 10kI
LED CURRENT vs. RSL
RSL (kI)
ILED
(mA)55504540353025201510565
MAX5981 toc12
-40NC < TA < +85NC
LED CURRENT vs. LED VOLTAGE
ILED
(mA)
MAX5981 toc13
RSL = 60.4kI
RSL = 30.2kI
NORMAL OPERATION CURRENT LIMIT
vs. RTN VOLTAGE
MAX5981 toc09
VRTN (V)
CURRENT LIMIT (mA)40102030
10060
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
Pin Description
PINNAMEFUNCTIONN.C.No Connection. Not internally connected.VDD Positive Supply Input. Connect a 68nF (min) bypass capacitor between VDD and VSS.DETDetection Resistor Input. Connect a signature resistor (RDET = 24.9kI) from DET to VDD. I.C.Internally Connected. Leave unconnected.
5, 6VSSNegative Supply Input. VSS connects to the source of the integrated isolation n-channel power MOSFET.
7, 8RTN
Drain of Isolation MOSFET. RTN connects to the drain of the integrated isolation n-channel power
MOSFET. Connect RTN to the downstream DC-DC converter ground as shown in the Typical Application
Circuit.WAD
Wall Power Adapter Detector Input. Wall adapter detection is enabled the moment VDD - VSS crosses
the mark event threshold. Detection occurs when the voltage from WAD to RTN is greater than 9V. When
a wall power adapter is present, the isolation n-channel power MOSFET turns off, 2EC current sink turns
on. Connect WAD directly to RTN when the wall power adapter or other auxiliary power source is not
used. PG
Open-Drain Power-Good Indicator Output. PG sinks 230FA to disable the downstream DC-DC converter
while turning on the hot-swap MOSFET switch. PG current sink is disabled during detection, classifica-
tion, and in the steady-state power mode. The PG current sink is turned on to disable the downstream
DC-DC converter when the device is in sleep mode.
Pin Configuration
RTN
EP*
LED6
VDD1513
DET
I.C.
CLS
2EC
WAD
MAX5981A
MAX5981B
RTN
N.C.
TQFN
ULPWKSL
CONNECT TO VSS.
TOP VIEW
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
MAX5981A/MAX5981B
Pin Description (continued)
PINNAMEFUNCTION2EC
2-Event Classification Detect or Wall Adapter Detect Output. A 1.5mA current sink is enabled at 2EC
when a Type 2 PSE or a wall adapter is detected. When powered by a Type 2 PSE, the 2EC current
sink is enabled after the isolation MOSFET is fully on until VIN drops below the UVLO threshold. 2EC is
latched when powered by a Type 2 PSE until VIN drops below the reset threshold. 2EC also asserts
when a wall adapter supply, typically greater than 9V, is applied between WAD and RTN. 2EC is not
latched if asserted by WAD. The 2EC current sink is turned off when the device is in sleep mode.CLS
Classification Resistor Input. Connect a resistor (RCLS) from CLS to VSS to set the desired classification
current. See the classification current specifications in the Electrical Characteristics table to find the resistor
value for a particular PD classification.LEDLED Driver Output. During sleep mode, LED sources a periodic current (ILED). The amplitude of ILED is
set by RSL according to the formula ILED (in A) = 645.75/(RSL + 1200).SLSleep Mode Enable Input. A falling edge on SL brings the device into sleep mode (VSL must drop below
0.75V). An external resistor (RSL) connected between SL and VSS sets the LED current (ILED).WKWake Mode Enable Input. WK has an internal 2.5kI pullup resistor to the internal 5V bias rail. A falling
edge on WK brings the device out of sleep mode and into the normal operating mode (wake mode). ULP
Ultra-Low-Power Enable Input (in Sleep Mode). ULP has an internal 50kI pullup resistor to the internal
5V bias rail. A falling edge on SL while ULP is asserted low enables ultra-low-power mode. When ultra-
low-power mode is enabled, the power consumption of the device is reduced even lower than normal
sleep while still supporting MPS. EP
Exposed Pad. Do not use EP as an electrical connection to VSS. EP is internally connected to VSS
through a resistive path and must be connected to VSS externally. To optimize power dissipation, solder
the exposed pad to a large copper power plane.
