MAX5550ETE-MAX5550ETE+ Fast Delivery |IC PHOENIX CO.,LIMITED

MAX5550ETE+ ,Dual, 10-Bit, Programmable, 30mA High-Output-Current DACELECTRICAL CHARACTERISTICS(V = +2.7V to +5.25V, GND = 0, V = +1.25V, internal reference, R = 20kΩ ; ..
MAX5556ESA ,Low-Cost Stereo Audio DACApplications● Digital Video Recorders and Media Servers● Set-Top Boxes● Video-Game HardwareTypical ..
MAX5556ESA+ ,Low-Cost Stereo Audio DACElectrical Characteristics(V = +4.75V to +5.5V, V = 0V, R _ = 10kΩ, C _ = 10pF, 0dBFS sine-wave sig ..
MAX555CQK ,300Msps, 12-Bit DAC with Complementary Voltage OutputsELECTRICAL CHARACTERISTICS(AV = DV = -5.2V, V = 1.000V, T to T = 0°C to +70°C, unless otherwise not ..
MAX5580AEUP ,Buffered / Fast-Settling / Quad / 12-/10-/8-Bit / Voltage-Output DACsApplicationsINLOUTPUT BUFFER RESOLUTIONPortable InstrumentationPART (LSBCONFIGURATION (BITS)Automat ..
MAX5580BEUP ,+2.7 to +5.25 V, buffered, fast-settling, quad, 12-bit, voltage-output DACFeaturesThe MAX5580–MAX5585 quad, 12-/10-/8-bit, voltage- ♦ 3µs (max) 12-Bit Settling Time to 0.5 L ..
MAZ3200 ,Small-signal deviceElectrical characteristics within part numbers T = 25°Ca• V = 2.0 V to 8.2 V (I = 5 mA)Z ZTemperat ..
MAZ3200-M ,Silicon planar typeZener DiodesMAZ3000 SeriesSilicon planar typeUnit : mm+ 0.22.8 − 0.3For stabilization of power supp ..
MAZ8024 ,Small-signal deviceelectrical characteristicswithin part numbersReverse current I V Specified value µ AR R*3Temperatur ..
MAZ8027-H ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAZ8027-L ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8030-H ,Silicon planar typeelectrical characteristicsZ Zwithin part numbersReverse current I V ··············· Specified value ..

MAX5550ETE-MAX5550ETE+
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC
General Description
The MAX5550 dual, 10-bit, digital-to-analog converter
(DAC) features high-output-current capability. The
MAX5550 sources up to 30mA per DAC, making it ideal
for PIN diode biasing applications. Outputs can also be
paralleled for high-current applications (up to 60mA
typ). Operating from a single +2.7V to +5.25V supply,
the MAX5550 typically consumes 1.5mA per DAC in
normal operation and less than 1µA (max) in shutdown
mode. The MAX5550 also features low output leakage
current in shutdown mode (±1µA max) that is essential
to ensure that the external PIN diodes are off.
Additional features include an integrated +1.25V
bandgap reference, and a control amplifier to ensure
high accuracy and low-noise performance. A separate
reference input (REFIN) allows for the use of an external
reference source, such as the MAX6126, for improved
gain accuracy. A pin-selectable I2C-/SPI™-compatible
serial interface provides optimum flexibility for the
MAX5550. The maximum programmable output current
value is set using software and an adjustment resistor.
The MAX5550 is available in a (3mm x 3mm) 16-pin thin
QFN package, and is specified over the extended
(-40°C to +85°C) temperature range.
Applications
PIN Diode Biasing
RF Attenuator Control
VCO Tuning
FeaturesPin-Selectable I2C- or SPI-Compatible InterfaceGuaranteed Low Output Leakage Current in
Shutdown (±1µA max)Guaranteed Monotonic over Extended
Temperature RangeDual Outputs for Balanced SystemsCurrent Outputs Source Up to 30mA per DACParallelable Outputs for 60mA ApplicationsOutput Stable with RF FiltersInternal or External Reference CapabilityDigital Output (DOUT) Available for Daisy
Chaining in SPI Mode+2.7V to +5.25V Single-Supply Operation16-Pin (3mm x 3mm) Thin QFN PackageProgrammable Output Current Range Set by
Software and Adjustment Resistor
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
Ordering Information
19-3871; Rev 2; 5/06
EVALUATION KIT
AVAILABLE
PARTPIN-PACKAGEPKG
CODE
TOP
MARKAX 5550E TE 16 Thi n Q FN - E P *T1633F-3ACZ
SPI is a trademark of Motorola, Inc.
+1.25V
REF
REFIN
BUFFER
10-BIT CURRENT-STEERING
DAC A
OUTA
VDD
FSADJA
VDD
OUTB
FSADJB
GNDDOUT/A1CS/A0DIN/SDASCLK/SCL
SPI/I2C16-BIT INPUT REGISTER
DAC REGISTER ADAC REGISTER B
10-BIT CURRENT-STEERING
DAC B
MAX5550
Functional Diagram
Pin Configuration appears at end of data sheet.
*EP = Exposed paddle.
Note:Device is specified over the -40°C to +85°C operating
range.
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND .............................................................-0.3V to +6V
OUTA, OUTB to GND.................................-0.3V to (VDD+ 0.3V)
REFIN, CS/AO, DOUT/AI, SPI/I2C, FSADJA,
FSADJB to GND......................................-0.3V to (VDD+ 0.3V)
SCLK/SCL, DIN/SDA................................................-0.3V to +6V
Continuous Power Dissipation (TA= +85°C)
16-Pin Thin QFN (derate 17.5mW/°C above +70°C)..1398.6mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
ELECTRICAL CHARACTERISTICS
(VDD= +2.7V to +5.25V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ; compliance voltage = (VDD- 0.6V),
VSCLK/SCL= 0, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +3.0V and TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC PERFORMANCE—ANALOG SECTION
Resolution10Bits
Integral NonlinearityINLIOUT_ = 1mA to 30mA (Note 2)±2LSB
Differential NonlinearityDNLGuaranteed monotonic±1LSB
OffsetIOS-50-16LSB
Zero-Scale ErrorIOUT_ = 1mA to 30mA, code = 0x0001µA
Full-Scale ErrorIOUT_ = 1mA to 30mA, code = 0x3FF,
includes offset-16LSB
REFERENCE
Internal Reference Range1.211.251.29V
Internal Reference Tempco30ppm/°C
External Reference Range0.51.5V
External Reference Input Current108225µA
DAC OUTPUTS
Full-Scale Current(Note 3)130mA
Output Current Leakage in
Shutdown±1µA
Output Capacitance10pF
IOUT_ = 30mA1
TA = +25°C0.55Current Source Dropout Voltage
(VDD - VOUT_)IOUT_ = 20mATA = -40°C to +85°C0.6
Output Impedance at Full-Scale
Current100kΩ
Capacitive Load to GroundCLOAD10nF
Series Inductive LoadLLOAD100nH
Maximum FSADJ_ Capacitive
LoadCFSADJ_75pF
DYNAMIC PERFORMANCE
Settling TimetSCLOAD = 24pF, LLOAD = 27nH (Note 4)30µs
Digital Feedthrough2nVs
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +2.7V to +5.25V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ; compliance voltage = (VDD- 0.6V),
VSCLK/SCL= 0, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +3.0V and TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Digital-to-Analog Glitch Impulse40nVs
DAC-to-DAC Current Matching2%
VDD = +3V400Wake-Up TimeVDD = +5V10µs
POWER SUPPLIES
Supply VoltageVDD+2.70+5.25V
Supply CurrentIDDVDD = +5.25V, no load36mA
Shutdown Current1.2µA
LOGIC AND CONTROL INPUTS
+2.7V ≤ VDD ≤ +3.4V0.7 x
VDDInput High Voltage (Note 5)VIH
+3.4V < VDD ≤ +5.25V2.4
Input Low VoltageVIL(Note 5)0.8V
Input HysteresisVHYS0.1 x
VDDV
Input CapacitanceCIN10pF
Input Leakage CurrentIIN±1µA
Output Low VoltageVOLISINK = 3mA0.6V
Output High VoltageVOHISOURCE = 2mAVDD -
0.5V
I2C TIMING CHARACTERISTICS (Figure 2)
SCL Clock FrequencyfSCL400kHz
Setup Time for START ConditiontSU:STA600ns
Hold Time for START ConditiontHD:STA600ns
SCL Pulse-Width LowtLOW130ns
SCL Pulse-Width HightHIGH600ns
Data Setup TimetSU:DAT100ns
Data Hold TimetHD:DAT070ns
SCL Rise TimetRCL20 + 0.1
x CB300ns
SCL Fall TimetFCL20 + 0.1
x CB300ns
SDA Rise TimetRDA20 + 0.1
x CB300ns
SDA Fall TimetFDA20 + 0.1
x CB300ns
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +2.7V to +5.25V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ; compliance voltage = (VDD- 0.6V),
VSCLK/SCL= 0, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +3.0V and TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Bus Free Time Between a STOP
and START ConditiontBUF1.3µs
Setup Time for STOP ConditiontSU:STO160ns
Maximum Capacitive Load for
Each Bus LineCB400pF
SPI TIMING CHARACTERISTICS (Figure 6)
SCLK Clock PeriodtCP100ns
SCLK Pulse-Width HightCH40ns
SCLK Pulse-Width LowtCL40ns
CS Fall to SCLK Rise Setup TimetCSS25ns
SCLK Rise to CS Rise Hold TimetCSH50ns
DIN Setup TimetDS40ns
DIN Hold TimetDH0ns
SCLK Fall to DOUT TransitiontDO1CLOAD = 30pF40ns
CS Fall to DOUT EnabletCSECLOAD = 30pF40ns
CS Rise to DOUT DisabletCSDCLOAD = 30pF40ns
SCLK Rise to CS Fall DelaytCS050ns
CS Rise to SCLK Rise Hold TimetCS140ns
CS Pulse-Width HightCSW100ns
SPI TIMING CHARACTERISTICS FOR DAISY CHAINING (Figure 6)
SCLK Clock PeriodtCP200ns
SCLK Pulse-Width HightCH80ns
SCLK Pulse-Width LowtCL80ns
CS Fall to SCLK Rise Setup TimetCSS25ns
SCLK Rise to CS Rise Hold TimetCSH50ns
DIN Setup TimetDS40ns
DIN Hold TimetDH0ns
SCLK Fall to DOUT TransitiontDO1CLOAD = 30pF40ns
CS Fall to DOUT EnabletCSECLOAD = 30pF40ns
CS Rise to DOUT DisabletCSDCLOAD = 30pF40ns
SCLK Rise to CS Fall DelaytCS050ns
CS Rise to SCLK Rise Hold TimetCS140ns
CS Pulse-Width HightCSW100ns
Note 1:100% production tested at TA= +25°C. Limits over temperature are guaranteed by design.
Note 2:INL linearity is guaranteed from code 60 to code 1024.
Note 3:Connect a resistor from FSADJ_ to GND to adjust the full-scale current. See the Reference Architecture and Operationsection.
Note 4:Settling time is measured from (0.25 x full scale) to (0.75 x full scale).
Note 5:The device draws higher supply current when the digital inputs are driven with voltages between (VDD- 0.5V) and (GND +
0.5V). See the Supply Current vs. Digital Input Voltage graph in the Typical Operating Characteristics.
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
INL vs. CODE
CODE
INL (LSB)
MAX5550 toc011283846402565127688961024
DNL vs. CODE
CODE
DNL (LSB)
MAX5550 toc021283846402565127688961024
INL vs. TEMPERATURE
TEMPERATURE (°C)
INL (LSB)
MAX5550 toc03
DNL vs. TEMPERATURE
TEMPERATURE (°C)
DNL (LSB)
MAX5550 toc04
MAXIMUM INL ERROR vs.
OUTPUT CURRENT RANGES
OUTPUT CURRENT RANGE (mA)
INL (LSB)
MAX5550 toc05
ZERO-SCALE OUTPUT CURRENT
vs. TEMPERATURE
MAX5550 toc06
TEMPERATURE (°C)
ZERO-SCALE CURRENT (nA)
VDD = 5V
VDD = 3V
FULL-SCALE CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
FULL-SCALE CURRENT (mA)
MAX5550 toc07
VDD = 3V
VDD = 5V
SETTLING TIME
(FULL-SCALE POSITIVE STEP)
MAX5550 toc08
VOUT_
1V/div
10μs/div
2V/div
RLOAD = 65Ω
CLOAD = 24pF
SETTLING TIME
(FULL-SCALE NEGATIVE STEP)
MAX5550 toc09
VOUT_
1V/div
10μs/div
2V/div
RLOAD = 65Ω
CLOAD = 24pF
Typical Operating Characteristics
(VDD= +3.0V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ, TA= +25°C. unless otherwise noted).
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DACypical Operating Characteristics (continued)
(VDD= +3.0V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ, TA= +25°C. unless otherwise noted).
GLITCH IMPULSE
MAX5548 toc10
VOUT_
AC-COUPLED
40ns/div
1V/div
10mV/div
RLOAD = 65Ω
CLOAD = 24pF
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
MAX5550 toc11
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (nA)
NO LOAD, CODE = 0x00
SHUTDOWN CURRENT vs. TEMPERATURE
MAX5550 toc12
TEMPERATURE (°C)
SHUTDOWN CURRENT (nA)
NO LOAD, CODE = 0x00
VDD = 5V
VDD = 3V
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
MAX5550 toc14
TEMPERATURE (°C)
INTERNAL REFERENCE VOLTAGE (V)
NO LOAD, CODE = 0x00
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
MAX5550 toc13
SUPPLY VOLTAGE (V)
INTERNAL REFERENCE VOLTAGE (V)
NO LOAD, CODE = 0x00
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
Typical Operating Characteristics (continued)
(VDD= +3.0V, GND = 0, VREFIN= +1.25V, internal reference, RFSADJ_= 20kΩ, TA= +25°C. unless otherwise noted).
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
DIGITAL INPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
MAX5550 toc19
NO LOAD, CODE = 0x00
VDD = 5V
VDD = 3V
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5550 toc15
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
NO LOAD, CODE = 0x00
INTERNAL REFERENCE
EXTERNAL REFERENCE
SUPPLY CURRENT
vs. TEMPERATURE
MAX5550 toc16
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
NO LOAD, CODE = 0x00
VDD = 5V
VDD = 3V
WAKE-UP TIME
MAX5550 toc17
VOUT_
1V/div
400μs/div
2V/div
RLOAD = 65Ω
CLOAD = 24pF
IOUT vs. VOUT
VOUT (V)
OUT
(mA)
MAX5550 toc18
VDD = 3VVDD = 5V
DIGITAL FEEDTHROUGH
MAX5550 toc20
VOUT_
AC-COUPLED
10mV/div
400μs/div
SCLK
2V/div
RLOAD = 65Ω
CLOAD = 24pF
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
Pin Description
PINNAMEFUNCTIONSCLK/SCSerial Clock Input. Connect SCL to VDD through a 2.4kΩ resistor in I2C mode.DIN/SDASerial Data Input. Connect SDA to VDD through a 2.4kΩ resistor in I2C mode.CS/A0Chip-Select Input in SPI Mode/Address Select 0 in I2C Mode. CS is an active-low input. Connect A0 to VDD
or GND to set the device address in I2C mode.SPI/I2CSPI/I2C Select Input. Connect SPI/I2C to VDD to select SPI mode, or connect SPI/I2C to GND to select I2C
mode.DOUT/A1
Serial Data Output in SPI Mode/Address Select 1 in I2C Mode. Use DOUT to daisy chain the MAX5550 to
other devices or to read back in SPI mode. The digital data is clocked out on SCLK’s falling edge. Connect
A1 to VDD or GND to set the device address in I2C mode.
6, 13, 15N.C.No Connection. Leave unconnected or connect to GND.REFINRefer ence Inp ut. D r i ve RE FIN w i th an exter nal r efer ence sour ce b etw een + 0.5V and + 1.5V . Leave RE FIN
unconnected i n i nter nal r efer ence m od e. Byp ass w i th a 0.1µF cap aci tor to GN D as cl ose to the d evi ce as p ossi b l e.
8, 16GNDGroundOUTBDACB Output. OUTB provides up to 30mA of output current.FSADJBD AC B Ful l - S cal e Ad j ust Inp ut. For m axi m um ful l - scal e outp ut cur r ent, connect a 20kΩ r esi stor b etw een FS AD JB
and GN D . For m i ni m um ful l - scal e cur r ent, connect a 40kΩ r esi stor b etw een FS AD JB and GN D .FSADJAD AC A Ful l - S cal e Ad j ust Inp ut. For m axi m um ful l - scal e outp ut cur r ent, connect a 20kΩ r esi stor b etw een FS AD JA
and GN D . For m i ni m um ful l - scal e cur r ent, connect a 40kΩ r esi stor b etw een FS AD JA and GN D .OUTADACA Output. OUTA provides up to 30mA of output current.VDDPower Supply Input. Connect VDD to a +2.7 to +5.25V power supply. Bypass VDD to GND with a 0.1µF
capacitor as close to the device as possible.EPExposed Pad. Connect to GND. Do not use as a substitute ground connection.
Detailed Description
Architecture
The MAX5550 10-bit, dual current-steering DAC (see
the Functional Diagram) operates with DAC update
rates up to 10Msps in SPI mode and 400ksps in I2C
mode. The converter consists of a 16-bit shift register
and input DAC registers, followed by a current-steering
array. The current-steering array generates full-scale
currents up to 30mA per DAC. An integrated +1.25V
bandgap reference, control amplifier, and an external
resistor determine each data converter’s full-scale out-
put range.
Reference Architecture and Operation
The MAX5550 provides an internal +1.25V bandgap ref-
erence or accepts an external reference voltage source
between +0.5V and +1.5V. REFIN serves as the input for
an external low-impedance reference source. Leave
REFIN unconnected in internal reference mode. Internal
or external reference mode is software selectable
through the SPI/I2C serial interface.
The MAX5550’s reference circuit (Figure1) employs a
control amplifier to regulate the full-scale current (IFS) for
the current outputs of the DAC. This device has a soft-
ware-selectable full-scale current range (see the com-
mand summary in Table4). After selecting a current
range, an external resistor (RFSADJ_) sets the full-scale
current. See Table1 for a matrix of IFSand RFSADJ
selections.
During startup, when the power is first applied, the
MAX5550 defaults to the external reference mode, and
to the 1mA–2mA full-scale current-range mode.
DAC Data
The 10-bit DAC data is decoded as offset binary, MSB
first, with 1 LSB = IFS/ 1024, and converted into the cor-
responding current as shown in Table2.
Serial Interface
The MAX5550 features a pin-selectable SPI/I2C serial
interface. Connect SPI/I2Cto GND to select I2C mode, or
connect SPI/I2Cto VDDto select SPI mode. SDA and
SCL (I2C mode) and DIN, SCLK, and CS(SPI mode)
facilitate communication between the MAX5550 and the
master. The serial interface remains active in shutdown.

Partno	Mfg	Dc	Qty	Available	Descript
MAX5550ETE	MAXIM	N/a	550	avai	Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC
MAX5550ETE+	MAIXM	N/a	2500	avai	Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC