MAX5480BEEE-T ,8-Bit Parallel DAC in QSOP-16 PackageGeneral Description ________
MAX5480BEEE-T ,8-Bit Parallel DAC in QSOP-16 PackageMAX548019-1300; Rev 0; 10/978-Bit Parallel DAC in QSOP-16 Package_______________
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MAX5480AEEE+-MAX5480BCEE+-MAX5480BCEE-T-MAX5480BEEE+-MAX5480BEEE-T
8-Bit Parallel DAC in QSOP-16 Package
_______________General DescriptionThe MAX5480 is a CMOS, 8-bit digital-to-analog con-
verter (DAC) that interfaces directly with most micro-
processors. On-chip input latches make the DAC load
cycle interface similar to a RAM write cycle, where CS
and WRare the only control inputs required.
Linearity of ±1/2LSB is guaranteed, and power con-
sumption is less than 500μW. Monotonicity is guaran-
teed over the full operating temperature range.
The MAX5480 can be operated in either voltage-output
or current-output mode. It is available in a small 16-pin
QSOP package.
________________________ApplicationsDigitally Adjusted Power Supplies
Programmable Gain
Automatic Test Equipment
Portable, Battery-Powered Instruments
VCO Frequency Control
RF Transmit Control in Portable Radios
____________________________FeaturesQSOP-16 Package (same footprint as SO-8)Single +5V Supply OperationVOUTor IOUTOperation8-Bit Parallel InterfaceGuaranteed Monotonic Over TemperatureLow Power Consumption—100μA max±1/2LSB Linearity Over Temperature-Bit Parallel DAC in
QSOP-16 PackageOUT1RFB
REF
VDD
D0 (LSB)
TOP VIEW
MAX5480
QSOPOUT2
GND
D7 (MSB)
__________________Pin ConfigurationMAX5480
10pF
VOUT1415
VREFVDD
D7–D0
OUT1
DATA
INPUTS4–11
OUT2
R1 AND R2 USED ONLY IF GAIN
ADJUSTMENT IS REQUIRED.
REFRFB
GND
VDD
MAX4330
__________Typical Operating Circuit19-1300; Rev 0; 10/97
PARTMAX5480ACEE
MAX5480BCEE0°C to +70°C
0°C to +70°C
TEMP. RANGEPIN-
PACKAGE16 QSOP
16 QSOP
______________Ordering Information
ERROR
(LSB)±1/2
±1/2
MAX5480AEEE
MAX5480BEEE-40°C to +85°C
-40°C to +85°C16 QSOP
16 QSOP
±1/2
±1/2
-Bit Parallel DAC in QSOP-16 Package
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= +5V, VREF= +10V, VOUT1= VOUT2= 0V, Circuit of Figure 1, TA= TMINto TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND............................................................-0.3V to +17V
REF to GND.........................................................................±25V
RFB to GND.........................................................................±25V
Digital Inputs to GND.................................-0.3V to (VDD+ 0.3V)
OUT1, OUT2 to GND................................................-0.3V to VDD
Operating Temperature Ranges
MAX5480_CEE....................................................0°C to +70°C
MAX5480_EEE.................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Continuous Power Dissipation (TA= +70°C)
MAX5480_ _EE (derate 8.3mW/°C above +70°C)........667mW
Lead Temperature (soldering 10sec)..............................+300°C
pin 15 to GND
All grades guaranteed monotonic over temperature= TMINto TMAX
CONDITIONSLSB±1/2INLRelative Accuracy
Bits8Resolution51020RREFInput Resistance
%FSR/%0.010.16
LSB±1DNLDifferential Nonlinearity
LSB±1Gain Error (Note 1)
ppm/°C±2Gain Temperature
Coefficient (Note 2)
UNITSMINTYPMAXSYMBOLPARAMETER= +25°C= TMINto TMAX
VREF= ±10V
DAC code = full scaleTA= TMINto TMAXnA±400
Output Leakage Current
(IOUT1)
±50TA= +25°C
VREF= ±10V
DAC code = zero scaleTA= TMINto TMAXnA±400
Output Leakage Current
(IOUT2)
±50TA= +25°C
D0–D7 = 0V to
VDDor VDDto 0V,= CS= 0V,
OUT1 load =
100Ω||13pF
500Output Current Settling Time
to 1/2LSB
MAX5480A
(Note 3)= TMINto TMAXMAX5480B0.01
PSRSupply Rejection0.002TA= +25°C
250= TMINto TMAX= +25°C= +25°C
MAX5480A
(Note 3)
MAX5480B
MAX5480A
(Note 3)
MAX5480B= TMINto TMAXns= +25°C= +25°C
VREF= ±10V,
100kHz sine
wave,= CS= 0V
0.5AC Feedthrough
(OUT1 or OUT2)
D0–D7 = VDD, WR= CS= 0V
D0–D7 = 0V, WR= CS= 0V
120pFCOUT1OUT1 Capacitance (Note 3)
D0–D7 = VDD, WR= CS= 0V
D0–D7 = 0V, WR= CS= 0V
120pFCOUT2OUT2 Capacitance (Note 3)
DC ACCURACY
REFERENCE INPUT
DYNAMIC PERFORMANCE
ANALOG OUTPUTS
-Bit Parallel DAC in QSOP-16 Package
ELECTRICAL CHARACTERISTICS (continued)(VDD= +5V, VREF= +10V, VOUT1= VOUT2= 0V, Circuit of Figure 1, TA= TMINto TMAX, unless otherwise noted.)
Note 1:Gain error is measured using internal feedback resistor. Full-scale range (FSR) = VREF.
Note 2:Gain TempCo measured from +25°C to TMAXand from +25°C to TMIN.
Note 3:Guaranteed by design.
Input Capacitance (Note 3)CIN20pF8
WR, CS
D0–D7= +25°C
PARAMETERSYMBOLMINTYPMAXUNITS100Supply CurrentIDD500
Input CurrentIIN±10μA±1TA= TMINto TMAX
Chip-Select to Write-
Setup Time
CONDITIONS= TMINto TMAX= +25°C; VIN= 0V to VDD
Digital inputs at 0V or VDD
MAX5480A
Input Low VoltageVIL0.8V
Input High VoltageVIH2.4V35MAX5480BtCS
Chip-Select to Write-
Hold TimeMAX5480Ans0MAX5480BtCH
Write Pulse Width220MAX5480Ans35MAX5480BtWR
Data-Setup Time170MAX5480Ans55MAX5480BtDS
Data-Hold Time10MAX5480Ans-7MAX5480BtDH
POWER REQUIREMENTS
SWITCHING CHARACTERISTICS(Figure 4)
DIGITAL INPUTS
______________________________________________________________Pin Description
NAMEFUNCTIONOUT1R-2R Ladder Output
PINOUT2R-2R Ladder Output, complement of OUT1GNDGround
4–11D7–D0Data Inputs, D7 is the most significant bit.CSChip Select Input. Active Low.WRWrite Control Input. Active Low.VDDPower Supply Input, +5VREFReference Voltage InputRFBFeedback Resistor Connection
_______________Detailed DescriptionThe MAX5480 is an 8-bit multiplying digital-to-analog
converter (DAC) that consists of a thin-film R-2R resistor
array with CMOS current steering switches. Figure 3
shows a simplified schematic of the DAC. The inverted
R-2R ladder divides the voltage or current reference in
a binary manner among the eight steering switches.
The magnitude of the current appearing at either OUT
terminal depends on the number of switches selected;
therefore, the output is an analog representation of the
digital input. The two OUT terminals must be held at the
same potential so a constant current is maintained in
each ladder leg. This makes the REF input current inde-
pendent of switch state and also ensures that the
MAX5480 maintains its excellent linearity performance.
Interface-Logic Information
Mode SelectionThe inputs CSand WRcontrol the MAX5480’s operat-
ing mode (see Table 1).
Write ModeWhen CSand WRare both low, the MAX5480 is in write
mode, and its analog output responds to data activity at
the D0–D7 data-bus inputs. In this mode, the data
latches are transparent (see Tables 2 and 3).
Hold ModeIn hold mode, the MAX5480 retains the data that was
present on D0–D7 just prior to CSor WRassuming a
high state. The analog output remains at the value cor-
responding to the digital code locked in the data latch.
__________Applications Information
Using the MAX5480 in Voltage-
Output Mode (Single Supply)The MAX5480 can be used either as a current-output
DAC (Figures 1 and 6) or as a voltage-output DAC
(Figures 2 and 5).
To use the MAX5480 in voltage mode, connect OUT1 to
the reference input and connect OUT2 to ground. REF,
now the DAC output, is a voltage source with a con-
stant output resistance of 10kΩ(nominally). This output
is often buffered with an op amp (Figure 5).
An advantage of voltage-mode operation is single-
supply operation for the complete circuit; i.e., a nega-
tive reference is not required for a positive output. It is
important to note that the range of the reference is
restricted in voltage mode. The reference input (voltage
at OUT1) must always be positive and is limited to no
more than VDD- 3V. If the reference voltage exceeds
this value, linearity is degraded.
-Bit Parallel DAC in
QSOP-16 PackageL
MAX5480
10pF
VOUT1415
VREFVDD
D7–D0
OUT1
DATA
INPUTS4–11
OUT2
R1 AND R2 USED ONLY IF GAIN
ADJUSTMENT IS REQUIRED.
REFRFB
GND
VDD
MAX4330
Figure 1. Unipolar Binary Operation (Two-Quadrant Multiplication)
MAX5480
REF
INPUT*OUTPUT
VOLTAGE
(10kW OUTPUT
RESISTANCE)
OUT1REF1123
OUT2
RFBVDD
+5V
GNDD7–D0
DATA INWR
*(VDD - 3V, max)
Figure 2. Typical Operating Circuit (Voltage Mode—Unbuffered)
MODEWrite
Hold
Hold
DAC ResponseDAC responds to data bus
(D0–D7) inputs.
Data bus (D0–D7) is locked out;
DAC holds last data present
when CSor WRassumed high
state.
Table 1. Mode-Selection TableL = Low State, H = High State, X = Don’t Care
-Bit Parallel DAC in QSOP-16 PackageINTERFACE LOGICS6S1
20kW20kW20kW20kW
10kWD5D0 (LSB)D7 (MSB)
20kW
10kW
REF
10kW
10kW
OUT2
OUT1
RFB
Figure 3. MAX5480 Functional Diagram
tCHtCS
VDD
VDD
NOTES:
1. FOR THE MAX5480, ALL INPUT SIGNAL RISE AND FALL TIMES ARE MEASURED
FROM 10% TO 90% OF VDD. VDD = +5V, tr = tf = 20ns.
2. TIMING MEASUREMENT REFERENCE LEVEL IS (VIH + VIL) / 2.
DATA IN
(D7–D0)
DATA IN
STABLE
VDD
tWR
tDS
VIH
VIL
tDH
Figure 4. Write-Cycle Timing Diagram
Table 2. Unipolar Binary Code TableTable 3. Bipolar (Offset Binary) Code TableNOTELSBVVREFREF: 121
256=Łł()=()NOTELSBVVREFREF: 121
128=Łł()=()
DIGITAL INPUT
MSBLSB1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
ANALOG OUTPUT1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
DIGITAL INPUT
MSBLSB1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
ANALOG OUTPUT1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 255
256REF 129
256REF 128
256REF=- VREF 127
256REF 1
256REF 0
256REF= 0 127
128REF 1
128REF 1
128REF 127
128REF 128
128REF
-Bit Parallel DAC in QSOP-16 PackageMAX5480
MAX4330MAX6120+1.2V
0V £ VOUT £ 2.4V (255/256)
0.1mF
OUT11413
10k
10k
REF
OUT2
RFBVDD
VOUT
VINN.C.
+5V
GND
GND
D7–D0
DATA INWR
Figure 5. Single-Supply Voltage-Output Mode (Buffered)
MAX548015
0 TO -VREF
VREF
±10V
(AC OR DC)
VDD
1kW
2kW
OUT1
OUT2
NOTES:
1. ADJUST R1 FOR VOUT = 0V AT CODE 10000000.
2. C1 PHASE COMPENSATION (10pF to 15pF) MAY BE
REQUIRED IF A1 IS A HIGH-SPEED AMPLIFIER.
REFRFB
GND
GND
VDD
1/2 MXL1013
1/2 MXL1013VOUT
20kW
20kW
10kW
5kW
D7–D0
DATA
INPUTS4–11WR
Figure 6. Bipolar (Four-Quadrant) Operation
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
