MAX537BCWE+ ,Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial InterfaceMAX536/MAX53719-0230; Rev 3; 3/11Calibrated, Quad, 12-BitVoltage-Output DACs with Serial Interface_ ..
MAX537BEPE+ ,Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial InterfaceFeatures♦ Four 12-Bit DACs with Output BuffersThe MAX536/MAX537 combine four 12-bit, voltage-output ..
MAX537BEWE ,Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial InterfaceELECTRICAL CHARACTERISTICS—MAX536(V = +15V, V = -5V, REFAB/REFCD = 10V, AGND = DGND = 0V, R = 5kΩ, ..
MAX537BEWE+ ,Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial InterfaceFeatures♦ Four 12-Bit DACs with Output BuffersThe MAX536/MAX537 combine four 12-bit, voltage-output ..
MAX537BEWE+ ,Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial InterfaceApplicationsMAX536ACPE+ 0°C to +70°C 16 PDIP ±0.5Industrial Process ControlsMAX536BCPE+ 0°C to +70° ..
MAX5380LEUK ,Low-Cost / Low-Power / 8-Bit DACs with 2-Wire Serial Interface in SOT23ApplicationsAutomatic Tuning (VCO)REFERENCE TOPPART ADDRESS(V) MARKPower-Amplifier Bias ControlMAX5 ..
MAX9877EWP+TG45 ,Low RF Susceptibility Mono Audio Subsystem with DirectDrive Headphone AmplifierBlock Diagram Pin ConfigurationSINGLE SUPPLYTOP VIEW2.7V TO 5.25V(BUMP SIDE DOWN)1 2 3 4 5VOLUMEPRE ..
MAX9879ERV+TCEP ,Stereo Class D Audio Subsystem with DirectDrive Headphone AmplifierBlock DiagramTOP VIEWSINGLE SUPPLY(BUMP SIDE DOWN)2.7V TO 5.5V31 2 4 56AVOLUMEPREAMPLIFIERCONTROLC1 ..
MAX987ESA ,High-Speed, Micropower, Low-Voltage, SOT23, Rail-to-Rail I/O ComparatorsMAX987/MAX988/MAX991/MAX992/MAX995/MAX99619-1266; Rev 0b; 7/97High-Speed, Micropower, Low-Voltage,S ..
MAX987EUK ,High-Speed, Micropower, Low-Voltage, SOT23, Rail-to-Rail I/O ComparatorsMAX987/MAX988/MAX991/MAX992/MAX995/MAX99619-1266; Rev 2; 1/07High-Speed, Micropower, Low-Voltage,SO ..
MAX987EUK ,High-Speed, Micropower, Low-Voltage, SOT23, Rail-to-Rail I/O ComparatorsELECTRICAL CHARACTERISTICS (Note 1)(V = +2.7V to +5.5V, V = 0V, V = 0V, T = -40°C to +85°C, unless ..
MAX987EUK+ ,High-Speed, Micropower, Low-Voltage, SOT23, Rail-to-Rail I/O ComparatorsApplicationsMAX987Portable/Battery- Threshold Detectors/V 2CCMAX988Powered Systems DiscriminatorsMo ..
MAX536ACPE+-MAX536ACWE+-MAX536AEPE+-MAX536AEWE+-MAX536BCPE+-MAX536BCWE+-MAX536BCWE+T-MAX536BEPE+-MAX536BEWE+-MAX537ACPE+-MAX537ACWE+-MAX537AEPE+-MAX537AEWE+-MAX537BCPE+-MAX537BCWE+-MAX537BEPE+-MAX537BEWE+
Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial Interface
_______________General DescriptionThe MAX536/MAX537 combine four 12-bit, voltage-output
digital-to-analog converters (DACs) and four precision
output amplifiers in a space-saving 16-pin package.
Offset, gain, and linearity are factory calibrated to provide
the MAX536’s ±1 LSB total unadjusted error. The
MAX537 operates with ±5V supplies, while the MAX536
uses -5V and +10.8V to +13.2V supplies.
Each DAC has a double-buffered input, organized as
an input register followed by a DAC register. A 16-bit
serial word is used to load data into each input/DAC
register. The serial interface is compatible with either
SPI/QSPI™ or MICROWIRE™, and allows the input and
DAC registers to be updated independently or simulta-
neously with a single software command. The DAC reg-
isters can be simultaneously updated with a hardware
LDACpin. All logic inputs are TTL/CMOS compatible.
________________________ApplicationsIndustrial Process Controls
Automatic Test Equipment
Digital Offset and Gain Adjustment
Motion Control Devices
Remote Industrial Controls
Microprocessor-Controlled Systems
____________________________FeaturesFour 12-Bit DACs with Output BuffersSimultaneous or Independent Control of Four
DACs via a 3-Wire Serial InterfacePower-On Reset SPI/QSPI and MICROWIRECompatible±1 LSB Total Unadjusted Error (MAX536)Full 12-Bit Performance without Adjustments±5V Supply Operation (MAX537)Double-Buffered Digital InputsBuffered Voltage Output16-Pin DIP/SO Packages
______________Ordering Information
MAX536/MAX537
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial InterfaceOUTC
OUTD
VDDAGND
VSS
OUTA
OUTB
TOP VIEW
MAX536
MAX537
REFCD
SDO
SCKSDI
LDAC
DGND
REFAB
DIP/SO
__________________Pin ConfigurationMAX536/MAX537
DAC ADAC
REG A
INPUT
REG A
DAC BDAC
REG B
INPUT
REG B
DAC CDAC
REG C
INPUT
REG C
DAC DDAC
REG D
INPUT
REG D
DECODE
CONTROL
OUTA
OUTB
OUTC
OUTD
16-BIT
SHIFT
REGISTER
CONTROLSDI
SCK
SDOLDACAGND
DGND
VSSTP
VDD
REFAB
REFCD
________________Functional Diagram19-0230; Rev 3; 3/11
PARTTEMP RANGEPIN-
PACKAGE
INL
(LSB)
MAX536ACPE+0°C to +70°C16 PDIP±0.5
MAX536BCPE+0°C to +70°C16 PDIP±1
MAX536ACWE+0°C to +70°C16 Wide SO±0.5
MAX536BCWE+0°C to +70°C16 Wide SO±1
MAX536AEPE+-40°C to +85°C16 PDIP±0.5
MAX536BEPE+-40°C to +85°C16 PDIP±1
MAX536AEWE+-40°C to +85°C16 Wide SO±0.5
MAX536BEWE+-40°C to +85°C16 Wide SO±1
+Denotes a lead(Pb)-free/RoHS-compliant package.
Ordering Information continued at end of data sheet.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC PERFORMANCE—ANALOG SECTIONResolutionN12Bits
MAX536A±1.0TA = +25°CMAX536B±2.0
MAX536AC±2.0
MAX536BC±3.0
MAX536AE±2.5
Total Unadjusted Error (Note 1)TUE
TA = TMIN to TMAX
MAX536BE±3.5
LSB
MAX536A±0.15±0.50Integral NonlinearityINLMAX536B±1LSB
Differential NonlinearityDNLGuaranteed monotonic±1LSB
MAX536A±2.5TA = +25°CMAX536B±5.0
MAX536AC±5.0
MAX536BC±7.5
MAX536AE±6.1
Offset Error
TA = TMIN to TMAX
MAX536BE±8.5
RL = ∞-0.1±1.0
MAX536_C/E-0.6±1.5Gain ErrorRL = 5kΩMAX536_M±2.0
LSB
VDD Power-Supply Rejection
RatioPSRRTA = +25°C, 10.8V < VDD < 13.2V±0.02±0.125LSB/V
VSS Power-Supply Rejection RatioPSRRTA = +25°C, -5.5V < VDD < -4.5V±0.03±0.30LSB/V
MAX536/MAX537
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial InterfaceVDDto AGND or DGND
MAX536............................................................-0.3V to +13.2V
MAX537.................................................................-0.3V to +7V
VSSto AGND or DGND............................................-7V to +0.3V
SDI, SCK, CS, LDAC, TP, SDO
to AGND or DGND..................................-0.3V to (VDD+ 0.3V)
REFAB, REFCD to AGND or DGND..........-0.3V to (VDD+ 0.3V)
OUT_ to AGND or DGND..........................................VDDto VSS
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) .................842mW
Wide SO (derate 9.52mW/°C above +70°C).................762mW
Operating Temperature Ranges
MAX53_AC_E/BC_E.............................................0°C to +70°C
MAX53_AE_E/BE_E..........................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
ELECTRICAL CHARACTERISTICS—MAX536(VDD= +12V, VSS= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless
otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
MATCHING PERFORMANCE (TA = +25°C)MAX536A±1.0Total Unadjusted ErrorTUEMAX536B±2.0LSB
Gain Error±0.1±1.0LSB
MAX536A±1.2±2.5Offset ErrorMAX536B±1.2±5.0mV
Integral NonlinearityINL±0.2±1.0LSB
REFERENCE INPUTReference Input RangeREF0V D D - 4V
Reference Input ResistanceRREFCode dependent, minimum at code 5555kΩ
MULTIPLYING-MODE PERFORMANCEReference 3dB BandwidthVREF = 2VP-P700kHz
VREF = 10VP-Pat 400Hz-100Reference FeedthroughInput code =
all 0sVREF = 10VP-P at 4kHz-82dB
Total Harmonic Distortion Plus
NoiseTHD+NVREF = 2.0VP-P at 50kHz0.024%
DIGITAL INPUTS (SDI, SCK, CS, LDAC)Input High VoltageVIH2.4V
Input Low VoltageVIL0.8V
Input Leakage CurrentVIN = 0V or VDD1.0µA
Input Capacitance (Note 2)10pF
DIGITAL OUTPUT (SDO)Output Low VoltageVOLSDO sinking 5mA0.130.40V
Output Leakage CurrentSDO = 0V to VDD±10µA
DYNAMIC PERFORMANCE (RL = 5kΩ, CL = 100pF)Voltage Output Slew Rate5V/µs
Output Settling TimeTo ±0.5 LSB of full scale3µs
Digital Feedthrough5nV-s
Digital Crosstalk (Note 3)VREF = 5V8nV-s
POWER SUPPLIESPositive Supply RangeVDD10.813.2V
Negative Supply RangeVSS-4.5-5.5V
TA = +25°C818Positive Supply Current
(Note 4)IDDTA = TMIN to TMAX25mA
TA = +25°C-6-16Negative Supply Current
(Note 4)ISSTA = TMIN to TMAX-23mA
MAX536/MAX537
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX536 (continued)(VDD= +12V, VSS= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless
otherwise noted. Typical values are at TA= +25°C.)
MAX536/MAX537
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX536 (continued)(VDD= +12V, VSS= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless
otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITStPOR20µs
SCK Clock PeriodtCP100ns
SCK Pulse Width HightCH30ns
SCK Pulse Width LowtCL30ns
tCSS20ns
tCSH10ns
SDI Setup TimetDS4026ns
SDI Hold TimetDH0ns
tDO11kΩpullup on SDO
to VDD, CLOAD= 50pF
SDO high78105nsSDO low5080
SCK Fall to SDO Valid
Propagation Delay (Note 7)tDO21kΩpullup on SDO
to VDD, CLOAD= 50pF
SDO high81110nsSDO low5385
tDV2745ns
tTR4060ns
SCK Rise toCSFall DelaytCS0Continuous SCK, SCK edge ignored20ns
tCS1SCK edge ignored20ns
LDACPulse Width LowtLDAC30nsPulse Width HightCSW40ns
Internal Power-On Reset
Pulse Width (Note 2)Fall to SCK Rise
Setup Time
SCK Rise to CSRise
Hold Time
SCK Rise to SDO Valid
Propagation Delay (Note 6)Fall to SDO Enable
(Note 8)Rise to SDO Disable
(Note 9)Rise to SCK Rise
Hold Time
Note 1:TUE is specified with no resistive load.
Note 2:Guaranteed by design.
Note 3:Crosstalk is defined as the glitch energy at any DAC output in response to a full-scale step change on any other DAC.
Note 4:Digital inputs at 2.4V; with digital inputs at CMOS levels, IDDdecreases slightly.
Note 5:All input signals are specified with tR= tF≤5ns. Logic input swing is 0 to 5V.
Note 6:Serial data clocked out of SDO on SCK’s falling edge. (SDO is an open-drain output for the MAX536. The MAX537’s SDO
pin has an internal active pullup.)
Note 7:Serial data clocked out of SDO on SCK’s rising edge.
Note 8:SDO changes from High-Z state to 90% of final value.
Note 9:SDO rises 10% toward High-Z state.
TIMING CHARACTERISTICS(Note 5)
MAX536/MAX537
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX537(VDD= +5V, VSS= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless
otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC PERFORMANCE—ANALOG SECTIONResolutionN12Bits
MAX537A±0.15±0.50Integral NonlinearityINLMAX537B±1LSB
Differential NonlinearityDNLGuaranteed monotonic±1LSB
MAX537A±3.0TA = +25°CMAX537B±6.0
MAX537AC±6.0
MAX537BC±9.0
MAX537AE±7.0
Offset Error
TA = TMIN to TMAX
MAX537BE±11.0
RL = ∞-0.3±1.5Gain ErrorRL = 5kΩ-0.8±3.0LSBD D P ow er - S up p l y Rej ecti on Rati oPSRRTA = +25°C, 4.5V ≤ VDD ≤ 5.5V±0.01±0.5LSB/VS S P ow er - S up p l y Rej ecti on Rati oPSRRTA = +25°C, -5.5V ≤ VSS ≤ -4.5V±0.02±0.7LSB/V
MATCHING PERFORMANCE (TA = +25°C)Gain Error±0.1±1.25LSB
MAX537A±0.3±3.0Offset ErrorMAX537B±0.3±6.0mV
Integral NonlinearityINL±0.35±1.0LSB
REFERENCE INPUTReference Input RangeREF0V D D - 2.2V
Reference Input ResistanceRREFCode dependent, minimum at code 555 hex5kΩ
MULTIPLYING-MODE PERFORMANCEReference 3dB BandwidthVREF = 2VP-P700kHz
VREF = 10VP-P at
400Hz-100
Reference FeedthroughInput code = all 0sVREF = 10VP-P at
4kHz-82
Total Harmonic Distortion Plus
NoiseTHD+NVREF = 850mVP-P at 100kHz0.024%
DIGITAL INPUTS (SDI, SCK, CS, LDAC)Input High VoltageVIH2.4V
Input Low VoltageVIL0.8V
Input Leakage CurrentVIN = 0V or VDD1.0µA
Input Capacitance (Note 2)10pF
