MAX5264ACMH Fast Delivery |IC PHOENIX CO.,LIMITED

MAX5264ACMH ,Octal, 14-Bit Voltage-Output DAC with Parallel Interface for ATEApplications LD 7 27 D12A2 8 26 D11A1 9 25 D10A0 10 24 D9CS 11 23 D8Functional Diagram appears at e ..
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MAX5264ACMH
Octal, 14-Bit Voltage-Output DAC with Parallel Interface for ATE
General Description
The MAX5264 contains eight 14-bit, voltage-output digi-
tal-to-analog converters (DACs). On-chip precision out-
put amplifiers provide the voltage outputs. The device
operates from +14V/-9V supplies. Its bipolar output
voltage swing ranges from +9V to -4V and is achieved
with no external components. The MAX5264 has three
pairs of differential reference inputs; two of these pairs
are connected to two DACs each, and a third pair is
connected to four DACs. The references are indepen-
dently controlled, providing different full-scale output
voltages to the respective DACs. The MAX5264 oper-
ates within the following voltage ranges: VDD= +7V to
+14V, VSS = -5V to -9V, and VCC= +4.75V to +5.25V.
The MAX5264 features double-buffered interface logic
with a 14-bit parallel data bus. Each DAC has an input
latch and a DAC latch. Data in the DAC latch sets the
output voltage. The eight input latches are addressed
with three address lines. Data is loaded to the input
latch with a single write instruction. An asynchronous
load input (LD) transfers data from the input latch to the
DAC latch. The LDinput controls all DACs; therefore, all
DACs can be updated simultaneously by asserting thepin.
An asynchronous CLRinput sets the output of all eight
DACs to the respective DUTGND input of the op amp.
Note that CLRis a CMOS input, which is powered by
VDD. All other logic inputs are TTL/CMOS compatible.
The “A” grade of the MAX5264 has a maximum INL of
±4LSBs, while the “B” grade has a maximum INL of
±8LSBs. Both grades are available in 44-pin MQFP
packages.
Applications
Automatic Test Equipment (ATE)
Industrial Process Controls
Arbitrary Function Generators
Avionics Equipment
Minimum Component Count Analog Systems
Digital Offset/Gain Adjustment
SONET Applications
FeaturesFull 14-Bit Performance Without Adjustments8 DACs in a Single PackageBuffered Voltage OutputsUnipolar or Bipolar Voltage Swing to +9V and -4V22µs Output Settling TimeDrives Up to 10,000pF Capacitive LoadLow Output Glitch: 30mVLow Power Consumption: 10mA(typ)Small 44-Pin MQFP PackageDouble-Buffered Digital InputsAsynchronous Load Updates All DACs
SimultaneouslyAsynchronous CLRForces All DACs to DUTGND
Potential
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
19-1734; Rev 0; 5/00
Pin Configuration
Ordering Information
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, RL= 10kΩ, = 50pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND ........................................................-0.3V to +16.8V
VSSto GND ........................................................-10.8V to +0.3V
VCCto GND ............................................................-0.3V to +6V
A_, D_, WR, CS, LD, CLRto GND.............+0.3V to (VCC+ 0.3V)
REF_ _ _ _+, REF_ _ _ _-,
DUTGND_ _..................................(VSS- 0.3V) to (VDD+ 0.3V)
OUT_ ..........................................................................VDDto VSS
Maximum Current into REF_ _ _ _ _, DUTGND_ _ ...........±10mA
Maximum Current into Any Signal Pin..............................±50mA
OUT_ Short-Circuit Duration to VDD, VSS, and GND................1s
Continuous Power Dissipation (TA= +70°C)
44-Pin MQFP (derate 11.1mW/°C above +70°C)..........870mW
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, RL= 10kΩ, = 50pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
INTERFACE TIMING CHARACTERISTICS
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, Figure 2, TA= TMIN
to TMAX, unless otherwise noted.)
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
Note 1:Guaranteed by design. Not production tested.
Note 2:Guaranteed by design when 220Ωresistor is in series with CL= 10,000pF.
Note 3:All DAC latches at full scale (0x3FFF).
Note 4:All DAC latches at zero scale (0x0000).
Note 5:All digital inputs (D_, A_, WR, CS, LD, and CLR) at GND or VCCpotential.
Note 6:All digital inputs (D_, A_, WR, CS, LD, and CLR) at +0.8V or +2.4V.
Note 7:All data inputs (D0 to D13) transition from GND to VCC, with WR= VCC.
Note 8:All digital inputs (D_, A_, WR, CS, LD, and CLR) at +0.8V or +2.4V.
DYNAMIC CHARACTERISTICS
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, RL= 10kΩ, = 50pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Typical Operating Characteristics
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, TA= +25°C, unless
otherwise noted.)
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE10k100k1M10M
REFERENCE INPUT
FREQUENCY RESPONSE
MAX5264-07
FREQUENCY (Hz)
AMPLITUDE (dB)-25
LARGE-SIGNAL STEP RESPONSE
MAX5264-09
5µs/div
DATA
D13–D0
5V/div
OUT
5V/div
POSITIVE SETTLING TIME
MAX5264-10
5µs/div
OUT
1mV/div
5V/div
NEGATIVE SETTLING TIME
MAX5264-11
5µs/div
OUT
1mV/div
5V/div
1001k10k
FREQUENCY (Hz)
NOISE VOLTAGE DENSITY
vs. FREQUENCY
NOISE VOLTAGE DENSITY (nV/
Hz)
MAX5264-12
ZERO-SCALE AND FULL-SCALE ERROR
vs. TEMPERATURE
MAX5264-04
TEMPERATURE (°C)
ERROR (LSB)
IDD AND ISS
vs. TEMPERATURE (WITH 10kΩ LOADS)
MAX5264-05
TEMPERATURE (°C)
IDD
, I
(mA)
DIGITAL SUPPLY CURRENT
vs. TEMPERATURE
MAX5264-06
TEMPERATURE (°C)
ICC
Typical Operating Characteristics (continued)
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, TA= +25°C, unless
otherwise noted.)
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
Z.S.E.
vs. VREF (VREF+ - VREF-)
MAX5264-17
VREF (V)
Z.S.E. (LSB)
MAJOR CARRY GLITCH IMPULSE
(0 x 1FFF - 0 x 2000)
MAX5264-13
2µs/div
5V/div
OUT
5mV/div
MAJOR CARRY GLITCH IMPULSE
(0 x 2000 - 0 x 1FFF)
MAX5264-14
2µs/div
5V/div
OUT
5mV/div
GAIN ERROR
vs. VREF (VREF+ - VREF-)
MAX5264-15
VREF (V)
GAIN ERROR (LSB)
DNL (MAX, MIN)
vs. VREF (VREF+ - VREF-)
MAX5264-16
VREF (V)
DNL (MAX, MIN) (LSB)
F.S.E.
vs. VREF (VREF+ - VREF-)
MAX5264-18
VREF (V)
F.S.E. (LSB)-0.3
INL (MAX, MIN)
vs. VREF (VREF+ - VREF-)
MAX5264-19
VREF (V)
INL (MAX, MIN) (LSB)
Typical Operating Characteristics (continued)
(VDD= +14V, VSS= -9V, VCC= +5V, VGND= VDUTGND_ _= 0, VREF_ _ _ _+ = +4.500V, VREF_ _ _ _- = -2.000V, TA= +25°C, unless
otherwise noted.)
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
Pin Description
Note:VREF = VREF+ - VREF-
MAX5264
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
Pin Description (continued)

Partno	Mfg	Dc	Qty	Available	Descript
MAX5264ACMH	MAXIM	N/a	4	avai	Octal, 14-Bit Voltage-Output DAC with Parallel Interface for ATE