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MAX525MAXIMN/a5avaiLow-Power, Quad, 12-Bit Voltage-Output DAC with Serial Interface


MAX525 ,Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial InterfaceApplicationsMAX525BCPP 0°C to +70°C 20 Plastic DIP ±1Industrial Process ControlsMAX525ACAP 0°C to + ..
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MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial Interface
__________________General Description
The MAX525 combines four low-power, voltage-output,
12-bit digital-to-analog converters (DACs) and four pre-
cision output amplifiers in a space-saving, 20-pin pack-
age. In addition to the four voltage outputs, each
amplifier’s negative input is also available to the user.
This facilitates specific gain configurations, remote
sensing, and high output drive capacity, making the
MAX525 ideal for industrial-process-control applica-
tions. Other features include software shutdown, hard-
ware shutdown lockout, an active-low reset which clears
all registers and DACs to zero, a user-programmable
logic output, and a serial-data output.
Each DAC has a double-buffered input organized as an
input register followed by a DAC register. A 16-bit serial
word loads data into each input/DAC register. The serial
interface is compatible with SPI™/QSPI™ and
MICROWIRE™. It allows the input and DAC registers to
be updated independently or simultaneously with a sin-
gle software command. The DAC registers can be
simultaneously updated through the 3-wire serial inter-
face. All logic inputs are TTL/CMOS-logic compatible.
________________________Applications

Industrial Process Controls
Automatic Test Equipment
Digital Offset and Gain Adjustment
Motion Control
Remote Industrial Controls
Microprocessor-Controlled Systems
______________________________Features
Four 12-Bit DACs with Configurable
Output Amplifiers
+5V Single-Supply OperationLow Supply Current: 0.85mA Normal Operation
10µA Shutdown Mode
Available in 20-Pin SSOPPower-On Reset Clears all Registers and
DACs to Zero
Capable of Recalling Last State Prior to ShutdownSPI/QSPI and MICROWIRE CompatibleSimultaneous or Independent Control of DACs
through 3-Wire Serial Interface
User-Programmable Digital Output
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface

MAX525
OUTA
FBA
FBB
FBC
FBD
DAC A
DAC B
DAC C
DAC D
REFAB
DAC
REGISTER A
DECODE
CONTROL
INPUT
REGISTER A
DAC
REGISTER B
INPUT
REGISTER B
DAC
REGISTER C
INPUT
REGISTER C
DAC
REGISTER D
INPUT
REGISTER D
16-BIT
SHIFT
REGISTER
CONTROLLOGIC
OUTPUTDINSCLK
OUTB
OUTC
OUTD
DOUTPDLCLVDDAGNDDGND
UPOREFCD
_________________________________________________________________________Functional Diagram

19-1098; Rev 2; 10/02
PART

MAX525ACPP
MAX525BCPP0°C to +70°C
0°C to +70°C
TEMP RANGEPIN-PACKAGE

20 Plastic DIP
20 Plastic DIP
_________________Ordering Information
Ordering Information continued at end of data sheet.
Pin Configuration appears at end of data sheet.
INL
(LSB)

±1/2
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
MAX525ACAP
MAX525BCAP0°C to +70°C
0°C to +70°C20 SSOP
20 SSOP
±1/2
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +5V ±10%, AGND = DGND = 0V, REFAB = REFCD = 2.5V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C. Output buffer connected in unity-gain configuration (Figure 9).)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND............................................................-0.3V to +6V
VDDto DGND...........................................................-0.3V to +6V
AGND to DGND..................................................................±0.3V
REFAB, REFCD to AGND...........................-0.3V to (VDD+ 0.3V)
OUT_, FB_ to AGND...................................-0.3V to (VDD+ 0.3V)
Digital Inputs to DGND.............................................-0.3V to +6V
DOUT, UPO to DGND................................-0.3V to (VDD+ 0.3V)
Continuous Current into Any Pin.......................................±20mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 8.00mW/°C above +70°C).................640mW
SSOP (derate 8.00mW/°C above +70°C)......................640mW
CERDIP (derate 11.11mW/°C above +70°C).................889mW
Operating Temperature Ranges
MAX525_C_P........................................................0°C to +70°C
MAX525_E_P.....................................................-40°C to +85°C
MAX525_MJP..................................................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Code-dependent, minimum at code 555 hex
4.5V ≤VDD≤5.5V
(Note 1)
Guaranteed monotonic
CONDITIONS
8RREFReference Input Resistance0VDD - 1.4VREFReference Input Range
LSB±0.35±1.0INLIntegral NonlinearityOffset Error±1.0±6.0
LSB-0.8±2.0GEGain Error
µV/VPSRRPower-Supply Rejection Ratio100600
±0.25±0.5
Bits12NResolution
ppm/°C1Gain-Error Tempco
LSBGEGain Error -0.8±2.0
ppm/°C6Offset-Error Tempco
LSB±1.0INLIntegral Nonlinearity
(Note 1)
LSB±1.0DNLDifferential Nonlinearity
±6.0mVVOSOffset Error
UNITSMINTYPMAXSYMBOLPARAMETER

MAX525A
MAX525B0.01±1Reference Current in Shutdown
STATIC PERFORMANCE—ANALOG SECTION
MATCHING PERFORMANCE (TA
= +25°C)
REFERENCE INPUT
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +5V ±10%, AGND = DGND = 0V, REFAB = REFCD = 2.5V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C. Output buffer connected in unity-gain configuration (Figure 9).)
(Note 3)= VDD, DIN = 100kHz
VREF= 0.67VP-P
Rail-to-Rail®(Note 2)
To ±1/2LSB, VSTEP= 2.5V
VIN= 0V or VDD
VREF= 1VP-Pat 25kHz
ISINK= 2mA
ISOURCE= 2mA
CONDITIONS
0.850.98IDDSupply Current4.55.5VDDSupply Voltage
nV-s5Digital Crosstalk
nV-s5Digital Feedthrough15Start-Up Time Exiting
Shutdown Mode00.1Current into FB_0 to VDDOutput Voltage Swing12Output Settling Time
V/µs0.6SRVoltage Output Slew Rate0.130.4VOLOutput Low VoltageVDD- 0.5VOHOutput High Voltage
kHz650Reference -3dB Bandwidth8CINInput Capacitance0.01±1.0IINInput Leakage Current0.8VILInput Low Voltage72SINADSignal-to-Noise Plus
Distortion Ratio2.4VIHInput High Voltage
UNITSMINTYPMAXSYMBOLPARAMETER

Input code = all 0s, VREF= 3.6VP-Pat 1kHzdB-84Reference Feedthrough
(Note 3)µA1020Supply Current in Shutdown0.01±1Reference Current in Shutdown
Note 1:
Guaranteed from code 11 to code 4095 in unity-gain configuration.
Note 2:
Accuracy is better than 1.0LSB for VOUT= 6mV to VDD- 60mV, guaranteed by PSR test on end points.
Note 3:
RL= ∞, digital inputs at DGND or VDD.= ∞µA0.01±1OUT_ Leakage Current
in Shutdown
MULTIPLYING-MODE PERFORMANCE
DIGITAL INPUTS
DIGITAL OUTPUTS
DYNAMIC PERFORMANCE
POWER SUPPLIES

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
MAX525-03
SUPPLY CURRENT (
SUPPLY CURRENT
vs. TEMPERATURE

TEMPERATURE (°C)
CODE = FFF HEX
INL (LSB)
REFERENCE VOLTAGE (V)
MAX525-01
-0.4L = 5kΩ
INTEGRAL NONLINEARITY
vs. REFERENCE VOLTAGE

-20500k1M1.5M2M2.5M3M
MAX525-02
RELATIVE OUTPUT (dB)
REFERENCE VOLTAGE INPUT
FREQUENCY RESPONSE

FREQUENCY (Hz)
REFAB SWEPT 0.67VP-P
RL = 5kΩL = 100pF
__________________________________________Typical Operating Characteristics

(VDD = +5V, TA = +25°C, unless otherwise noted.)
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +5V ±10%, AGND = DGND = 0V, REFAB = REFCD = 2.5V, RL= 5kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C. Output buffer connected in unity-gain configuration (Figure 9).)
CONDITIONS

tD02SCLK Fall to DOUT Valid
Propagation Delay
tD01SCLK Rise to DOUT Valid
Propagation Delay100tCPSCLK Clock Period0tDHDIN Hold Time40tDSDIN Setup Time0tCSHSCLK Rise to CSRise Hold Time40tCSSCSFall to SCLK Rise Setup Time40tCHSCLK Pulse Width High40tCLSCLK Pulse Width Low
UNITSMINTYPMAXSYMBOLPARAMETER
100tCSWCSPulse Width High40tCS1CSRise to SCLK Rise Hold Time40tCS0SCLK Rise to CSFall Delay
CLOAD= 200pF
CLOAD= 200pF
TIMING CHARACTERISTICS (Figure 6)

MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface

TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
MAX525-05
FREQUENCY (kHz)
THD + NOISE (%)
DAC CODE = ALL 1s
REFAB = 1VP-P
RL = 5kΩ
CL = 100pF
OUTPUT FFT PLOT
MAX525-10
FREQUENCY (kHz)
SIGNAL AMPLITUDE (dB)
VREF = 1kHz, 0.006V TO 3.6V
RL = 5kΩ
CL = 100pF
____________________________Typical Operating Characteristics (continued)

(VDD = +5V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX525-04
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
CODE = FFF HEX
FULL-SCALE ERROR
vs. LOAD
MAX525-09
LOAD (kΩ)
FULL-SCALE ERROR (LSB)
REFERENCE FEEDTHROUGH
AT 1kHz
MAX525-11
FREQUENCY (kHz)
SIGNAL AMPLITUDE (dB)
-80OUTA FEEDTHROUGH
REFAB INPUT SIGNAL
VREF = 3.6VP-P AT 1kHz
RL = 5kΩ
CL = 100pF
10μs/div
MAJOR-CARRY TRANSITION

MAX525-07
OUTB,
AC-COUPLED
100mV/div
5V/div
VREF = 2.5V, RL = 5kΩ, CL = 100pF
2μs/div
OUTA,
AC-COUPLED
10mV/div
DIGITAL FEEDTHROUGH (SCLK = 100kHz)

MAX525-08
SCLK,
2V/div
CS = PDL = CL = 5V, DIN = 0V
DAC A CODE SET TO 800 HEX
VREF = 2.5V, RL = 5kΩ, CL = 100pF
DAC A CODE SWITCHING FROM 00B HEX TO FFF HEX
DAC B CODE SET TO 800 HEX
10μs/div
GND
OUTB,
AC-COUPLED
10mV/div
ANALOG CROSSTALK

MAX525-12
OUTA,
1V/div
VREF = 2.5V, RL = 5kΩ, CL = 100pF
SWITCHING FROM CODE 000 HEX TO FB4 HEX
OUTPUT AMPLIFIER GAIN = +2
10μs/div
DYNAMIC RESPONSE

MAX525-13
OUTA,
1V/div
VREF = 2.5V, RL = 5kΩ, CL = 100pF
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
____________________________Typical Operating Characteristics (continued)

(VDD = +5V, TA = +25°C, unless otherwise noted.)
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
______________________________________________________________Pin Description

Serial-Data InputDIN9
Serial Clock InputSCLK10
Digital GroundDGND11
Serial-Data OutputDOUT12
User-Programmable Logic OutputUPO13
DAC B Output Amplifier FeedbackFBB5
Reference Voltage Input for DAC A and DAC BREFAB6
Clear All DACs and Registers. Resets all outputs (OUT_, UPO, DOUT) to 0, active low.CL7
Chip-Select Input. Active low.CS8
DAC B Output VoltageOUTB4
DAC A Output VoltageOUTA3
PIN

DAC A Output Amplifier FeedbackFBA2
Analog GroundAGND1
FUNCTIONNAME

Power-Down Lockout. Active low. Locks out software shutdown if low.PDL14
Reference Voltage Input for DAC C and DAC DREFCD15
DAC C Output Amplifier FeedbackFBC16
DAC C Output VoltageOUTC17
DAC D Output VoltageOUTD18
DAC D Output Amplifier FeedbackFBD19
Positive Power SupplyVDD20
MAX525
Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
_______________Detailed Description

The MAX525 contains four 12-bit, voltage-output digi-
tal-to-analog converters (DACs) that are easily
addressed using a simple 3-wire serial interface. It
includes a 16-bit data-in/data-out shift register, and
each DAC has a doubled-buffered input composed of
an input register and a DAC register (see Functional
Diagram). In addition to the four voltage outputs, each
amplifier’s negative input is available to the user.
The DACs are inverted R-2R ladder networks that con-
vert 12-bit digital inputs into equivalent analog output
voltages in proportion to the applied reference voltage
inputs. DACs A and B share the REFAB reference input,
while DACs C and D share the REFCD reference input.
The two reference inputs allow different full-scale output
voltage ranges for each pair of DACs. Figure 1 shows a
simplified circuit diagram of one of the four DACs.
Reference Inputs

The two reference inputs accept positive DC and AC
signals. The voltage at each reference input sets the
full-scale output voltage for its two corresponding
DACs. The reference input voltage range is 0V to (VDD
- 1.4V). The output voltages (VOUT_)are represented by
a digitally programmable voltage source as:
VOUT_= (VREFx NB / 4096) x Gain
where NB is the numeric value of the DAC’s binary
input code (0 to 4095), VREFis the reference voltage,
and Gain is the externally set voltage gain.
The impedance at each reference input is code-depen-
dent, ranging from a low value of 10kΩwhen both
DACs connected to the reference have an input code
of 555 hex, to a high value exceeding several gigohms
(leakage currents) with an input code of 000 hex.
Because the input impedance at the reference pins is
code-dependent, load regulation of the reference
source is important.
The REFAB and REFCD reference inputs have a 10kΩ
guaranteed minimum input impedance. When the two
reference inputs are driven from the same source, the
effective minimum impedance is 5kΩ. A voltage refer-
ence with a load regulation of 6ppm/mA, such as the
MAX873, would typically deviate by 0.025LSB
(0.061LSB worst case) when driving both MAX525 ref-
erence inputs simultaneously at 2.5V. Driving the
REFAB and REFCD pins separately improves reference
accuracy.
In shutdown mode, the MAX525’s REFAB and REFCD
inputs enter a high-impedance state with a typical input
leakage current of 0.01µA.
The reference input capacitance is also code depen-
dent and typically ranges from 20pF with an input code
of all 0s to 100pF with an input code of all 1s.
Output Amplifiers

All MAX525 DAC outputs are internally buffered by preci-
sion amplifiers with a typical slew rate of 0.6V/µs. Access
to the inverting input of each output amplifier provides
the user greater flexibility in output gain setting/
signal conditioning (see the Applications Information sec-
tion).
With a full-scale transition at the MAX525 output, the
typical settling time to ±1/2LSB is 12µs when loaded
with 5kΩin parallel with 100pF (loads less than 2kΩ
degrade performance).
The MAX525 output amplifier’s output dynamic respons-
es and settling performances are shown in the Typical
Operating Characteristics.
Power-Down Mode

The MAX525 features a software-programmable shut-
down that reduces supply current to a typical value of
10µA. The power-down lockout (PDL) pin must be high to
enable the shutdown mode. Writing 1100XXXXXXXXXXXX
as the input-control word puts the MAX525 in power-
down mode (Table 1).
OUT_
FB_
SHOWN FOR ALL 1s ON DAC
D0 D9D10D112R2R2R2RR
REF_
AGND
Figure 1. Simplified DAC Circuit Diagram
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