MAX521ACAG+ ,Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail OutputsMAX520/MAX52119-0378; Rev 3; 9/96Quad/Octal, 2-Wire Serial 8-Bit DACsw ith Rail-to-Rail Outputs____ ..
MAX521ACPP ,Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail OutputsFeatures' Single +5V SupplyThe MAX520/MAX521 are quad/octal, 8-bit voltage-outputdigital-to-analog ..
MAX521ACWG ,Octal, 2-wire serial 8-bit DAC with Rail-to-Rail, unbuffered outputs. TUE(LSB) 1.ApplicationsOrdering Information continued at end of data sheet.Minimum Component Analog Systems†MA ..
MAX521AEAG ,Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail OutputsGeneral Description ________
MAX521AEWG ,Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail OutputsELECTRICAL CHARACTERISTICS(V = 5V ±10%, V = 4V, R = ¥ (MAX520), R = 10kΩ (MAX521), C = 0pF (MAX520) ..
MAX521AEWG+T ,Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail OutputsMAX520/MAX52119-0378; Rev 3; 9/96Quad/Octal, 2-Wire Serial 8-Bit DACsw ith Rail-to-Rail Outputs____ ..
MAX9711 ,3W Mono/Stereo BTL Audio Power Amplifiers with ShutdownBlock DiagramPin ConfigurationsTOP VIEWSINGLE SUPPLY4.5V TO 5.5V20 19 18 17 16LEFT IN15 PGNDINL 1BI ..
MAX9711ETC+ ,3W Mono/Stereo BTL Audio Power Amplifiers with Shutdownfeatures♦ Low Quiescent Current: 7mA include low 2mV V (minimizing DC current drainOS♦ Low-Power Sh ..
MAX9711ETC+T ,3W Mono/Stereo BTL Audio Power Amplifiers with ShutdownFeaturesThe MAX9710/MAX9711 are stereo/mono 3W bridge-tied♦ 3W into 3Ω (1% THD+N)load (BTL) audio p ..
MAX9712EUB , 500mW, Low EMI, Filterless, Class D Audio Amplifier
MAX9713ETJ ,6W, Filterless, Spread-Spectrum Mono/Stereo Class D AmplifiersFeatures♦ Filterless Class D AmplifierThe MAX9713/MAX9714 mono/stereo class D audiopower amplifiers ..
MAX9713ETJ ,6W, Filterless, Spread-Spectrum Mono/Stereo Class D AmplifiersApplicationsOrdering InformationLCD Monitors High-End NotebookPIN-PACKAGEAudio PART TEMP RANGE AMPL ..
MAX520ACAP+-MAX520ACWE+-MAX520BCAP+-MAX520BCWE+-MAX520BEAP+-MAX521ACAG+-MAX521AEWG+T-MAX521BCPP+
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs
_______________General DescriptionThe MAX520/MAX521 are quad/octal, 8-bit voltage-output
digital-to-analog converters (DACs) with simple 2-wire ser-
ial interfaces that allow communication between multiple
devices. They operate from a single +5V supply and their
reference input range includes both supply rails.
The MAX521 includes rail-to-rail output buffer amplifiers for
reduced system size and component count when driving
loads. The MAX520’s unbuffered voltage outputs reduce
the device’s total supply current to 4μA and provide
increased accuracy at low output currents.
The MAX520/MAX521 feature a serial interface and internal
software protocol, allowing communication at data rates up
to 400kbps. The interface, combined with the double-
buffered input configuration, allows the DAC registers to be
updated individually or simultaneously. In addition, the
devices can be put into a low-power shutdown mode that
reduces supply current to 4μA. Power-on reset ensures the
DAC outputs are at 0V when power is initially applied.
The MAX520 is available in 16-pin DIP and wide SO pack-
ages, as well as a space-saving 20-pin SSOP. The
MAX521 comes in 20-pin DIP and 24-pin SO packages, as
well as a space-saving 24-pin SSOP.
________________________ApplicationsMinimum Component Analog Systems
Digital Offset/Gain Adjustment
Industrial Process Control
Automatic Test Equipment
Programmable Attenuators
____________________________FeatureSingle +5V SupplySimple 2-Wire Serial InterfaceI2C CompatibleOutputs Swing Rail to Rail:
Unbuffered Outputs (MAX520)
Buffered Outputs (MAX521)1%-Accurate Trimmed Output Resistance (MAX520A)Ultra-Low 4μA Supply Current (MAX520)Individual DACs Have Separate Reference InputsPower-On Reset Clears All Latches4μA Power-Down Mode
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail OutpuOUT1
OUT2
OUT3REF2
REF3
VDDAD2
AD1
AD0
OUT0REF1REF0AGNDDGNDSCL
SDA
TOP VIEW
MAX520
DIP/SO
_________________Pin ConfigurationsINPUT
LATCH 0
8-BITSHIFT REGISTER
SCLREF0SDAREF1
OUTPUT
LATCH 0DAC0OUT0
MAX520
ADDRESS
COMPARATOR
START/STOPDETECTOR
DECODE
OUTPUTLATCH 1DAC1OUT1
INPUT
LATCH 2
OUTPUT
LATCH 2DAC2OUT2
OUT3INPUT
LATCH 3
OUTPUT
LATCH 3DAC3
REF3REF2AD2
AD1
AD0
INPUTLATCH 1
_______________Functional Diagrams
______________Ordering Information19-0378; Rev 3; 9/96
PART†
MAX520ACPEMAX520BCPE
MAX520ACWE0°C to +70°C
0°C to +70°C
0°C to +70°C
TEMP. RANGEPIN-PACKAGE16 Plastic DIP
16 Plastic DIP
16 Wide SO
TUE
(LSB)Pin Configurations continued at end of data sheet.Functional Diagrams continued at end of data sheet.
MAX520BCWE0°C to +70°C16 Wide SO1
Ordering Information continued at end of data sheet.†MAX520 “A” grade parts include a 1%-accurate, factory-trimmed
output resistance.
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Outputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 5V ±10%, VREF_= 4V, RL= ¥(MAX520), RL= 10kΩ(MAX521), CL= 0pF (MAX520), CL= 100pF (MAX521), TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto DGND...........................................................-0.3V to +6V
VDDto AGND............................................................-0.3V to +6V
OUT_..........................................................-0.3V to (VDD+ 0.3V)
REF_...........................................................-0.3V to (VDD+ 0.3V)
AD0, AD1, AD2...........................................-0.3V to (VDD+ 0.3V)
SCL, SDA to DGND..................................................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW
20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW
16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW
24-Pin Wide SO (derate 11.76mW/°C above +70°C)....941mW
20-Pin SSOP (derate 8.00mW/°C above +70°C).........640mW
24-Pin SSOP (derate 8.00mW/°C above +70°C).........640mW
16-Pin CERDIP (derate 10.00mW/°C above +70°C)....800mW
20-Pin CERDIP (derate 11.11mW/°C above +70°C)....889mW
Operating Temperature Ranges
MAX520_C_ _/MAX521_C_ _..............................0°C to +70°C
MAX520_E_ _/MAX521_E_ _...........................-40°C to +85°C
MAX520_MJE/MAX521BMJP........................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
CONDITIONSBits8Resolution
UNITSMINTYPMAXSYMBOLPARAMETER±1.5
Guaranteed monotonic
LSB±1.0DNL
LSB
TUETotal Unadjusted Error
Differential Nonlinearity
Code = 00 hex
Code = 00 hex
μV/°C±10
Code = 00 hexZero-Code-Error Supply Rejection
Zero-Code-Error Temperature Coefficient
Code = FF hexmVFull-Scale Error
ZCE20Zero-Code Error
Code = FF hex, VDD= 5V ±10%
μV/°C±10±1Full-Scale-Error Supply Rejection
Full-Scale-Error Temperature Coefficient
MAX520_
MAX520_
MAX521B
MAX521A
MAX521_C
MAX521_E
MAX521BM
MAX520_MAX521_C
MAX521_E
MAX521BM
STATIC ACCURACY
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Output
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±10%, VREF_= 4V, RL= ¥(MAX520), RL= 10kΩ(MAX521), CL= 0pF (MAX520), CL= 100pF (MAX521), TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C)
(Note 3)
CONDITIONSInput Capacitance24
RINInput Resistance
REF4
MAX520_
MAX521_
Input Current
-600VDDInput Voltage Range-70±10
REF4
PD = 16
Code =
55 hex
(Note 1)12MAX520_
REF0–REF3
Channel-to-Channel Isolation-70AC Feedthrough
Code =
FF hex
(Note 2)
UNITSMINTYPMAXSYMBOLPARAMETERMAX520_
REF0–REF3
15.81616.20VDDFull-Scale Output Voltage
Output Resistance (Note 5)
MAX521_, OUT_ = 4V,
0mA to 2.5mA0.25
MAX521_, OUT_ = 0V to VDD,
PD = 1μA±10Output Leakage Current0.3VDDVILInput Low Voltage
(Note 5)V0.05VDDVHYSTInput Hysteresis
0V ≤VIN≤VDDμA±10IINInput Current0.7VDDVIHInput High Voltage
MAX521BM, VREF_= VDD,
code = FF hex, 0μA to 500μA
LSB
Output Load Regulation
(Note 5)pF10CINInput Capacitance0.8VILInput Low Voltage
VIN= 0V to VDDμA±10IINInput Leakage2.4VIHInput High Voltage
MAX520B
MAX521_C/E, VREF_= VDD,
code = FF hex, 0μA to 500μA1.5
ISINK= 6mA0.6VOLOutput Low Voltage
(Note 5)pF10COUTThree-State Output Capacitance
VIN= 0V to VDDμA±10ILThree-State Leakage Current
ISINK= 3mAV0.4
REFERENCE INPUTS
DIGITAL INPUTS SCL, SDA
DIGITAL INPUTS AD0, AD1
DIGITAL OUTPUT SDA(Note 6)
(Note 4)
DAC OUTPUTSMAX521_
MAX521_
MAX520ATA= +25°C= TMIN to TMAX
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Outputs
Note 1:Input resistance is code dependent. The lowest input resistance occurs at code = 55 hex.
Note 2:Input capacitance is code dependent. The highest input capacitance occurs at code = FF hex.
Note 3:VREF_= 4Vp-p, 10kHz. Channel-to-channel isolation is measured by setting the code of one DAC to FF hex and setting the
code of all other DACs to 00 hex.
Note 4:VREF_= 4Vp-p, 10kHz, DAC code = 00 hex.
Note 5:Guaranteed by design.
Note 6:I2C-compatible mode.
Note 7:Output settling time is measured by taking the code from 00 hex to FF hex, and from FF hex to 00 hex.
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±10%, VREF_= 4V, RL= ¥(MAX520), RL= 10kΩ(MAX521), CL= 0pF (MAX520), CL= 100pF (MAX521), TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C)
MAX521BM
MAX521_C
0.7MAX521_E
MAX520_
MAX521_C
MAX521_E/BM
Power-down mode (PD = 1)2020
Positive and negative
CONDITIONSV/μs
Voltage Output Slew Rate
Operating mode, out-
put unloaded, all dig-
ital inputs 0V or VDDmA20
IDD1024Supply Current
UNITSMINTYPMAXSYMBOLPARAMETERMAX520_, to 1/2LSB, no load
Output Settling Time
Code = 00 hex, all digital inputs from
0V to VDDnV-s5Digital Feedthrough
MAX521_, to 1/2LSB, 10kΩand
100pF load (Note 7)6
Code 128 to 127nV-s12Digital-Analog Glitch Impulse
VREF_= 4Vp-p at 1kHz, VDD= 5V,
code = FF hexdB87SINADSignal to Noise + Distortion Ratio
VREF_= 4Vp-p, 3dB bandwidthMHz1Multiplying Bandwidth
MAX521_μVRMS60Wideband Amplifier Noise4.55.5VDDSupply Voltage
DYNAMIC PERFORMANCE
POWER REQUIREMENTS
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Output
Note 8:A master device must provide a hold time of at least 300ns for the SDA signal (referred to VILof the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 9:Cb = total capacitance of one bus line in pF. tRand tfmeasured between 0.3VDDand 0.7VDD.
Note 10:An input filter on the SDA and SCL input suppresses noise spikes less than 50ns.
Note 11:Guaranteed by design.
Hold Time, (Repeated) Start ConditiontHD, STA0.6μs
Low Period of the SCL ClocktLOW1.3μs
High Period of the SCL ClocktHIGH0.6
PARAMETERSYMBOLMINTYPMAXUNITSSerial Clock FrequencyfSCL0400kHz
Bus Free Time Between a STOP and a
START ConditiontBUF1.3μs
CONDITIONSSetup Time for a Repeated START ConditiontSU, STA0.6μs
Data Hold TimetHD, DAT00.9μs
Data Setup TimetSU, DAT100
(Note 8)
Fall Time of SDA Transmitting (Note 6)tF20 + 0.1Cb250ns
Setup Time for STOP ConditiontSU, STO0.6μs
Capacitive Load for Each Bus LineCb400
ISINK≤6mA (Note 9)
Rise Time of Both SDA and SCL Signals, ReceivingtR20 + 0.1Cb300ns
Fall Time of Both SDA and SCL Signals, ReceivingtF20 + 0.1Cb300
(Note 9)
(Note 9)ns
Pulse Width of Spike SuppressedtSP050(Notes 10, 11)ns
TIMING CHARACTERISTICS(VDD= 5V ±10%, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
__________________________________________Typical Operating Characteristics(VDD= 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.)
MAX520
SUPPLY CURRENT vs. TEMPERATURE
AX520/521-01
TEMPERATURE (°C)
(m60
OPERATING MODE OR
SHUTDOWN MODE
MAX520
REFERENCE INPUT CURRENT vs.
TEMPERATURE (SHUTDOWN MODE)
AX520/521-02
TEMPERATURE (°C)
(n60
VREF = 4V
ONE REF INPUT DRIVEN0100k10k1M10M
MAX520
REFERENCE VOLTAGE INPUT
FREQUENCY RESPONSEAX520/521-03
FREQUENCY (Hz)
(d
VDD = 5V
VREF = 4Vp-p SINE WAVE
CENTERED AT 2.5V
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Outputs
______________________________Typical Operating Characteristics (continued)(VDD= 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.)
OUT2 = NO LOAD, REF2 = 4V,
DAC CODE = 00 HEX to FF HEXs/div
MAX520
POSITIVE SETTLING TIMEOUT2
1V/div
OUT2 = NO LOAD, REF2 = 4V,
DAC CODE = FF HEX to 00 HEXs/div
MAX520
NEGATIVE SETTLING TIMEOUT2
1V/div
REF2 = 4V, DAC CODE = 7F HEX to 80 HEX
500ns/div
MAX520
WORST-CASE 1LSB DIGITAL STEP CHANGE
(CAPACITIVE LOAD < 5pF)OUT2
20mV/div
AC COUPLED
REF2 = 4V, DAC CODE = 7F HEX to 80 HEX
500ns/div
MAX520
WORST-CASE 1LSB DIGITAL STEP CHANGE
(CAPACITIVE LOAD = 25pF)OUT2
20mV/div
AC COUPLED
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail OutputMAX521
SUPPLY CURRENT vs. TEMPERATURE
MAX520/521-08
TEMPERATURE (°C)
(m100
VDD = 5.5V
ALL REF INPUTS = 0.6V
ALL DIGITAL INPUTS to VDD
ALL DAC CODES FF HEX
ALL DAC CODES 00 HEX
MAX521
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATUREM
AX520/521-09
TEMPERATURE (°C)
IC
(m100
VDD = 5.5V
ALL REF INPUTS = 0.6V
ALL DIGITAL INPUTS to VDD10135
MAX521
SUPPLY CURRENT
vs. REFERENCE VOLTAGEAX520/521-10
REFERENCE VOLTAGE (V)4
ALL REFERENCE
INPUTS DRIVEN
ALL DAC CODES = FF HEX
ALL DAC CODES = 00 HEX
MAX521
DAC OUTPUT HIGH VOLTAGE
vs. OUTPUT SOURCE CURRENT
AX520/521-11
OUTPUT SOURCE CURRENT (mA)
- V8
VREF = 5V
DAC CODE = FF HEX
LOAD to AGND
VOUT = VREF x (255/256)
MAX521
DAC OUTPUT LOW VOLTAGE
vs. OUTPUT SINK CURRENT
MAX520/521-12
OUTPUT SINK CURRENT (mA)
(V8
VREF = 5V
DAC CODE = 00 HEX
LOAD to VDD100k10k1M10M
MAX521
REFERENCE VOLTAGE INPUT
FREQUENCY RESPONSEMAX520/521-13
FREQUENCY (Hz)
(d
VREF = SINE WAVE
CENTERED AT 2.5V
4Vp-p SINE
2Vp-p SINE
1Vp-p SINE
0.5Vp-p SINE
__________________________________________Typical Operating Characteristic(VDD= 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.)
OUT1 LOADED WITH 10kW II 100pF, REF1 = 4V,
DAC CODE = 00 HEX to FF HEXs/div
MAX521
POSITIVE SETTLING TIMEOUT1
1V/div
OUT1 LOADED WITH 10kW II 100pF, REF1 = 4V,
DAC CODE = FF HEX to 00 HEXs/div
MAX521
NEGATIVE SETTLING TIMEOUT1
1V/div
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail OutputsA = REF1, 1V/div (4VP-P)
B = OUT1, 50mV/div, UNLOADED
FILTER PASSBAND = 1kHz to 100kHz, DAC CODE = 00 HEX
REFERENCE FEEDTHROUGH AT 10kHzA = REF1, 1V/div (4VP-P)
B = OUT1, 50mV/div, UNLOADED
FILTER PASSBAND = 10kHz to 1MHz, DAC CODE = 00 HEX
REFERENCE FEEDTHROUGH AT 100kHz
______________________________Typical Operating Characteristics (continued)(VDD= 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.)
REF1 = 5V, DAC CODE = 80 HEX to 7F HEX
500ns/div
MAX521
WORST-CASE 1LSB DIGITAL STEP CHANGEOUT1
20mV/div
AC COUPLED
A = SCL, 400kHz, 5V/div
B = OUT1, 5mV/div
REF1 = 5V, DAC CODE = 7F HEX
CLOCK FEEDTHROUGHA = REF1, 1V/div (4VP-P)
B = OUT1, 50mV/div, UNLOADED
FILTER PASSBAND = 100Hz to 10kHz, DAC CODE = 00 HEX
REFERENCE FEEDTHROUGH AT 1kHzQuad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Output
______________________________________________________________Pin DescriptionSCL
SDA
tLOW
tHIGHtR
tHD, STA
tHD, DAT
tHD, STA
tSU, DATtSU, STAtBUF
tSU, STO
START CONDITIONSTOP CONDITIONREPEATED START CONDITIONSTART CONDITION
Figure 1. 2-Wire Serial-Interface Timing Diagram
DIPSO/SSOPDIP/SOSSOP
PIN
MAX521NAMEMAX5207, 9, 16, 2019
Serial Clock InputSCL7
Serial Data InputSDA8
DAC4 Voltage OutputOUT4—
DAC5 Voltage OutputOUT5—
DAC6 Voltage OutputOUT6—
Reference Voltage Input for DAC0REF04
No Connect—not internally connectedN.C.—
Digital GroundDGND6
Analog GroundAGND5
Reference Voltage Input for DAC1REF13
DAC0 Voltage OutputOUT02
DAC1 Voltage OutputOUT11
4, 7, 14, 17
DAC7 Voltage OutputOUT7—
Address Input 0; sets IC’s slave addressAD09
Address Input 1; sets IC’s slave addressAD110
Power Supply, +5VVDD12
Reference Voltage Input for DACs 4, 5, 6, and 7REF4——
Reference Voltage Input for DAC3REF313
Reference Voltage Input for DAC2REF214
DAC3 Voltage OutputOUT315
DAC2 Voltage OutputOUT216
FUNCTION—Address Input 2; sets IC’s slave addressAD21113
Quad/Octal, 2-Wire Serial 8-Bit DACsith Rail-to-Rail Outputs
_______________Detailed Descriptionrial InterfaceThe MAX520/MAX521 use a simple 2-wire serial interface
requiring only two I/O lines (2-wire bus) of a standard
microprocessor (μP) port. Figure 1 shows the timing dia-
gram for signals on the 2-wire bus. Figure 2 shows the
typical application of the MAX520/MAX521. The 2-wire
bus can have several devices (in addition to the
MAX520/MAX521) attached. The two bus lines (SDA and
SCL) must be high when the bus is not in use. When in
use, the port bits are toggled to generate the appropriate
signals for SDA and SCL. External pull-up resistors are
not required on these lines. The MAX520/MAX521 can
be used in applications where pull-up resistors are
required (such as in I2C systems) to maintain compatibil-
ity with the existing circuitry.
The MAX520/MAX521 are receive-only devices and
must be controlled by a bus master device. They oper-
ate at SCL rates up to 400kHz. A master device sends
information to the devices by transmitting their address
over the bus and then transmitting the desired informa-
tion. Each transmission consists of a START condition,
the MAX520/MAX521’s programmable slave-address,
one or more command-byte/output-byte pairs (or a
command byte alone, if it is the last byte in the trans-
mission), and finally, a STOP condition (Figure 3).
The address byte and pairs of command and output
bytes are transmitted between the STARTand STOPcon-
ditions. The SDA state is allowed to change only while
SCL is low. SDA’s state is sampled, and therefore must
remain stable while SCL is high. The only exceptions to
this are the STARTand STOPconditions. Data is transmit-
ted in 8-bit bytes. Nine clock cycles are required to trans-
fer the data bits to the MAX520/MAX521. Set SDA low
during the 9th clock cycle as the MAX520/MAX521 pull
SDA low during this time. RC(Figure 2) limits the current
that flows during this time if SDA stays high for short peri-
ods of time.
MAX520
SDA
RC
SCLCREF0
SDA
SCL
AD1
AD0
+1V
QUAD
DAC
REF1+4V
REF2+5V
OFFSET ADJUSTMENT
REF3
OUT0
OFFSET ADJUSTMENT
GAIN ADJUSTMENT
GAIN ADJUSTMENT
OUT1
OUT2
OUT3
AD2
REF0
SDA
SCL
AD1
AD0
OCTAL
DAC
+5V
BRIGHTNESS ADJUSTMENT
REF4
OUT0
CONTRAST ADJUSTMENTOUT1
THRESHOLD
ADJUSTMENTS
OUT2
OUT6
OUT7+5V
+5V
+12V
MOTOR
MAX521
Figure 2. Typical Application Circuit
START CONDITIONSTOP CONDITION
OUTPUT BYTECOMMAND BYTESLAVE ADDRESS BYTE
SCL
SDA
MSBMSBMSBLSBLSBLSBACKACKACK
Figure 3. A Complete Serial Transmission
