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MAX5167MCCM
32-Channel Sample/Hold Amplifier with Output Clamping Diodes
General DescriptionThe MAX5167 contains 32 sample-and-hold amplifiers
driven by a single multiplexed input. The control logic
addressing the outputs is a simple 5-wire input to the
multiplexer. Additional logic allows two devices to function
as a single 64-channel unit. Clamping diodes on each
output allows clamping between two external
reference voltages. The MAX5167 is available with an
output impedance of 50Ω, 500Ω, or 1kΩ.
The MAX5167 operates with +10V and -5V supplies,
and a separate +5V digital logic supply. Manufactured
with a proprietary BiCMOS process, it provides high
accuracy, fast acquisition time, low droop rate, and a
low hold step. The MAX5167 has a typical linearity error
of less than 0.01% and can accurately acquire an 8V
step input signal to 0.01% accuracy in 2.5µs within the
+7V to -4V input signal range. Transitions from sample
mode to hold mode result in only a 0.5mV error. While
in hold mode, the output voltage slowly droops at a rate
of 1mV/s.
The MAX5167 is available in a 48-pin TQFP package and
is specified for both the commercial (0°C to +70°C) and
extended-industrial (-40°C to +85°C) temperature ranges.
________________________ApplicationsAutomatic Test Systems (ATE)
Industrial Process Controls
Arbitrary Function Generators
Avionics Equipment
Features32-Channel Sample/HoldOutput Clamps on Each Channel0.01% Accuracy of Acquired Signal0.01% Linearity ErrorFast Acquisition Time: 2.5µsLow Droop Rate: 1mV/sLow Hold Step: 0.25mVWide Output Voltage Range: +7V to -4V
MAX5167
32-Channel Sample/Hold Amplifier
with Output Clamping DiodesOUT21
OUT20
OUT19
OUT18
OUT17
OUT16
VDD
OUT15
OUT14
OUT13
OUT12
OUT11
ADDR2
ADDR3
ADDR4
SELECT
S/H
CONFIG
DGND
VSS
AGND14151617181920212223244746454443424140393837
OUT0OUT1OUT2OUT3OUT4OUT5OUT6OUT7OUT8OUT9
OUT10
ADDR1ADDR0OUT31OUT30OUT29OUT28OUT27OUT26OUT25OUT24OUT23OUT22
TQFPMAX5167
TOP VIEW
Pin Configuration19-1675; Rev 0; 4/00
Ordering Information48 TQFP
PIN-
PACKAGETEMP. RANGE0°C to +70°CMAX5167LCCM
PART48 TQFP0°C to +70°CMAX5167MCCM
48 TQFP0°C to +70°CMAX5167NCCM
48 TQFP-40°C to +85°CMAX5167LECM
48 TQFP-40°C to +85°CMAX5167MECM
48 TQFP-40°C to +85°CMAX5167NECM
ROUT(Ω)500
MAX5167
32-Channel Sample/Hold Amplifier
with Output Clamping Diodes
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= +10.0V, VSS= -5.0V, VL= +5.0V ±5%, AGND = DGND = 0, RL= 5kΩ, CL= 50pF, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND.......................................................-0.3V to +11.0V
VSSto AGND.........................................................-6.0V to +0.3V
VDDto VSS......................................................................+15.75Vto DGND...........................................................-0.3V to +6.0Vto AGND...........................................................-0.3V to +6.0V
DGND to AGND.....................................................-0.3V to +2.0V
IN, OUT_ ....................................................................VSSto VDD
Logic Inputs to DGND...........................................-0.3V to +6.0V
CH, CLto AGND..................................................-6.0V to +11.0V
Maximum Current into CLand CH..................................±80mA
Maximum Current into Out_.............................................±10mA
Maximum Current into Logic Inputs................................±20mA
Continuous Power Dissipation (TA= +70°C)
48-Pin TQFP (derate 12.5mW/°C above +70°C)........1000mW
Operating Temperature Ranges
MAX5167_CCM..................................................0°C to +70°C
MAX5167_ECM................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Figure 2 (Note1)
IN = AGND
To ±1mV of final value Figure 2 (Note1)
100mV step to ±1mV,= ∞, Figure 2
-4.0V < VIN < +7V RL = ∞
8V step to 0.08%,= ∞, Figure 2= ∞,= 250pF
(Note 1)
VIN= 0, sample mode
VIN= 0, sample mode
8V step with 500ns
rising edge (Note 1)
MAX5167N
IN = AGND
IN = AGND
+15°C ≤TA≤+65°C (Note 1)= +25°C
RL = ∞= +25°C
CONDITIONS200tAPAperture Delay12tHHold Mode Settling Time
tAQAcquisition TimeVSSVDDVCLOutput Clamp LowVSSVDDVCHOutput Clamp High2ISINKOutput Sink Current2ISOURCEOutput Source Current
350500650ROUT_0.251.00VHSHold Step0.010.08Linearity Error5065
DC Output Impedance1020CINInput Capacitance
MAX5167M
MAX5167L
Analog Crosstalk
mV/s140Droop Rate-30-5+30VOSOffset VoltageµV/°C2040= 250pF for
MAX5167L= 10nF for
MAX5167M/67NVSS+VDD-
0.752.4VOUT_Output Voltage Range
UNITSMINTYPMAXSYMBOLPARAMETER= +25°C= +25°C
ANALOG SECTION
TIMING PERFORMANCE
MAX5167
32-Channel Sample/Hold Amplifier
with Output Clamping Diodes
ELECTRICAL CHARACTERISTICS (continued)(VDD= +10.0V, VSS= -5.0V, VL= +5.0V ±5%, AGND = DGND = 0, RL= 5kΩ, CL= 50pF, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.)
Note 1:Guaranteed by design.
Note 2:Do not exceed the absolute maximum rating for VDDto VSSof +15.75V (see Absolute Maximum Ratings).
Figure 2 (Note1)
Figure 2 (Note1)
CONDITIONS50tDSData Setup Time200tPWS/H Pulse Width
ADDR_ = +0.8V or +2.0V, S/H =
+0.8V or +2.0VmA5
UNITSMINTYPMAXSYMBOLPARAMETER= ∞= ∞
(Note 2)
(Note 2)
IN = DGND or VCC
Figure 2 (Note1)36ISSNegative Analog Supply Current36IDDPositive Analog Supply Current4.7555.25VLDigital Logic Supply-4.75-5-5.45VSSNegative Analog Supply9.51010.5VDDPositive Analog Supply-1+1IIInput Current0.8VILInput Voltage Low2.0VIHInput Voltage High150tDHData Hold Time
For VDDand VSS, sample mode,
IN = AGND
ADDR_ = DGND or VL, S/H =
DGND or VL-60-75PSRRPower-Supply Rejection Ratio0.5Digital Logic Supply Current
POWER SUPPLIES
DIGITAL INPUTS
MAX5167
32-Channel Sample/Hold Amplifier
with Output Clamping Diodes
Typical Operating Characteristics(VDD= +10V, VSS= -5V, VL= +5V, VIN= +5V, RL= ∞, CL= 0, AGND = DGND = 0, VCH= VDD, VCL= VSS, TA= +25°C, unless
otherwise noted.)
DROOP RATE vs. INPUT VOLTAGE
MAX5167 TOC 01
INPUT VOLTAGE (V)
DROOP RATE (mV/s)
DROOP RATE vs. TEMPERATURE
MAX5167 TOC 02
TEMPERATURE (°C)
DROOP RATE (mV/s)
0.1101100100010,000
PSRR SAMPLE MODEMAX5167 TOC 03
FREQUENCY (kHz)
PSRR (dB)
NEGATIVE SUPPLY (VSS)
POSITIVE SUPPLY (VDD)
0.1101100100010,000
PSRR HOLD MODEMAX5167 TOC 04
FREQUENCY (kHz)
PSRR (dB)
NEGATIVE SUPPLY (VSS)
POSITIVE SUPPLY (VDD)
HOLD STEP vs. INPUT VOLTAGE
MAX5167 TOC 05
INPUT VOLTAGE (V)
HOLD STEP (
HOLD STEP vs. TEMPERATURE
MAX5167 TOC 06
TEMPERATURE (°C)
HOLD STEP (
OFFSET VOLTAGE vs. INPUT VOLTAGE
MAX5167 TOC 07
INPUT VOLTAGE (V)
OFFSET VOLTAGE (mV)
OFFSET VOLTAGE vs. TEMPERATURE
MAX5167 TOC 08
TEMPERATURE (°C)
OFFSET VOLTAGE (mV)
MAX5167
32-Channel Sample/Hold Amplifier
with Output Clamping Diodes
NAMEFUNCTIONADDR2Bit 2 of the Address DecoderADDR3Bit 3 of the Address Decoder
PINADDR4Bit 4 of the Address DecoderSELECT
Enables the S/H pin. The polarity of SELECT is determined by the state of the CONFIG pin. If CONFIG
is low, then SELECT is active-high. If CONFIG is high, then SELECT is active-low. When SELECT is not
in its active state, all 32 channels are in hold mode independent of the S/H pin.DGNDDigital GNDVL+5V Logic SupplyCONFIGSets the polarity of the SELECT pin.S/HPuts the selected channel into sample mode when low. Places all channels into hold mode when high.CLClamp Low PinCHClamp High PinINInput PinAGNDAnalog GNDVSS-5V Analog Supply
Pin DescriptionADDR0Bit 0 of the Address Decoder
31–46OUT16–OUT31Output 16–31 PinVDD+10V Analog Supply
14–29OUT0–OUT15Output 0–15 PinADDR1Bit 1 of the Address Decoder
MAX5167
Detailed Description
Digital InterfaceThe MAX5167 has three logic control inputs and five
address lines. The address lines are inputs to a demul-
tiplexer that selects one of the 32 outputs in a standard
addressing scheme (Table 1). The analog input is con-
nected to the addressed sample/hold when directedby
the control logic (Table 2).
The three logic control lines determine the state of the
addressed sample/hold. The normal circuit connection
for this device is to hardwire CONFIG and SELECT to
opposing logic voltages. When SELECT and CONFIG
are in opposite states (one high and the other low), the
five address lines select one of the sample/holds. Use
the S/H line to place the selected channel into sample
or hold mode. The other 31 channels will remain in hold
mode.
If an active-high sampling mode is desired, tie S/H and
CONFIG low. In this case, SELECT controls the
addressed channel with a high state putting that chan-
nel into sample mode.
The SELECT and CONFIG pins allow the design of a
virtual 64-channel device using two of the MAX5167s.
See the Applications Informationsection for more infor-
mation about the 64 output addressing scheme.
Sample/HoldThe MAX5167 contains 32 buffered sample/hold circuits
with internal hold capacitors. Internal hold capacitors
minimize leakage current, dielectric absorption,
feedthrough, and required board space. The value of
the hold capacitor affects acquisition time and droop
rate. Smaller capacitance allows faster acquisition times
but increases the droop rate. Larger values increase
hold acquisition time. The hold capacitor used in the
MAX5167 provides fast 2.5µs (typ) acquisition time while
maintaining a relatively low 1mV/s (typ) droop rate, mak-
ing the sample/hold ideal for high-speed sampling.
Sample ModeWhen SELECT and CONFIG are in opposing logic states,
the S/H line controls the mode of operation. Sample mode
is entered when S/H is low. During sample mode, the
selected multiplexer channel connects to IN, allowing the
32-Channel Sample/Hold Amplifier
with Output Clamping DiodesMAX5167SW1
SW2SW30SW31
ADDR0–ADDR4
S/H
SELECT
CONFIG
OUT0
OUT1
OUT30
OUT31
Figure 1. Functional Diagram
