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MAX5134AGTG+ |MAX5134AGTGMAXIMN/a2avaiPin-/Software-Compatible, 16-/12-Bit, Voltage-Output DACs


MAX5134AGTG+ ,Pin-/Software-Compatible, 16-/12-Bit, Voltage-Output DACsFeatures♦ 16-/12-Bit Resolution Available in a 4mm x 4mm,The MAX5134–MAX5137 is a family of pin-com ..
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MAX5134AGTG+
Pin-/Software-Compatible, 16-/12-Bit, Voltage-Output DACs
General Description
The MAX5134–MAX5137 is a family of pin-compatible
and software-compatible 16-bit and 12-bit DACs. The
MAX5134/MAX5135 are low-power, quad 16-/12-bit,
buffered voltage-output, high-linearity DACs. The
MAX5136/MAX5137 are low-power, dual 16-/12-bit,
buffered voltage-output, high-linearity DACs. They use
a precision internal reference or a precision external ref-
erence for rail-to-rail operation. The MAX5134–MAX5137
accept a wide +2.7V to +5.25V supply-voltage range to
accommodate most low-power and low-voltage applica-
tions. These devices accept a 3-wire SPI-/QSPITM-/
MICROWIRE®-/DSP-compatible serial interface to save
board space and reduce the complexity of optically iso-
lated and transformer-isolated applications. The digital
interface’s double-buffered hardware and software
LDACprovide simultaneous output updates. The serial
interface features a READYoutput for easy daisy-chain-
ing of several MAX5134–MAX5137 devices and/or other
compatible devices. The MAX5134–MAX5137 include a
hardware input to reset the DAC outputs to zero or mid-
scale upon power-up or reset, providing additional safety
for applications that drive valves or other transducers
that need to be off during power-up. The high linearity of
the DACs makes these devices ideal for precision con-
trol and instrumentation applications. The MAX5134–
MAX5137 are available in an ultra-small (4mm x 4mm),
24-pin TQFN package or a 16-pin TSSOP package. Both
packages are specified over the -40°C to +105°C
extended industrial temperature range.
Applications

Automatic Test Equipment
Automatic Tuning
Communication Systems
Data Acquisition
Gain and Offset Adjustment
Portable Instrumentation
Power-Amplifier Control
Process Control and Servo Loops
Programmable Voltage and Current Sources
Features
16-/12-Bit Resolution Available in a 4mm x 4mm,24-Pin TQFN Package or 16-Pin TSSOPHardware-Selectable to Zero/Midscale DAC
Output on Power-Up or Reset
Double-Buffered Input RegistersLDACAsynchronously Updates DAC Outputs
Simultaneously
READYFacilitates Daisy ChainingHigh-Performance 10ppm/°C Internal ReferenceGuaranteed Monotonic Over All OperatingConditionsWide +2.7V to +5.25V Supply RangeRail-to-Rail Buffered Output OperationLow Gain Error (Less Than ±0.5%FS) and Offset(Less Than ±10mV)30MHz 3-Wire SPI-/QSPI-/MICROWIRE-/ DSP-Compatible Serial InterfaceCMOS-Compatible Inputs with HysteresisLow-Power Consumption (ISHDN= 2µA max)
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137

EVALUATION KIT AVAILABLE
QSPI is a trademark of Motorola Inc.
MICROWIRE is a registered trademark of National
Ordering Information

+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Note:
All devices are specified over the -40°C to +105°C oper-
ating temperature range.
PARTPIN-
PACKAGE
RESOLUTION
(BITS)
INL
(LSB)
MAX5134AGTG+
24 TQFN-EP*16 Quad±8
MAX5134AGUE+16 TSSOP16 Quad±8
MAX5135GTG+
24 TQFN-EP*12 Quad±1
MAX5135GUE+16 TSSOP12 Quad±1
MAX5136AGTG+
24 TQFN-EP*16 Dual±8
MAX5136AGUE+16 TSSOP16 Dual±8
MAX5137GTG+
24 TQFN-EP*12 Dual±1
MAX5137GUE+16 TSSOP12 Dual±1
Functional Diagrams, Pin Configurations, and Typical
Operating Circuit appear at end of data sheet.
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VAVDD= 2.7V to 5.25V, VDVDD= 2.7V to 5.25V, VAVDD≥VDVDD, VGND= 0V, VREFI= VAVDD- 0.25V, COUT= 200pF, ROUT= 10kΩ,= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD to GND...........................................................-0.3V to +6V
DVDD to GND...........................................................-0.3V to +6V
OUT0–OUT3 to GND....................................-0.3V to the lower of
(AVDD + 0.3V) and +6V
REFI, REFO, M/Zto GND.............................-0.3V to the lower of
(AVDD + 0.3V) and +6V
SCLK, DIN, CSto GND................................-0.3V to the lower of
(DVDD + 0.3V) and +6V
LDAC, READYto GND.................................-0.3V to the lower of
(DVDD + 0.3V) and +6V
Continuous Power Dissipation (TA= +70°C)
24-Pin TQFN (derate at 27.8mW/°C above +70°C)....2222.2mW
16-Pin TSSOP (derate at 11.1mW/°C above +70°C)....888.9mW
Maximum Current into Any Input or Output
with the Exception of M/ZPin.......................................±50mA
Maximum Current into M/ZPin...........................................±5mA
Operating Temperature Range.........................-40°C to +105°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC ACCURACY (Notes 1, 2)

MAX5134/MAX5136 16 Resolution N MAX5135/MAX5137 12 Bits
(Note 3) -8 ±2 +10 Integral Nonlinearity
(MAX5134/MAX5136) INLVREFI = 5V,
VAVDD = 5.25V TA = +25°C ±6 LSB
Integral Nonlinearity
(MAX5135/MAX5137) INL VREFI = 5V, VAVDD = 5.25V -1 +0.25 +1 LSB
Differential Nonlinearity DNL Guaranteed monotonic -1.0 +1.0 LSB
Offset Error OE (Note 4) -10 ±1 +10 mV
Offset-Error Drift ±4 μV/°C
Gain ErrorGE (Note 4) -0.5 ±0.2 +0.5 % of FS
Gain Temperature Coefficient ±2 ppm
FS/°C
REFERENCE INPUT

VAVDD = 3V to 5.25V 2 VAVDD
Reference-Input Voltage Range VREFIVAVDD = 2.7V to 3V 2 VAVDD
- 0.2
Reference-Input Impedance 113 k
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)

TQFN
Junction-to-Ambient Thermal Resistance (θJA)............36°C/W
Junction-to-Case Thermal Resistance (θJC)...................3°C/W
TSSOP
Junction-to-Ambient Thermal Resistance (θJA)............90°C/W
Junction-to-Case Thermal Resistance (θJC).................27°C/W
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
INTERNAL REFERENCE

Reference Voltage VREFO TA = +25°C 2.437 2.440 2.443 V
Reference Temperature Coefficient (Note 5) 10 25 ppm/°C
Reference Output Impedance 1 
Line Regulation 100 ppm/V
Maximum Capacitive Load CR 0.1 nF
DAC OUTPUT VOLTAGE (Note 2)

Output Voltage Range No load 0.02 VAVDD
- 0.02 V
DC Output Impedance 0.1 
Series resistance = 0 0.2 nF Maximum Capacitive Load
(Note 5) CLSeries resistance = 500 15 μF
Resistive Load RL 2 k
VAVDD = 5.25V ±35 Short-Circuit Current ISCVAVDD = 2.7V -40 ±20 +40 mA
Power-Up Time From power-down mode 25 μs
DIGITAL INPUTS (SCLK, DIN, CS,
LDAC) (Note 6)
Input High Voltage VIH0.7 x
VDVDD V
Input Low Voltage VIL 0.3 x
VDVDDV
Input Leakage Current IIN VIN = 0 or VDVDD -1 ±0.1 +1 μA
Input Capacitance CIN 10 pF
DIGITAL OUTPUTS (READY)

Output High Voltage VOH ISOURCE = 3mA VDVDD
- 0.5 V
Output Low Voltage VOL ISINK = 2mA 0.4 V
DYNAMIC PERFORMANCE

Voltage-Output Slew Rate SR Positive and negative 1.25 V/μs
Voltage-Output Settling Time tS1/4 scale to 3/4 scale VREFI = VAVDD = 5V
settle to ±2 LSB (Note 5) 5 μs
Digital Feedthrough Code 0, all digital inputs from 0 to VDVDD 0.5 nV•s
Major Code Transition Analog
Glitch Impulse 25 nV•s
Output Noise 10kHz 120 nV/Hz
Integrated Output Noise 1Hz to 10kHz 18 μV
DAC-to-DAC Crosstalk 25 nV•s
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= 2.7V to 5.25V, VDVDD= 2.7V to 5.25V, VAVDD≥VDVDD, VGND= 0V, VREFI= VAVDD- 0.25V, COUT= 200pF, ROUT= 10kΩ,= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= 2.7V to 5.25V, VDVDD= 2.7V to 5.25V, VAVDD≥VDVDD, VGND= 0V, VREFI= VAVDD- 0.25V, COUT= 200pF, ROUT= 10kΩ,= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER REQUIREMENTS (Note 7)

Analog Supply Voltage Range VAVDD 2.7 5.25 V
Digital Supply Voltage Range VDVDD 2.7 VAVDD V
IAVDD 2.5 3.6 mA Supply Current
(MAX5134/MAX5135) IDVDDNo load, all digital inputs at 0 or DVDD 1 10 μA
IAVDD 1.5 2.3 mA Supply Current
(MAX5136/MAX5137) IDVDDNo load, all digital inputs at 0 or DVDD 1 10 μA
IAVPD 0.2 2 Power-Down Supply Current IDVPDNo load, all digital inputs at 0 or DVDD 0.1 2 μA
TIMING CHARACTERISTICS (Note 8) (Figure 1)

Serial-Clock Frequency fSCLK 0 30 MHz
SCLK Pulse-Width High tCH 13 ns
SCLK Pulse-Width Low tCL 13 ns
CS Fall-to-SCLK Fall Setup Time tCSS 8 ns
SCLK Fall-to CS-Rise Hold Time tCSH 5 ns
DIN-to-SCLK Fall Setup Time tDS 10 ns
DIN-to-SCLK Fall Hold Time tDH 2 ns
SCLK Fall to READY Transition tSRL (Note 9) 30 ns
CS Pulse-Width High tCSW 33 ns
LDAC Pulse Width tLDACPWL 33 ns
Note 1:
Static accuracy tested without load.
Note 2:
Linearity is tested within 20mV of GND and AVDD, allowing for gain and offset error.
Note 3:
Codes above 2047 are guaranteed to be within ±8 LSB.
Note 4:
Gain and offset tested within 100mV of GND and AVDD.
Note 5:
Guaranteed by design.
Note 6:
Device draws current in excess of the specified supply current when a digital input is driven with a voltage of VI < VDVDD- 0.6V
or VI > 0.5V. At VI = 2.2V with VDVDD = 5.25V, this current can be as high as 2mA. The SPI inputs are CMOS-input level com-
patible.The 30MHz clock frequency cannot be guaranteed for a minimum signal swing.
Note 7:
Excess current from AVDD is 10mA when powered without DVDD. Excess current from DVDD is 1mA when powered without
AVDD.
Note 8:
All timing specifications are with respect to the digital input and output thresholds.
Note 9:
Maximum daisy-chain clock frequency is limited to 25MHz.C6C5D2D1D0X
COMMAND EXECUTED ON
24TH FALLING EDGE OF SCLKCS
SCLK
DIN
X = DON'T CARE.
tCHtCLtCSS
tDH
tCSH
tDS
tSRL
READY
tCSW
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134/MAX5136 INTEGRAL
NONLINEARITY vs. DIGITAL INPUT CODE

MAX5134-MAX5137 toc01
DIGITAL INPUT CODE (LSB)
INL (LSB)1638432768
MAX5134/MAX5136 INTEGRAL
NONLINEARITY vs. ANALOG SUPPLY VOLTAGE
MAX5134-MAX5137 toc02
AVDD ( V )
INL (LSB)
MAX5134/MAX5136 INTEGRAL
NONLINEARITY vs. TEMPERATURE
MAX5134-MAX5137 toc03
TEMPERATURE (°C)
INL (LSB)
MAX5134/MAX5136 DIFFERENTIAL
NONLINEARITY vs. DIGITAL INPUT CODE
MAX5134-MAX5137 toc04
DIGITAL INPUT CODE (LSB)
DNL (LSB)
MAX5134/MAX5136 DIFFERENTIAL
NONLINEARITY vs. ANALOG SUPPLY VOLTAGE
MAX5134-MAX5137 toc05
AVDD ( V )
DNL (LSB)
MAX5134/MAX5136 DIFFERENTIAL
NONLINEARITY vs. TEMPERATURE
MAX5134-MAX5137 toc06
TEMPERATURE (°C)
DNL (LSB)
MAX5134/MAX5136 OFFSET ERROR
vs. ANALOG SUPPLY VOLTAGE
MAX5134-MAX5137 toc07
OFFSET ERROR (mV)
MAX5135/MAX5137 DIFFERENTIAL
NONLINEARITY vs. DIGITAL INPUT CODE
MAX5134-MAX5137 toc08
DNL (LSB)3072102420484096
MAX5135/MAX5137 INTEGRAL
NONLINEARITY vs. DIGITAL INPUT CODE
MAX5134-MAX5137 toc09
INL (LSB)3072102420484096
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
MAX5134–MAX5137
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
OFFSET ERROR vs. TEMPERATURE

MAX5134-MAX5137 toc10
TEMPERATURE (°C)
OFFSET ERROR (mV)
VAVDD = 2.7V
VREFI = 2.5V
VAVDD = 5.25V
VREFI = 5V
GAIN ERROR vs.
ANALOG SUPPLY VOLTAGE

MAX5134-MAX5137 toc11
AVDD ( V )
GAIN ERROR (%FS)
GAIN ERROR vs. TEMPERATURE
MAX5134-MAX5137 toc12
TEMPERATURE (°C)
GAIN ERROR (%FS)
VAVDD = 2.7V
VAVDD = 5.25V
ANALOG SUPPLY CURRENT
vs. ANALOG SUPPLY VOLTAGE

MAX5134-MAX5137 toc13
SUPPLY VOLTAGE (V)
SUPPL
Y CURRENT (
VOUT_ = 0
(MAX5136/MAX5137)
VOUT_ = VREFO
(MAX5136/MAX5137)
VOUT_ = 0 (MAX5134/MAX5135)
VOUT_ = VREFO (MAX5134/MAX5135)
ANALOG SUPPLY CURRENT vs. TEMPERATURE

MAX5134-MAX5137 toc14
TEMPERATURE (°C)806040-40-20
SUPPL
Y CURRENT (
IDVDD
IAVDD (MAX5136/MAX5137)
IAVDD (MAX5134/MAX5135)
ANALOG SUPPLY CURRENT vs. SUPPLY VOLTAGE
(POWER-DOWN MODE)

MAX5134-MAX5137 toc15
SUPPLY VOLTAGE (V)
SUPPL
Y CURRENT (
TA = +25°C
TA = -40°C
TA = +105°C
EXITING/ENTERING
POWER-DOWN MODE

MAX5134-MAX5137 toc16
4μs/div
CH1
CH0
500mV/div
500mV/div
MAJOR CODE TRANSITION

MAX5134-MAX5137 toc17
1μs/div
10mV/div
SETTLING TIME UP

MAX5134-MAX5137 toc18
400ns/div
500mV/div
MAX5134–MAX5137
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
SETTLING TIME DOWN

MAX5134-MAX5137 toc19
400ns/div
500mV/div
CROSSTALK

MAX5134-MAX5137 toc20
4μs/div
10mV/div
2V/div
DIGITAL FEEDTHROUGH

MAX5134-MAX5137 toc21
40ns/div
5V/div
50mV/div
SCLK
VOUT_
DIGITAL SUPPLY CURRENT vs.
DIGITAL SUPPLY VOLTAGE

MAX5134-MAX5137 toc22
SUPPLY VOLTAGE (V)
SUPPL
Y CURRENT (nA)
VAVDD = 5.25V, SCLK = 0Hz
REFERENCE VOLTAGE vs.
SUPPLY VOLTAGE

MAX5134-MAX5137 toc23
SUPPLY VOLTAGE (V)
REFO
(V)
TA = -40°CTA = +105°C
TA = +25°C
REFERENCE VOLTAGE
vs. TEMPERATURE

MAX5134-MAX5137 toc24
TEMPERATURE (°C)
REFO
(V)
DIGITAL SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
MAX5134-MAX5137 toc25
DIGIT
AL SUPPL
Y CURRENT (4321
VAVDD = VDVDD = 5.25V
DOWN
FULL-SCALE OUTPUT
vs. TEMPERATURE

MAX5134-MAX5137 toc26
OUTPUT VOL
AGE (V)
EXTERNAL
REFERENCE
2.500V
INTERNAL
REFERENCE
OUTPUT VOLTAGE
vs. OUTPUT CURRENT

MAX5134-MAX5137 toc27
OUTPUT VOL
AGE (V)2015105
VAVDD = 3.3V
VAVDD = 5V
MAX5134–MAX5137
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
FULL-SCALE REFERENCE FEEDTHROUGH

MAX5134-MAX5137 toc28
500mV/div
500mV/div
0V VREF
0V VOUT
VOUT_
REF
ZERO-SCALE REFERENCE FEEDTHROUGH

MAX5134-MAX5137 toc29
20μs/div
10mV/div
500mV/div
VOUT_
VREF
REFERENCE INPUT RESPONSE
vs. FREQUENCY

MAX5134-MAX5137 toc30
INPUT FREQUENCY (kHz)
ATTENUATION (dB)
10,000100010010
POWER-UP GLITCH, ZERO SCALE,
EXTERNAL REFERENCE
MAX5134-MAX5137 toc31
1V/div
2V/div
VOUT_
VAVDD
POWER-UP GLITCH, ZERO SCALE,
INTERNAL REFERENCE

MAX5134-MAX5137 toc32
2V/div
1V/div
VAVDD
VOUT_
POWER-UP GLITCH, MIDSCALE,
EXTERNAL REFERENCE

MAX5134-MAX5137 toc33
2V/div
1V/div
VAVDD
VOUT_
POWER-UP GLITCH, MIDSCALE,
INTERNAL REFERENCE

MAX5134-MAX5137 toc34
2V/div
1V/div
VAVDD
VOUT_
DC NOISE SPECTRUM, FFT PLOT

MAX5134-MAX5137 toc35
2.5kHz/div25kHz
-40dBm
10dB/div
MAX5134–MAX5137
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
Detailed Description
The MAX5134–MAX5137 is a family of pin-compatible
and software-compatible 16-bit and 12-bit DACs. The
MAX5134/MAX5135 are low-power, quad 16-/12-bit,
buffered voltage-output, high-linearity DACs. The
MAX5136/MAX5137 are low-power, dual 16-/12-bit,
buffered voltage-output, high-linearity DACs. The
MAX5134–MAX5137 minimize the digital noise
feedthrough from input to output by powering down the
SCLK and DIN input buffers after completion of each 24-
bit serial input. On power-up, the MAX5134–MAX5137
reset the DAC outputs to zero or midscale, depending on
the state of the M/Zinput, providing additional safety for
applications that drive valves or other transducers that
need to be off on power-up. The MAX5134–MAX5137
contain a segmented resistor string-type DAC, a serial-in
(POR) circuit, and control logic. On the falling edge of
the clock (SCLK) pulse, the serial input (DIN) data is
shifted into the device, MSB first. During power-down, an
internal 80kΩresistor pulls DAC outputs to GND.
Output Amplifiers (OUT0–OUT3)

The MAX5134–MAX5137 include internal buffers for all
DAC outputs. The internal buffers provide improved load
regulation and transition glitch suppression for the DAC
outputs. The output buffers slew at 1.25V/µs and drive up
to 2kΩin parallel with 200pF. The analog supply voltage
(AVDD) determines the maximum output voltage range
of the device as AVDD powers the output buffers.
DAC Reference
Internal Reference

The MAX5134–MAX5137 feature an internal reference
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137
Pin Description
PIN
MAX5134
MAX5135
MAX5136
MAX5137
TQFN-EPTSSOPTQFN-EPTSSOP
NAMEFUNCTION
3 1 3 OUT0 Channel 0 Buffered DAC Output
2, 5, 8,
11, 14, 17,
20, 23
2, 5, 6, 8,
11, 13, 14,
17, 20, 23
6, 11 N.C. No Connection. Not internally connected. 4 3 4 DVDD Digital Power Supply. Bypass DVDD with a 0.1μF capacitor to GND.
4 5 4 5 READY Active-Low Ready. Indicated configuration ready. Use READY as CS for
consecutive part or as feedback to the μC. 6 — — OUT3 Channel 3 Buffered DAC Output
7, 19 7, 15 7, 19 7, 15 GND Ground
9 8 9 8 DIN Data In
10 9 10 9 CS Active-Low Chip-Select Input
12 10 12 10 SCLK Serial-Clock Input
13 11 — — OUT2 Channel 2 Buffered DAC Output
15 12 15 12 LDAC Load DAC Input. Active-low hardware load DAC input.
16 13 16 13 M/Z
Power-Up Reset Select. Connect M/Z to VAVDD to power up the DAC
outputs to midscale. Connect M/Z to GND to power up the DAC outputs to
zero.
18 14 18 14 OUT1 Channel 1 Buffered DAC Output
21 16 21 16 REFO Reference Voltage Output
22 1 22 1 REFI Reference Voltage Input. Bypass REFI with a 0.1μF capacitor to GND
when using external reference.
24 2 24 2 AVDD Analog Power Supply. Bypass AVDD with a 0.1μF capacitor to GND.
— — — — EP Exposed Pad. Not internally connected. Connect to a ground or leave
unconnected. Not intended as an electrical connection point.
when using the internal reference. Bypass REFO to
GND with a 47pF (maximum 100pF) capacitor.
Alternatively, if heavier decoupling is required, use a
1kΩresistor in series with a 1µF capacitor in parallel
with the existing 100pF capacitor. REFO can deliver up
to 100µA of current with no degradation in perfor-
mance. Configure other reference voltages by applying
a resistive potential divider with a total resistance
greater than 33kΩfrom REFO to GND.
External Reference

The external reference input features a typical input
impedance of 113kΩand accepts an input voltage
from +2V to AVDD. Connect an external voltage
supply between REFI and GND to apply an ex-
ternal reference. Leave REFO unconnected. Visit
www.maximintegrated.com/products/references
for
a list of available external voltage-reference devices.
AVDD as Reference

Connect AVDD to REFI to use AVDDas the reference
voltage. Leave REFO unconnected.
Serial Interface

The MAX5134–MAX5137 3-wire serial interface is com-
patible with MICROWIRE, SPI, QSPI, and DSPs (Figures
2, 3). The interface provides three inputs, SCLK, CS,
and DIN and one output, READY. Use READYto verify
communication or to daisy-chain multiple devices (see
the READYsection). READYis capable of driving a
20pF load with a 30ns (max) delay from the falling edge
of SCLK. The chip-select input (CS) frames the serial
data loading at DIN. Following a chip-select input’s
high-to-low transition, the data is shifted synchronously
and latched into the input register on each falling edge
of the serial-clock input (SCLK). Each serial word is 24
bits. The first 8 bits are the control word followed by 16
data bits (MSB first), as shown in Table 1. The serial
input register transfers its contents to the input registers
after loading 24 bits of data. To initiate a new data
transfer, drive CShigh, keep CShigh for a minimum of
33ns before the next write sequence. The SCLK can be
either high or low between CSwrite pulses. Figure 1
shows the timing diagram for the complete 3-wire serial-
interface transmission.
Pin-/Software-Compatible,
16-/12-Bit, Voltage-Output DACs
MAX5134–MAX5137
24-BIT WORD
CONTROL BITSDATA BITS
MSBLSB
C6C5C4C3C2C1C0D15D14D13D12D11D10D9D8D7D6–D0
DESCFUNCTION
0000000XXXXXXXXXXNOPNo operation.0000001XXXXDAC
DAC
DAC
DACXXLDAC
Move contents of input
to DAC registers
indicated by 1’s. No
effect on registers
indicated by 0’s.0000010XXXXXXXXXXCLRSoftware clear.0000011XXXXDAC
DAC
DAC
DACREADY_ENXPower
Control
Power down DACs
indicated by 1’s.
Set READY_EN = 1 to
enable READY.0000101000000LIN000LinearityOptimize DAC linearity.001DAC
DAC
DAC
DACD15D14D13D12D11D10D9D8D7D6Write
Write to selected input
registers (DAC output
not affected).011DAC
DAC
DAC
DACD15D14D13D12D11D10D9D8D7D6Write-
through
Write to selected input
and DAC registers,
DAC outputs updated
(writethrough).0100000XXXXXXXXXXNOPNo operation.
Table 1. Operating Mode Truth Table*
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