MAX5102AEUE+T Fast Delivery |IC PHOENIX CO.,LIMITED

MAX5102AEUE+T ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplications (LSB)MAX5102AEUE -40°C to +85°C 16 TSSOP ±1Digital Gain and Offset AdjustmentMAX5102BE ..
MAX5104CEE ,Low-power, dual, voltage-output, 12-bit DAC with serial interface. INL (LSB) +-4ApplicationsMAX5104CEE 0°C to +70°C 16 QSOP ±4Industrial Process ControlMAX5104EEE -40°C to +85°C 1 ..
MAX5104EEE ,Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial InterfaceApplicationsMAX5104CEE 0°C to +70°C 16 QSOP ±4Industrial Process ControlMAX5104EEE -40°C to +85°C 1 ..
MAX5105EEP+ ,Nonvolatile, Quad, 8-Bit DACsFeaturesThe MAX5105/MAX5106 nonvolatile, quad, 8-bit digital-♦ On-Chip EEPROM Stores DAC Statesto-a ..
MAX5105EEP+T ,Nonvolatile, Quad, 8-Bit DACsApplications(MAX5105)Digital Gain and Offset Adjustments♦ Wide Operating Temperature Range Programm ..
MAX5106EEE ,Nonvolatile, Quad, 8-Bit DACsApplications(MAX5105)Digital Gain and Offset Adjustments Wide Operating Temperature Range Programm ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsELECTRICAL CHARACTERISTICS(V+ = 2.7V to 6.0V, T = T to T , unless otherwise noted. Typical values a ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsMAX941/MAX942/MAX94419-0229; Rev 3; 6/97High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply Co ..
MAX942ESA+ ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsFeaturesThe MAX941/MAX942/MAX944 are single/dual/quad high- ● Available in μMAX Packagespeed compar ..
MAX942ESA+T ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsElectrical Characteristics(V+ = 2.7V to 5.5V, T = T to T , unless otherwise noted. Typical values a ..
MAX942EUA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsMAX941/MAX942/MAX94419-0229; Rev 3; 6/97High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply Co ..
MAX942EUA+T ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsApplicationsMAX941CSA 0°C to +70°C 8 SO● 3V/5V SystemsMAX941EPA -40°C to +85°C 8 PDIP● Battery-Powe ..

MAX5102AEUE+T
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
General Description
The MAX5102 parallel-input, voltage-output, dual 8-bit
digital-to-analog converter (DAC) operates from a single
+2.7V to +5.5V supply and comes in a space-saving
16-pin TSSOP package. Internal precision buffers
swing Rail-to-Rail®, and the reference input range
includes both ground and the positive rail. Both DACs
share a common reference input.
The MAX5102 has separate input latches for each of its
DACs. Data is transferred to the input latches from a
common 8-bit input port. The DACs are individually
selected through address input A0 and are updated by
bringing WRlow.
The MAX5102 features a shutdown mode that reduces
current to 1nA, as well as a power-on reset mode that
resets all registers to code 00 hex on power-up.
Applications
Digital Gain and Offset Adjustment
Programmable Attenuators
Portable Instruments
Power-Amp Bias Control
Features+2.7V to +5.5V Single-Supply OperationUltra-Low Supply Current
0.2mA while Operating
1nA in Shutdown ModeUltra-Small 16-Pin TSSOP PackageGround to VDDReference Input RangeOutput Buffer Amplifiers Swing Rail-to-RailPower-On Reset Sets All Registers to Zero
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
VDDOUTA
OUTB
GND
TOP VIEW
MAX5102
TSSOP
REF
SHDN
19-1565; Rev 0; 10/99
PART
MAX5102AEUE
MAX5102BEUE-40°C to +85°C
-40°C to +85°C
TEMP. RANGEPIN-PACKAGE
16 TSSOP
16 TSSOP
Pin Configuration
Ordering Information
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
INL
(LSB)
OUTA
OUTB
MAX5102
DAC A
DAC B
INPUT
LATCH A
INPUT
LATCH B
CONTROL
LOGIC
SHDNREF
D0–D7
Functional Diagram
Code = FF hex
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= VREF= +2.7V to +5.5V, GND = 0V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at
VDD= VREF= +3V and TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
D_, A0, WR, SHDN to GND......................................-0.3V to +6V
REF to GND................................................-0.3V to (VDD+ 0.3V)
OUT_ to GND...........................................................-0.3V to VDD
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 5.7mW/°C above +70°C).......457mW
Operating Temperature Range
MAX5102_EUE..............................................-40°C to +85°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
VIN= VDDor GND
MAX5102A
VDD= 3.6V to 5.5V
VDD= 2.7V to 3.6V= ∞
VDD= 2.7V to 3.6V,
VREF= 2.5V
Code = F0 hex
Code = F0 hex
Code = 00 hex
MAX5102B
Guaranteed monotonic
Code = 00 hex
Code = 00 hex, VDD= 2.7V to 5.5V
CONDITIONS±1.0IINInput Current0.8VILInput Low VoltageV2VIHInput High Voltage0VREFOutput Voltage Range15Input Capacitance320460600Input Resistance0VDDInput Voltage Range
LSB±1INLIntegral Nonlinearity (Note 1)
Bits8Resolution
LSB
Power-Supply Rejection
LSB/°C±0.001Gain-Error Temperature
Coefficient±1Gain Error (Note 2)
µV/°C±10Zero-Code Temperature
Coefficient
LSB±1DNLDifferential Nonlinearity (Note 1)±20ZCEZero-Code Error10Zero-Code-Error Supply
Rejection
UNITSMINTYPMAXSYMBOLPARAMETER10CINInput Capacitance
STATIC ACCURACY
REFERENCE INPUT
DAC OUTPUTS
DIGITAL INPUTS
Code = FF hex
VDD= 4.5V to 5.5V,
VREF= 4.096V
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Note 1:Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2:Gain error is: [100 (VF0,meas- ZCE - VF0,ideal) / VREF]. Where VF0,measis the DAC output voltage with input code F0 hex,
and VF0,idealis the ideal DAC output voltage with input code F0 hex (i.e., VREF·240 / 256).
Note 3:Output settling time is measured from the 50% point of the falling edge of WRto ±1/2LSB of VOUT’s final value.
Note 4:Channel-to-channel isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
other DAC output. The measured channel has a fixed code of 80 hex.
Note 5:Digital feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
data inputs with WRat VDD.
Note 6:RL= ∞, digital inputs at GND or VDD.
Note 7:Timing measurement reference level is (VIH+ VIL) / 2.
ELECTRICAL CHARACTERISTICS (continued)
(VDD= VREF= +2.7V to +5.5V, GND = 0V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at
VDD= VREF= +3V and TA= +25°C.)
CONDITIONSUNITSMINTYPMAXSYMBOLPARAMETER
From code 00 to code F0 hex
REF = 0.5Vp-p, VREF(DC)= 1.5V,
VDD= 3V, -3dB bandwidth
To 1/2LSB, from code 00 to code F0 hex
Code 00 to code FF hex
Code 00 to code FF hex
IDD< 5µA
Code 80 hex to code 7F hex
To ±1/2LSB of final value of VOUT20tWRWRPulse Width0tDHData to WRHold25tDSData to WRSetup0tAHAddress to WRHold5tASAddress to WRSetup0.0011Shutdown Current190360IDDSupply Current (Note 6)2.75.5VDDPower-Supply Voltage20tSDNTime to Shutdown13tSDRShutdown Recovery Time
V/µs0.6Output Voltage Slew Rate
µVRMS60Wideband Amplifier Noise
kHz650Multiplying Bandwidth6Output Settling Time (Note 3)
nVs500Channel-to-Channel Isolation
(Note 4)
nVs0.5Digital Feedthrough (Note 5)
nVs90Digital-to-Analog Glitch Impulse
REF = 2.5Vp-p at 1kHz, VREF(DC)= 1.5V,
VDD= 3V, code FF hexSignal-to-Noise plus Distortion
RatioSINADdB
REF = 2.5Vp-p at 10kHz, VREF(DC)= 1.5V,
VDD= 3V, code FF hex
DYNAMIC PERFORMANCE
POWER SUPPLIES
DIGITAL TIMING(Figure 1) (Note 7)
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Typical Operating Characteristics
(VDD= VREF= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA = +25°C, unless otherwise noted.)
DAC ZERO-CODE OUTPUT VOLTAGE
vs. SINK CURRENT
MAX5102 toc01
SINK CURRENT (mA)
OUT
(V)
VDD = VREF = 3V
VDD = VREF = 5V26810
DAC FULL-SCALE OUTPUT VOLTAGE
vs. SOURCE CURRENT
MAX5102 toc02
SOURCE CURRENT (mA)
OUT
(V)VDD = VREF = 3V
VDD = VREF = 5V
SUPPLY CURRENT vs. TEMPERATURE
MAX5102 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (
1 DAC AT CODE 00 OR F0
1 DAC AT CODE 00 (RL = ∞)
VDD = 5V; CODE = F0 HEX
VDD = 5V; CODE = 00
VDD = 3V; CODE = F0 HEX
VDD = 3V; CODE = 00
VDD = 3.0V
SUPPLY CURRENT vs.
REFERENCE VOLTAGE
MAX5102 toc04
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (
1 DAC AT CODE 00 OR F0
1 DAC AT CODE 00 (RL = ∞)
CODE = F0 HEX
CODE = 00 HEX
VDD = 3.0V
SUPPLY CURRENT vs.
REFERENCE VOLTAGE
MAX5102 toc05
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (
VDD = 5.0V
1 DAC AT CODE 00 OR F0
1 DAC AT CODE 00. (RL = ∞)
CODE = F0 HEX
CODE = 00 HEX
MAX5102 toc06
REFERENCE AMPLITUDE (Vp-p)
THD + NOISE (dB)
DAC CODE = FF HEX
VREF = SINE WAVE CENTERED AT 1.5V
80kHz FILTER
20kHz REF SIGNAL
10kHz REF SIGNAL
1kHz REF SIGNAL
TOTAL HARMONIC DISTORTION
PLUS NOISE AT DAC OUTPUT
vs. REFERENCE AMPLITUDE
ADDRESS VALID
DATA VALID
tAStWR
tDS-tDH-
tAH-
ADDRESS
DATA
Figure 1. Timing Diagram
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
TOTAL HARMONIC DISTORTION
PLUS NOISE AT DAC OUTPUT
vs. REFERENCE FREQUENCY
MAX5102 toc07
FREQUENCY(kHz)
THD + NOISE (dB)
DAC CODE = FF HEX
VREF = SINE WAVE CENTERED AT 1.5V
1kHz FREQUENCY
500kHz FILTER
REF = 1Vp-p
REF = 2Vp-p
REF = 0.5Vp-p
REFERENCE INPUT
FREQUENCY RESPONSE
MAX5100 toc08
FREQUENCY (MHz)
OUTPUT AMPLITUDE (dB)
CODE = FF HEX REF IS IVp-p SIGNAL
VREF = 1.5V
WORST-CASE 1LSB DIGITAL STEP CHANGE
(NEGATIVE)
MAX55102 toc09
2μs/div
CH1 = WR, 1V/div, CH2 = VOUTA, 50mV/div, AC-COUPLED
DAC CODE FROM 80 TO 7F HEX
WORST-CASE 1LSB DIGITAL STEP CHANGE
(POSITIVE)
MAX55102 toc10
1μs/div
CH1 = WR, 1V/div, CH2 = VOUTA, 50mV/div, AC-COUPLED
DAC CODE FROM 7F TO 80 HEX
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(0 TO 1 DIGITAL TRANSITION)
MAX55102 toc11
20ns/div
CH1 = D7, 2V/div, CH2 = VOUTA, 1mV/div
0 TO 1 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(1 TO 0 DIGITAL TRANSITION)
MAX55102 toc12
20ns/div
1 TO 0 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
CH1 = D7, 2V/div, CH2 = VOUTA, 1mV/div
POSITIVE SETTLING TIME
MAX55102 toc13
1μs/div
CH1 = WR = 2V/div, CH2 = VOUTA = 2V/div
DAC CODE FROM 10 TO F0 HEX
NEGATIVE SETTLING TIME
MAX55102 toc14
1μs/div
CH1 = WR, 2V/div, CH2 = VOUTA, 2V/div
DAC CODE FROM F0 TO 10 HEX
INTEGRAL AND DIFFERENTIAL
NONLINEARITY vs. DIGITAL CODE
MAX5102 toc15
DIGITAL CODE
INL/DNL (LSB)
RL = ∞
DNL
INL
Typical Operating Characteristics (continued)
(VDD= VREF= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA = +25°C, unless otherwise noted.)
MAX5102
+2.7V to +5.5V, Low-Power, Dual, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Pin Description
DAC A Voltage OutputOUTA16
Data InputsD7–D05–12
DAC Address Select BitA013
GroundGND14
DAC B Voltage OutputOUTB15
Write Input (active low). Use WRto load data into the DAC input latch selected by A0.WR4
Shutdown. Connect SHDN to GND for normal operation.SHDN3
PIN
Reference Voltage Input REF2
Positive Supply Voltage. Bypass VDDto GND using a 0.1µF capacitor.VDD1
FUNCTIONNAME
Detailed Description
Digital-to-Analog Section
The MAX5102 uses a matrix decoding architecture for the
DACs. The external reference voltage is divided down by
a resistor string placed in a matrix fashion. Row and col-
umn decoders select the appropriate tab from the resistor
string to provide the needed analog voltages. The resistor
network converts the 8-bit digital input into an equivalent
analog output voltage in proportion to the applied refer-
ence voltage input. The resistor string presents a code-
independent input impedance to the reference and
guarantees a monotonic output.
These devices can be used in multiplying applications.
Their voltages are buffered by rail-to-rail op amps con-
nected in a follower configuration to provide a rail-to-rail
output (see Functional Diagram).
Low-Power Shutdown Mode
The MAX5102 features a shutdown mode that reduces
current consumption to 1nA. A high voltage on the
SHDN pin shuts down the DACs and the output ampli-
fiers. In shutdown mode, the output amplifiers enter a
high-impedance state. When bringing the device out of
shutdown, allow 13µs for the output to stabilize.
Output Buffer Amplifiers
The DAC outputs are internally buffered by precision
amplifiers with a typical slew rate of 0.6V/µs. The typical
settling time to ±1/2LSB at the output is 6µs when
loaded with 10kΩin parallel with 100pF.
Reference Input
The MAX5102 provides a code-independent input
impedance on the REF input. Input impedance is typi-
cally 460kΩin parallel with 15pF, and the reference
input voltage range is 0 to VDD. The reference input
accepts positive DC signals, as well as AC signals with
peak values between 0 and VDD. The voltage at REF
sets the full-scale output voltage for the DAC. The out-
put voltage (VOUT) for any DAC is represented by a
digitally programmable voltage source as follows:
VOUT= (NB·VREF) / 256
where NBis the numeric value of the DAC binary input
code.
Digital Inputs and Interface Logic
In the MAX5102, address line A0 selects the DAC that
receives data from D0–D7, as shown in Table 1. Whenis low, the addressed DAC’s input latch is transpar-
ent. Data is latched when WRis high. The DAC outputs
(OUTA, OUTB) represent the data held in the two 8-bit
LATCH STATE
Input data latched
DAC A input latch transparentHDAC B input latch transparent
Table 1. MAX5102 Addressing Table
(partial list)
H = High state, L = Low state, X = Don’t care

Partno	Mfg	Dc	Qty	Available	Descript
MAX5102AEUE+T \|MAX5102AEUET	MAXIM	N/a	7500	avai	+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs