MAX5101AEUE+T Fast Delivery |IC PHOENIX CO.,LIMITED

MAX5101AEUE+T ,+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplicationsOrdering InformationDigital Gain and Offset AdjustmentPIN- INLPART TEMP RANGEPACKAGE (L ..
MAX5102AEUE ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsELECTRICAL CHARACTERISTICS(V = V = +2.7V to +5.5V, GND = 0V, R = 10kΩ , C = 100pF, T = T to T , unl ..
MAX5102AEUE ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplications (LSB)MAX5102AEUE -40°C to +85°C 16 TSSOP ±1Digital Gain and Offset AdjustmentMAX5102BE ..
MAX5102AEUE+T ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplications (LSB)MAX5102AEUE -40°C to +85°C 16 TSSOP ±1Digital Gain and Offset AdjustmentMAX5102BE ..
MAX5104CEE ,Low-power, dual, voltage-output, 12-bit DAC with serial interface. INL (LSB) +-4ApplicationsMAX5104CEE 0°C to +70°C 16 QSOP ±4Industrial Process ControlMAX5104EEE -40°C to +85°C 1 ..
MAX5104EEE ,Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial InterfaceApplicationsMAX5104CEE 0°C to +70°C 16 QSOP ±4Industrial Process ControlMAX5104EEE -40°C to +85°C 1 ..
MAX942EPA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsGeneral Description ________
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsELECTRICAL CHARACTERISTICS(V+ = 2.7V to 6.0V, T = T to T , unless otherwise noted. Typical values a ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsELECTRICAL CHARACTERISTICS(V+ = 2.7V to 6.0V, T = T to T , unless otherwise noted. Typical values a ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsMAX941/MAX942/MAX94419-0229; Rev 3; 6/97High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply Co ..
MAX942ESA+ ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsFeaturesThe MAX941/MAX942/MAX944 are single/dual/quad high- ● Available in μMAX Packagespeed compar ..
MAX942ESA+T ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsElectrical Characteristics(V+ = 2.7V to 5.5V, T = T to T , unless otherwise noted. Typical values a ..

MAX5101AEUE+T
+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
General Description
The MAX5101 parallel-input, voltage-output, triple 8-bit
digital-to-analog converter (DAC) operates from a sin-
gle +2.7V to +5.5V supply and comes in a space-sav-
ing 16-pin TSSOP package. Internal precision buffers
swing rail-to-rail. For all three DACs, the internal refer-
ence voltage is tied to VDD.
The MAX5101 has separate input latches for each of its
three DACs. Data is transferred to the input latches
from a common 8-bit input port. The DACs are individu-
ally selected through address inputs A0 and A1 and
are updated by bringing WRlow.
The MAX5101 features a 1µA software shutdown mode,
as well as a power-on reset mode that resets all regis-
ters to code 00 hex on power-up.
Applications
Digital Gain and Offset Adjustment
Programmable Attenuators
Portable Instruments
Power-Amp Bias Control
Features+2.7V to +5.5V Single-Supply OperationUltra-Low Supply Current
0.3mA while Operating
1µA in Software Shutdown ModeUltra-Small 16-Pin TSSOP PackageOutput Buffer Amplifiers Swing Rail-to-RailPower-On Reset Sets All Registers to Zero
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
OUTBOUTC
GND
TOP VIEW
MAX5101
TSSOP
OUTA
VDD
19-1560; Rev 1; 7/05
PART
MAX5101AEUE
MAX5101BEUE-40°C to +85°C
-40°C to +85°C
TEMP RANGEPIN-
PACKAGE
16 TSSOP
16 TSSOP
Pin Configuration
Ordering Information
INL
(LSB)
Functional Diagram
OUTB
OUTC
DAC B
DAC C
INPUT
LATCH B
CONTROL
LOGIC
D0–D7
OUTADAC AINPUT
LATCH A
INPUT
LATCH C
MAX5101
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +2.7V to +5.5V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at VDD= +3V and = +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
D_, A_, WRto GND..................................................-0.3V to +6V
OUT_ to GND...........................................................-0.3V to VDD
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 5.7mW/°C above +70°C)..........457mW
Operating Temperature Range
MAX5101_EUE.................................................-40°C to +85°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Code 00 to code FF hex
MAX5101A
Code 00 to code FF hex
To 1/2LSB, from code 10 to code F0 hex
From code 00 to code F0 hex
VIN= VDDor GND
Code = F0 hex
VDD= 2.7V to 3.6V
Code = F0 hex
Code = 00 hex
MAX5101B
Guaranteed monotonic
Code = 00 hex
Code = 00 hex, VDD= 2.7V to 5.5V= ∞
CONDITIONS
nVs0.5Digital Feedthrough (Note 5)
nVs500Channel-to-Channel Isolation
(Note 4)6Output Settling Time (Note 3)
V/µs0.6Output Voltage Slew Rate10CINInput Capacitance±1.0IINInput Current0.8VILInput Low Voltage2VIHInput High Voltage0VDDOutput Voltage Range
LSB±2INLIntegral Nonlinearity (Note 1)
Bits8Resolution
LSB/°C±0.001Gain-Error Temperature
Coefficient±1Gain Error (Note 2)
µV/°C±10Zero-Code Temperature
Coefficient
LSB±1DNLDifferential Nonlinearity (Note 1)±20ZCEZero-Code Error10Zero-Code-Error Supply
Rejection
UNITSMINTYPMAXSYMBOLPARAMETER
VDD= 3.6V to 5.5V3
STATIC ACCURACY
DAC OUTPUTS
DIGITAL INPUTS
DYNAMIC PERFORMANCE
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +2.7V to +5.5V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at VDD= +3V and = +25°C.)
Note 1:Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2:Gain error is: [100 (VF0,meas- ZCE - VF0,ideal) / VDD]. Where VF0,measis the DAC output voltage with input code F0 hex, and
VF0,idealis the ideal DAC output voltage with input code F0 hex (i.e., VDD·240 / 256).
Note 3:Output settling time is measured from the 50% point of the falling edge of WRto ±1/2LSB of VOUT’s final value.
Note 4:Channel-to-Channel Isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
other DAC output. The measured channel has a fixed code of 80 hex.
Note 5:Digital Feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
data inputs with WRat VDD.
Note 6:RL= ∞ , digital inputs at GND or VDD.
Note 7:Timing measurement reference level is (VIH+ VIL) / 2.
CONDITIONSUNITSMINTYPMAXSYMBOLPARAMETER
Digital-to-Analog Glitch ImpulseCode 80 hex to code 7F hex90nVs
Wideband Amplifier Noise60µVRMS
Shutdown Recovery TimetSDRTo ±1/2LSB of final value of VOUT13µs
Time to ShutdowntSDNIDD< 5µA20µs
Power-Supply VoltageVDD2.75.5V
Supply Current (Note 6)IDD280520µA
Shutdown Current13µA
Address to WRSetuptAS5ns
Address to WRHoldtAH0ns
Data to WRSetuptDS25nsPulse WidthtWR20ns
Data to WRHoldtDH0ns
POWER SUPPLIES
DIGITAL TIMING(Figure 1) (Note 7)
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
__________________________________________Typical Operating Characteristics
(VDD= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA = +25°C, unless otherwise noted.)
DAC ZERO-CODE OUTPUT VOLTAGE
vs. SINK CURRENT
MAX5101-01
SINK CURRENT (mA)
OUT
(V)VDD = 3V
VDD = 5V26810
DAC FULL-SCALE OUTPUT VOLTAGE
vs. SOURCE CURRENT
MAX5101-02
SOURCE CURRENT (mA)
OUT
(V)
VDD = 3V
VDD = 5V
SUPPLY CURRENT vs. TEMPERATURE
MAX5101-03
TEMPERATURE (°C)
SUPPLY CURRENT (
1 DAC AT CODE 00 OR F0
2 DACs AT CODE 00 (RL = ∞)
VDD = 5V; CODE = F0 HEX
VDD = 3V; CODE = F0 HEX
VDD = 5V; CODE = 00 HEX
VDD = 3V; CODE = 00 HEX
WORST-CASE 1LSB DIGITAL STEP
CHANGE (NEGATIVE)
MAX5101-04
2μs/div
CH2
CH1
CH1 = WR, 2V/div
CH2 = VOUTA, 50mV/div, AC-COUPLED
DAC CODE FROM 80 TO 7F HEX
WORST-CASE 1LSB DIGITAL STEP
CHANGE (POSITIVE)
MAX5101-05
2μs/div
CH2
CH1
CH1 = WR, 2V/div
CH2 = VOUTA, 50mV/div, AC-COUPLED
DAC CODE FROM 7F TO 80 HEX
ADDRESS VALID
DATA VALID
tAStWR
tDS-tDH-
tAH-
ADDRESS
DATA
Figure 1. Timing Diagram
SEE NOTE 7, ELECTRICAL CHARACTERISTICS
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
POSITIVE SETTLING TIME
MAX5101-08
1μs/div
CH1
CH2
CH1 = WR, 2V/div
CH2 = VOUTA, 2V/div
DAC CODE FROM 10 TO F0 HEX
NEGATIVE SETTLING TIME
MAX5101-09
1μs/div
CH2
CH1
CH1 = WR, 2V/div
CH2 = VOUTA, 2V/div
DAC CODE FROM F0 TO 10 HEX
INTEGRAL AND DIFFERENTIAL NONLINEARITY
vs. DIGITAL CODE
MAX5101-10
DIGITAL CODE
INL/DNL (LSB)
RL = ∞
DNL
INL
Typical Operating Characteristics (continued)
(VDD= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA = +25°C, unless otherwise noted.)
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(0 TO 1 DIGITAL TRANSMISSION)
MAX5101-06
200ns/div
CH2
CH1
CH1 = D7, 2V/div
CH2 = VOUTA, 1mV/div, AC-COUPLED
0 TO 1 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(1 TO 0 DIGITAL TRANSMISSION)
MAX5101-07
200ns/div
CH2
CH1
CH1 = D7, 2V/div
CH2 = VOUTB, 1mV/div, AC-COUPLED
1 TO 0 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Detailed Description
Digital-to-Analog Section
The MAX5101 uses a matrix decoding architecture for the
digital-to-analog converters (DACs). The internal refer-
ence voltage is connected to VDDand divided down by a
resistor string placed in a matrix fashion. Row and col-
umn decoders select the appropriate tab from the resistor
string to provide the needed analog voltages. The resistor
network converts the 8-bit digital input into an equivalent
analog output voltage in proportion to the supply voltage
(VDD). The resistor string presents a code-independent
input impedance to the supply and guarantees a monoto-
nic output.
The voltages are buffered by rail-to-rail op amps con-
nected in a follower configuration to provide a rail-to-rail
output (see Functional Diagram).
Output Buffer Amplifiers
The DAC outputs are internally buffered by a precision
amplifier with a typical slew rate of 0.6V/µs. The typical
settling time to ±1/2LSB at the output is 6µs when
loaded with 10kΩin parallel with 100pF.
DAC Reference Voltage
The MAX5101’s reference is internally tied to VDD. The
output voltage (VOUT) for any DAC is represented by a
digitally programmable voltage source as follows:
VOUT= (NB·VDD) / 256
where NBis the numeric value of the DAC binary input
code.
Digital Inputs and Interface Logic
In the MAX5101, address lines A0 and A1 select the DAC
that receives data from D0–D7, as shown in Table 1.
When WRis low, the addressed DAC’s input latch is
transparent. Data is latched when WRis high. The DAC
outputs (OUTA, OUTB) represent the data held in the
three 8-bit input latches. To avoid output glitches in the
MAX5101, ensure that data is valid before WRgoes low.
Low-Power Shutdown Mode
The MAX5101 features a software shutdown mode. A
write performed to address A1 = H and A0 = H causes
the device to shut down. A subsequent write to any of
the other three addresses disables shutdown and turns
the analog circuitry on. As the MAX5101 comes out of
shutdown, all registers retain their digital values prior to
shutdown. However, when the device powers up (i.e.,
VDDramps up), all latches are internally preset with
code 00 hex. In shutdown, the output amplifiers enter a
high-impedance state. When bringing the device out of
shutdown, allow 13µs for the output to stabilize.
Power-Supply Bypassing and
Ground Management
Digital or AC transient signals on GND can create noise
at the analog output. Return GND to the highest-quality
ground available. Bypass VDDwith a 0.1µF capacitor,
located as close to VDDand GND as possible.
Careful PC board ground layout minimizes crosstalk
between the DAC outputs and digital inputs.
NAMEFUNCTIONOUTBDAC B Voltage OutputOUTADAC A Voltage Output
PINVDDPositive Supply Voltage. Bypass VDDto GND using a 0.1µF capacitor.WRWrite Input (active low). Use WRto load data into the DAC input latch selected by A0 and A1.GNDGroundA0DAC Address Select Bit (LSB)A1DAC Address Select Bit (MSB)
5–12D7–D0Data Inputs 7–0OUTCDAC C Voltage Output
Pin Description

Partno	Mfg	Dc	Qty	Available	Descript
MAX5101AEUE+T	MAXIM	N/a	2200	avai	+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs